drivers/common/sfc_efx/efsys.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright(c) 2019-2020 Xilinx, Inc.
   4  * Copyright(c) 2016-2019 Solarflare Communications Inc.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #ifndef _SFC_COMMON_EFSYS_H
  11 #define _SFC_COMMON_EFSYS_H
  12
  13 #include <stdbool.h>
  14
  15 #include <rte_spinlock.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_debug.h>
  18 #include <rte_memzone.h>
  19 #include <rte_memory.h>
  20 #include <rte_memcpy.h>
  21 #include <rte_cycles.h>
  22 #include <rte_prefetch.h>
  23 #include <rte_common.h>
  24 #include <rte_malloc.h>
  25 #include <rte_log.h>
  26 #include <rte_io.h>
  27
  28 #include "sfc_efx_debug.h"
  29 #include "sfc_efx_log.h"
  30
  31 #ifdef __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 #define LIBEFX_API              __rte_internal
  36
  37 /* No specific decorations required since functions are local by default */
  38 #define LIBEFX_INTERNAL
  39
  40 #define EFSYS_HAS_UINT64 1
  41 #define EFSYS_USE_UINT64 1
  42 #define EFSYS_HAS_SSE2_M128 1
  43
  44 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
  45 #define EFSYS_IS_BIG_ENDIAN 1
  46 #define EFSYS_IS_LITTLE_ENDIAN 0
  47 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
  48 #define EFSYS_IS_BIG_ENDIAN 0
  49 #define EFSYS_IS_LITTLE_ENDIAN 1
  50 #else
  51 #error "Cannot determine system endianness"
  52 #endif
  53
  54
  55 typedef bool boolean_t;
  56
  57 #ifndef B_FALSE
  58 #define B_FALSE false
  59 #endif
  60 #ifndef B_TRUE
  61 #define B_TRUE  true
  62 #endif
  63
  64 /*
  65  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
  66  * expression allowed only inside a function, but MAX() is used as
  67  * a number of elements in array.
  68  */
  69 #ifndef MAX
  70 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
  71 #endif
  72 #ifndef MIN
  73 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
  74 #endif
  75
  76 #ifndef ISP2
  77 #define ISP2(x)                 rte_is_power_of_2(x)
  78 #endif
  79
  80 #define ENOTACTIVE      ENOTCONN
  81
  82 static inline void
  83 prefetch_read_many(const volatile void *addr)
  84 {
  85         rte_prefetch0(addr);
  86 }
  87
  88 static inline void
  89 prefetch_read_once(const volatile void *addr)
  90 {
  91         rte_prefetch_non_temporal(addr);
  92 }
  93
  94 /* Code inclusion options */
  95
  96
  97 #define EFSYS_OPT_NAMES 1
  98
  99 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
 100 #define EFSYS_OPT_SIENA 0
 101 /* Enable SFN7xxx support */
 102 #define EFSYS_OPT_HUNTINGTON 1
 103 /* Enable SFN8xxx support */
 104 #define EFSYS_OPT_MEDFORD 1
 105 /* Enable SFN2xxx support */
 106 #define EFSYS_OPT_MEDFORD2 1
 107 /* Enable Riverhead support */
 108 #define EFSYS_OPT_RIVERHEAD 1
 109
 110 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 111 #define EFSYS_OPT_CHECK_REG 1
 112 #else
 113 #define EFSYS_OPT_CHECK_REG 0
 114 #endif
 115
 116 /* MCDI is required for SFN7xxx and SFN8xx */
 117 #define EFSYS_OPT_MCDI 1
 118 #define EFSYS_OPT_MCDI_LOGGING 1
 119 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
 120
 121 #define EFSYS_OPT_MAC_STATS 1
 122
 123 #define EFSYS_OPT_LOOPBACK 1
 124
 125 #define EFSYS_OPT_MON_MCDI 0
 126 #define EFSYS_OPT_MON_STATS 0
 127
 128 #define EFSYS_OPT_PHY_STATS 0
 129 #define EFSYS_OPT_BIST 0
 130 #define EFSYS_OPT_PHY_LED_CONTROL 0
 131 #define EFSYS_OPT_PHY_FLAGS 0
 132
 133 #define EFSYS_OPT_VPD 0
 134 #define EFSYS_OPT_NVRAM 0
 135 #define EFSYS_OPT_BOOTCFG 0
 136 #define EFSYS_OPT_IMAGE_LAYOUT 0
 137
 138 #define EFSYS_OPT_DIAG 0
 139 #define EFSYS_OPT_RX_SCALE 1
 140 #define EFSYS_OPT_QSTATS 0
 141 /* Filters support is required for SFN7xxx and SFN8xx */
 142 #define EFSYS_OPT_FILTER 1
 143 #define EFSYS_OPT_RX_SCATTER 0
 144
 145 #define EFSYS_OPT_EV_EXTENDED_WIDTH 0
 146 #define EFSYS_OPT_EV_PREFETCH 0
 147
 148 #define EFSYS_OPT_DECODE_INTR_FATAL 0
 149
 150 #define EFSYS_OPT_LICENSING 0
 151
 152 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
 153
 154 #define EFSYS_OPT_RX_PACKED_STREAM 0
 155
 156 #define EFSYS_OPT_RX_ES_SUPER_BUFFER 1
 157
 158 #define EFSYS_OPT_TUNNEL 1
 159
 160 #define EFSYS_OPT_FW_SUBVARIANT_AWARE 1
 161
 162 #define EFSYS_OPT_EVB 1
 163
 164 #define EFSYS_OPT_MCDI_PROXY_AUTH_SERVER 0
 165
 166 #define EFSYS_OPT_PCI 1
 167
 168 #define EFSYS_OPT_DESC_PROXY 0
 169
 170 #define EFSYS_OPT_MAE 1
 171
 172 /* ID */
 173
 174 typedef struct __efsys_identifier_s efsys_identifier_t;
 175
 176
 177 #define EFSYS_PROBE(_name)                                              \
 178         do { } while (0)
 179
 180 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
 181         do { } while (0)
 182
 183 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
 184         do { } while (0)
 185
 186 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
 187                      _type3, _arg3)                                     \
 188         do { } while (0)
 189
 190 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
 191                      _type3, _arg3, _type4, _arg4)                      \
 192         do { } while (0)
 193
 194 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
 195                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
 196         do { } while (0)
 197
 198 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
 199                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 200                      _type6, _arg6)                                     \
 201         do { } while (0)
 202
 203 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
 204                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 205                      _type6, _arg6, _type7, _arg7)                      \
 206         do { } while (0)
 207
 208
 209 /* DMA */
 210
 211 typedef rte_iova_t efsys_dma_addr_t;
 212
 213 typedef struct efsys_mem_s {
 214         const struct rte_memzone        *esm_mz;
 215         /*
 216          * Ideally it should have volatile qualifier to denote that
 217          * the memory may be updated by someone else. However, it adds
 218          * qualifier discard warnings when the pointer or its derivative
 219          * is passed to memset() or rte_mov16().
 220          * So, skip the qualifier here, but make sure that it is added
 221          * below in access macros.
 222          */
 223         void                            *esm_base;
 224         efsys_dma_addr_t                esm_addr;
 225 } efsys_mem_t;
 226
 227
 228 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
 229         do {                                                            \
 230                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
 231                                                                         \
 232                 _NOTE(CONSTANTCONDITION);                               \
 233         } while (B_FALSE)
 234
 235 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
 236         do {                                                            \
 237                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 238                 volatile uint32_t *_addr;                               \
 239                                                                         \
 240                 _NOTE(CONSTANTCONDITION);                               \
 241                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 242                                                 sizeof(efx_dword_t)));  \
 243                                                                         \
 244                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 245                 (_edp)->ed_u32[0] = _addr[0];                           \
 246                                                                         \
 247                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
 248                                          uint32_t, (_edp)->ed_u32[0]);  \
 249                                                                         \
 250                 _NOTE(CONSTANTCONDITION);                               \
 251         } while (B_FALSE)
 252
 253 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
 254         do {                                                            \
 255                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 256                 volatile uint64_t *_addr;                               \
 257                                                                         \
 258                 _NOTE(CONSTANTCONDITION);                               \
 259                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 260                                                 sizeof(efx_qword_t)));  \
 261                                                                         \
 262                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 263                 (_eqp)->eq_u64[0] = _addr[0];                           \
 264                                                                         \
 265                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
 266                                          uint32_t, (_eqp)->eq_u32[1],   \
 267                                          uint32_t, (_eqp)->eq_u32[0]);  \
 268                                                                         \
 269                 _NOTE(CONSTANTCONDITION);                               \
 270         } while (B_FALSE)
 271
 272 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
 273         do {                                                            \
 274                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 275                 volatile __m128i *_addr;                                \
 276                                                                         \
 277                 _NOTE(CONSTANTCONDITION);                               \
 278                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 279                                                 sizeof(efx_oword_t)));  \
 280                                                                         \
 281                 _addr = (volatile __m128i *)(_base + (_offset));        \
 282                 (_eop)->eo_u128[0] = _addr[0];                          \
 283                                                                         \
 284                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
 285                                          uint32_t, (_eop)->eo_u32[3],   \
 286                                          uint32_t, (_eop)->eo_u32[2],   \
 287                                          uint32_t, (_eop)->eo_u32[1],   \
 288                                          uint32_t, (_eop)->eo_u32[0]);  \
 289                                                                         \
 290                 _NOTE(CONSTANTCONDITION);                               \
 291         } while (B_FALSE)
 292
 293
 294 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
 295         do {                                                            \
 296                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 297                 volatile uint32_t *_addr;                               \
 298                                                                         \
 299                 _NOTE(CONSTANTCONDITION);                               \
 300                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 301                                                 sizeof(efx_dword_t)));  \
 302                                                                         \
 303                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
 304                                          uint32_t, (_edp)->ed_u32[0]);  \
 305                                                                         \
 306                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 307                 _addr[0] = (_edp)->ed_u32[0];                           \
 308                                                                         \
 309                 _NOTE(CONSTANTCONDITION);                               \
 310         } while (B_FALSE)
 311
 312 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
 313         do {                                                            \
 314                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 315                 volatile uint64_t *_addr;                               \
 316                                                                         \
 317                 _NOTE(CONSTANTCONDITION);                               \
 318                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 319                                                 sizeof(efx_qword_t)));  \
 320                                                                         \
 321                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
 322                                          uint32_t, (_eqp)->eq_u32[1],   \
 323                                          uint32_t, (_eqp)->eq_u32[0]);  \
 324                                                                         \
 325                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 326                 _addr[0] = (_eqp)->eq_u64[0];                           \
 327                                                                         \
 328                 _NOTE(CONSTANTCONDITION);                               \
 329         } while (B_FALSE)
 330
 331 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
 332         do {                                                            \
 333                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 334                 volatile __m128i *_addr;                                \
 335                                                                         \
 336                 _NOTE(CONSTANTCONDITION);                               \
 337                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 338                                                 sizeof(efx_oword_t)));  \
 339                                                                         \
 340                                                                         \
 341                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
 342                                          uint32_t, (_eop)->eo_u32[3],   \
 343                                          uint32_t, (_eop)->eo_u32[2],   \
 344                                          uint32_t, (_eop)->eo_u32[1],   \
 345                                          uint32_t, (_eop)->eo_u32[0]);  \
 346                                                                         \
 347                 _addr = (volatile __m128i *)(_base + (_offset));        \
 348                 _addr[0] = (_eop)->eo_u128[0];                          \
 349                                                                         \
 350                 _NOTE(CONSTANTCONDITION);                               \
 351         } while (B_FALSE)
 352
 353
 354 #define EFSYS_MEM_SIZE(_esmp)                                           \
 355         ((_esmp)->esm_mz->len)
 356
 357 #define EFSYS_MEM_ADDR(_esmp)                                           \
 358         ((_esmp)->esm_addr)
 359
 360 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
 361         ((_esmp)->esm_base == NULL)
 362
 363 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
 364         do {                                                            \
 365                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 366                                                                         \
 367                 rte_prefetch0(_base + (_offset));                       \
 368         } while (0)
 369
 370
 371 /* BAR */
 372
 373 typedef struct efsys_bar_s {
 374         rte_spinlock_t          esb_lock;
 375         int                     esb_rid;
 376         struct rte_pci_device   *esb_dev;
 377         /*
 378          * Ideally it should have volatile qualifier to denote that
 379          * the memory may be updated by someone else. However, it adds
 380          * qualifier discard warnings when the pointer or its derivative
 381          * is passed to memset() or rte_mov16().
 382          * So, skip the qualifier here, but make sure that it is added
 383          * below in access macros.
 384          */
 385         void                    *esb_base;
 386 } efsys_bar_t;
 387
 388 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
 389         do {                                                            \
 390                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
 391                 _NOTE(CONSTANTCONDITION);                               \
 392         } while (B_FALSE)
 393 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
 394 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
 395 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
 396
 397 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
 398         do {                                                            \
 399                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 400                 volatile uint32_t *_addr;                               \
 401                                                                         \
 402                 _NOTE(CONSTANTCONDITION);                               \
 403                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 404                                                 sizeof(efx_dword_t)));  \
 405                 _NOTE(CONSTANTCONDITION);                               \
 406                 if (_lock)                                              \
 407                         SFC_BAR_LOCK(_esbp);                            \
 408                                                                         \
 409                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 410                 rte_rmb();                                              \
 411                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
 412                                                                         \
 413                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
 414                                          uint32_t, (_edp)->ed_u32[0]);  \
 415                                                                         \
 416                 _NOTE(CONSTANTCONDITION);                               \
 417                 if (_lock)                                              \
 418                         SFC_BAR_UNLOCK(_esbp);                          \
 419                 _NOTE(CONSTANTCONDITION);                               \
 420         } while (B_FALSE)
 421
 422 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
 423         do {                                                            \
 424                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 425                 volatile uint64_t *_addr;                               \
 426                                                                         \
 427                 _NOTE(CONSTANTCONDITION);                               \
 428                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 429                                                 sizeof(efx_qword_t)));  \
 430                                                                         \
 431                 SFC_BAR_LOCK(_esbp);                                    \
 432                                                                         \
 433                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 434                 rte_rmb();                                              \
 435                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
 436                                                                         \
 437                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
 438                                          uint32_t, (_eqp)->eq_u32[1],   \
 439                                          uint32_t, (_eqp)->eq_u32[0]);  \
 440                                                                         \
 441                 SFC_BAR_UNLOCK(_esbp);                                  \
 442                 _NOTE(CONSTANTCONDITION);                               \
 443         } while (B_FALSE)
 444
 445 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
 446         do {                                                            \
 447                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 448                 volatile __m128i *_addr;                                \
 449                                                                         \
 450                 _NOTE(CONSTANTCONDITION);                               \
 451                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 452                                                 sizeof(efx_oword_t)));  \
 453                                                                         \
 454                 _NOTE(CONSTANTCONDITION);                               \
 455                 if (_lock)                                              \
 456                         SFC_BAR_LOCK(_esbp);                            \
 457                                                                         \
 458                 _addr = (volatile __m128i *)(_base + (_offset));        \
 459                 rte_rmb();                                              \
 460                 /* There is no rte_read128_relaxed() yet */             \
 461                 (_eop)->eo_u128[0] = _addr[0];                          \
 462                                                                         \
 463                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
 464                                          uint32_t, (_eop)->eo_u32[3],   \
 465                                          uint32_t, (_eop)->eo_u32[2],   \
 466                                          uint32_t, (_eop)->eo_u32[1],   \
 467                                          uint32_t, (_eop)->eo_u32[0]);  \
 468                                                                         \
 469                 _NOTE(CONSTANTCONDITION);                               \
 470                 if (_lock)                                              \
 471                         SFC_BAR_UNLOCK(_esbp);                          \
 472                 _NOTE(CONSTANTCONDITION);                               \
 473         } while (B_FALSE)
 474
 475
 476 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
 477         do {                                                            \
 478                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 479                 volatile uint32_t *_addr;                               \
 480                                                                         \
 481                 _NOTE(CONSTANTCONDITION);                               \
 482                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 483                                                 sizeof(efx_dword_t)));  \
 484                                                                         \
 485                 _NOTE(CONSTANTCONDITION);                               \
 486                 if (_lock)                                              \
 487                         SFC_BAR_LOCK(_esbp);                            \
 488                                                                         \
 489                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
 490                                          uint32_t, (_edp)->ed_u32[0]);  \
 491                                                                         \
 492                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 493                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
 494                 rte_wmb();                                              \
 495                                                                         \
 496                 _NOTE(CONSTANTCONDITION);                               \
 497                 if (_lock)                                              \
 498                         SFC_BAR_UNLOCK(_esbp);                          \
 499                 _NOTE(CONSTANTCONDITION);                               \
 500         } while (B_FALSE)
 501
 502 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
 503         do {                                                            \
 504                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 505                 volatile uint64_t *_addr;                               \
 506                                                                         \
 507                 _NOTE(CONSTANTCONDITION);                               \
 508                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 509                                                 sizeof(efx_qword_t)));  \
 510                                                                         \
 511                 SFC_BAR_LOCK(_esbp);                                    \
 512                                                                         \
 513                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
 514                                          uint32_t, (_eqp)->eq_u32[1],   \
 515                                          uint32_t, (_eqp)->eq_u32[0]);  \
 516                                                                         \
 517                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 518                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
 519                 rte_wmb();                                              \
 520                                                                         \
 521                 SFC_BAR_UNLOCK(_esbp);                                  \
 522                 _NOTE(CONSTANTCONDITION);                               \
 523         } while (B_FALSE)
 524
 525 /*
 526  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
 527  * (required by PIO hardware).
 528  *
 529  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
 530  * write-combined memory mapped to user-land, so just abort if used.
 531  */
 532 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
 533         do {                                                            \
 534                 rte_panic("Write-combined BAR access not supported");   \
 535         } while (B_FALSE)
 536
 537 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
 538         do {                                                            \
 539                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 540                 volatile __m128i *_addr;                                \
 541                                                                         \
 542                 _NOTE(CONSTANTCONDITION);                               \
 543                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 544                                                 sizeof(efx_oword_t)));  \
 545                                                                         \
 546                 _NOTE(CONSTANTCONDITION);                               \
 547                 if (_lock)                                              \
 548                         SFC_BAR_LOCK(_esbp);                            \
 549                                                                         \
 550                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
 551                                          uint32_t, (_eop)->eo_u32[3],   \
 552                                          uint32_t, (_eop)->eo_u32[2],   \
 553                                          uint32_t, (_eop)->eo_u32[1],   \
 554                                          uint32_t, (_eop)->eo_u32[0]);  \
 555                                                                         \
 556                 _addr = (volatile __m128i *)(_base + (_offset));        \
 557                 /* There is no rte_write128_relaxed() yet */            \
 558                 _addr[0] = (_eop)->eo_u128[0];                          \
 559                 rte_wmb();                                              \
 560                                                                         \
 561                 _NOTE(CONSTANTCONDITION);                               \
 562                 if (_lock)                                              \
 563                         SFC_BAR_UNLOCK(_esbp);                          \
 564                 _NOTE(CONSTANTCONDITION);                               \
 565         } while (B_FALSE)
 566
 567 /* Use the standard octo-word write for doorbell writes */
 568 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
 569         do {                                                            \
 570                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
 571                 _NOTE(CONSTANTCONDITION);                               \
 572         } while (B_FALSE)
 573
 574 /* SPIN */
 575
 576 #define EFSYS_SPIN(_us)                                                 \
 577         do {                                                            \
 578                 rte_delay_us(_us);                                      \
 579                 _NOTE(CONSTANTCONDITION);                               \
 580         } while (B_FALSE)
 581
 582 #define EFSYS_SLEEP EFSYS_SPIN
 583
 584 /* BARRIERS */
 585
 586 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
 587 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
 588
 589 /* DMA SYNC */
 590
 591 /*
 592  * DPDK does not provide any DMA syncing API, and no PMD drivers
 593  * have any traces of explicit DMA syncing.
 594  * DMA mapping is assumed to be coherent.
 595  */
 596
 597 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
 598
 599 /* Just avoid store and compiler (impliciltly) reordering */
 600 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
 601
 602 /* TIMESTAMP */
 603
 604 typedef uint64_t efsys_timestamp_t;
 605
 606 #define EFSYS_TIMESTAMP(_usp)                                           \
 607         do {                                                            \
 608                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
 609                         rte_get_timer_hz();                             \
 610                 _NOTE(CONSTANTCONDITION);                               \
 611         } while (B_FALSE)
 612
 613 /* KMEM */
 614
 615 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
 616         do {                                                            \
 617                 (_esip) = (_esip);                                      \
 618                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
 619                 _NOTE(CONSTANTCONDITION);                               \
 620         } while (B_FALSE)
 621
 622 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
 623         do {                                                            \
 624                 (void)(_esip);                                          \
 625                 (void)(_size);                                          \
 626                 rte_free((_p));                                         \
 627                 _NOTE(CONSTANTCONDITION);                               \
 628         } while (B_FALSE)
 629
 630 /* LOCK */
 631
 632 typedef rte_spinlock_t efsys_lock_t;
 633
 634 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
 635         rte_spinlock_init((_eslp))
 636 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
 637 #define SFC_EFSYS_LOCK(_eslp)                           \
 638         rte_spinlock_lock((_eslp))
 639 #define SFC_EFSYS_UNLOCK(_eslp)                         \
 640         rte_spinlock_unlock((_eslp))
 641 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
 642         SFC_EFX_ASSERT(rte_spinlock_is_locked((_eslp)))
 643
 644 typedef int efsys_lock_state_t;
 645
 646 #define EFSYS_LOCK_MAGIC        0x000010c4
 647
 648 #define EFSYS_LOCK(_lockp, _state)                              \
 649         do {                                                    \
 650                 SFC_EFSYS_LOCK(_lockp);                         \
 651                 (_state) = EFSYS_LOCK_MAGIC;                    \
 652                 _NOTE(CONSTANTCONDITION);                       \
 653         } while (B_FALSE)
 654
 655 #define EFSYS_UNLOCK(_lockp, _state)                            \
 656         do {                                                    \
 657                 SFC_EFX_ASSERT((_state) == EFSYS_LOCK_MAGIC);   \
 658                 SFC_EFSYS_UNLOCK(_lockp);                       \
 659                 _NOTE(CONSTANTCONDITION);                       \
 660         } while (B_FALSE)
 661
 662 /* STAT */
 663
 664 typedef uint64_t        efsys_stat_t;
 665
 666 #define EFSYS_STAT_INCR(_knp, _delta)                           \
 667         do {                                                    \
 668                 *(_knp) += (_delta);                            \
 669                 _NOTE(CONSTANTCONDITION);                       \
 670         } while (B_FALSE)
 671
 672 #define EFSYS_STAT_DECR(_knp, _delta)                           \
 673         do {                                                    \
 674                 *(_knp) -= (_delta);                            \
 675                 _NOTE(CONSTANTCONDITION);                       \
 676         } while (B_FALSE)
 677
 678 #define EFSYS_STAT_SET(_knp, _val)                              \
 679         do {                                                    \
 680                 *(_knp) = (_val);                               \
 681                 _NOTE(CONSTANTCONDITION);                       \
 682         } while (B_FALSE)
 683
 684 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
 685         do {                                                    \
 686                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
 687                 _NOTE(CONSTANTCONDITION);                       \
 688         } while (B_FALSE)
 689
 690 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
 691         do {                                                    \
 692                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
 693                 _NOTE(CONSTANTCONDITION);                       \
 694         } while (B_FALSE)
 695
 696 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
 697         do {                                                            \
 698                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 699                 _NOTE(CONSTANTCONDITION);                               \
 700         } while (B_FALSE)
 701
 702 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
 703         do {                                                            \
 704                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 705                 _NOTE(CONSTANTCONDITION);                               \
 706         } while (B_FALSE)
 707
 708 /* ERR */
 709
 710 #if EFSYS_OPT_DECODE_INTR_FATAL
 711 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
 712         do {                                                            \
 713                 (void)(_esip);                                          \
 714                 SFC_EFX_LOG(ERR, "FATAL ERROR #%u (0x%08x%08x)",        \
 715                         (_code), (_dword0), (_dword1));                 \
 716                 _NOTE(CONSTANTCONDITION);                               \
 717         } while (B_FALSE)
 718 #endif
 719
 720 /* ASSERT */
 721
 722 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
 723  * so we re-implement it here
 724  */
 725 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 726 #define EFSYS_ASSERT(_exp)                                              \
 727         do {                                                            \
 728                 if (unlikely(!(_exp)))                                  \
 729                         rte_panic("line %d\tassert \"%s\" failed\n",    \
 730                                   __LINE__, (#_exp));                   \
 731         } while (0)
 732 #else
 733 #define EFSYS_ASSERT(_exp)              (void)(_exp)
 734 #endif
 735
 736 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
 737
 738 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
 739 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
 740 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
 741
 742 /* ROTATE */
 743
 744 #define EFSYS_HAS_ROTL_DWORD    0
 745
 746 /* PCI */
 747
 748 typedef struct efsys_pci_config_s {
 749         struct rte_pci_device   *espc_dev;
 750 } efsys_pci_config_t;
 751
 752 #ifdef __cplusplus
 753 }
 754 #endif
 755
 756 #endif  /* _SFC_COMMON_EFSYS_H */