drivers/common/sfc_efx/efsys.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright(c) 2019-2020 Xilinx, Inc.
   4  * Copyright(c) 2016-2019 Solarflare Communications Inc.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #ifndef _SFC_COMMON_EFSYS_H
  11 #define _SFC_COMMON_EFSYS_H
  12
  13 #include <stdbool.h>
  14
  15 #include <rte_spinlock.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_debug.h>
  18 #include <rte_memzone.h>
  19 #include <rte_memory.h>
  20 #include <rte_memcpy.h>
  21 #include <rte_cycles.h>
  22 #include <rte_prefetch.h>
  23 #include <rte_common.h>
  24 #include <rte_malloc.h>
  25 #include <rte_log.h>
  26 #include <rte_io.h>
  27
  28 #include "sfc_efx_debug.h"
  29 #include "sfc_efx_log.h"
  30
  31 #ifdef __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 #define LIBEFX_API              __rte_internal
  36
  37 /* No specific decorations required since functions are local by default */
  38 #define LIBEFX_INTERNAL
  39
  40 #define EFSYS_HAS_UINT64 1
  41 #define EFSYS_USE_UINT64 1
  42 #define EFSYS_HAS_SSE2_M128 1
  43
  44 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
  45 #define EFSYS_IS_BIG_ENDIAN 1
  46 #define EFSYS_IS_LITTLE_ENDIAN 0
  47 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
  48 #define EFSYS_IS_BIG_ENDIAN 0
  49 #define EFSYS_IS_LITTLE_ENDIAN 1
  50 #else
  51 #error "Cannot determine system endianness"
  52 #endif
  53
  54
  55 typedef bool boolean_t;
  56
  57 #ifndef B_FALSE
  58 #define B_FALSE false
  59 #endif
  60 #ifndef B_TRUE
  61 #define B_TRUE  true
  62 #endif
  63
  64 /*
  65  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
  66  * expression allowed only inside a function, but MAX() is used as
  67  * a number of elements in array.
  68  */
  69 #ifndef MAX
  70 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
  71 #endif
  72 #ifndef MIN
  73 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
  74 #endif
  75
  76 #ifndef ISP2
  77 #define ISP2(x)                 rte_is_power_of_2(x)
  78 #endif
  79
  80 #define ENOTACTIVE      ENOTCONN
  81
  82 static inline void
  83 prefetch_read_many(const volatile void *addr)
  84 {
  85         rte_prefetch0(addr);
  86 }
  87
  88 static inline void
  89 prefetch_read_once(const volatile void *addr)
  90 {
  91         rte_prefetch_non_temporal(addr);
  92 }
  93
  94 /* Code inclusion options */
  95
  96
  97 #define EFSYS_OPT_NAMES 1
  98
  99 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
 100 #define EFSYS_OPT_SIENA 0
 101 /* Enable SFN7xxx support */
 102 #define EFSYS_OPT_HUNTINGTON 1
 103 /* Enable SFN8xxx support */
 104 #define EFSYS_OPT_MEDFORD 1
 105 /* Enable SFN2xxx support */
 106 #define EFSYS_OPT_MEDFORD2 1
 107 /* Disable Riverhead support */
 108 #define EFSYS_OPT_RIVERHEAD 0
 109
 110 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 111 #define EFSYS_OPT_CHECK_REG 1
 112 #else
 113 #define EFSYS_OPT_CHECK_REG 0
 114 #endif
 115
 116 /* MCDI is required for SFN7xxx and SFN8xx */
 117 #define EFSYS_OPT_MCDI 1
 118 #define EFSYS_OPT_MCDI_LOGGING 1
 119 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
 120
 121 #define EFSYS_OPT_MAC_STATS 1
 122
 123 #define EFSYS_OPT_LOOPBACK 1
 124
 125 #define EFSYS_OPT_MON_MCDI 0
 126 #define EFSYS_OPT_MON_STATS 0
 127
 128 #define EFSYS_OPT_PHY_STATS 0
 129 #define EFSYS_OPT_BIST 0
 130 #define EFSYS_OPT_PHY_LED_CONTROL 0
 131 #define EFSYS_OPT_PHY_FLAGS 0
 132
 133 #define EFSYS_OPT_VPD 0
 134 #define EFSYS_OPT_NVRAM 0
 135 #define EFSYS_OPT_BOOTCFG 0
 136 #define EFSYS_OPT_IMAGE_LAYOUT 0
 137
 138 #define EFSYS_OPT_DIAG 0
 139 #define EFSYS_OPT_RX_SCALE 1
 140 #define EFSYS_OPT_QSTATS 0
 141 /* Filters support is required for SFN7xxx and SFN8xx */
 142 #define EFSYS_OPT_FILTER 1
 143 #define EFSYS_OPT_RX_SCATTER 0
 144
 145 #define EFSYS_OPT_EV_PREFETCH 0
 146
 147 #define EFSYS_OPT_DECODE_INTR_FATAL 0
 148
 149 #define EFSYS_OPT_LICENSING 0
 150
 151 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
 152
 153 #define EFSYS_OPT_RX_PACKED_STREAM 0
 154
 155 #define EFSYS_OPT_RX_ES_SUPER_BUFFER 1
 156
 157 #define EFSYS_OPT_TUNNEL 1
 158
 159 #define EFSYS_OPT_FW_SUBVARIANT_AWARE 1
 160
 161 #define EFSYS_OPT_EVB 0
 162
 163 #define EFSYS_OPT_MCDI_PROXY_AUTH_SERVER 0
 164
 165 #define EFSYS_OPT_PCI 0
 166
 167 /* ID */
 168
 169 typedef struct __efsys_identifier_s efsys_identifier_t;
 170
 171
 172 #define EFSYS_PROBE(_name)                                              \
 173         do { } while (0)
 174
 175 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
 176         do { } while (0)
 177
 178 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
 179         do { } while (0)
 180
 181 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
 182                      _type3, _arg3)                                     \
 183         do { } while (0)
 184
 185 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
 186                      _type3, _arg3, _type4, _arg4)                      \
 187         do { } while (0)
 188
 189 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
 190                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
 191         do { } while (0)
 192
 193 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
 194                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 195                      _type6, _arg6)                                     \
 196         do { } while (0)
 197
 198 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
 199                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 200                      _type6, _arg6, _type7, _arg7)                      \
 201         do { } while (0)
 202
 203
 204 /* DMA */
 205
 206 typedef rte_iova_t efsys_dma_addr_t;
 207
 208 typedef struct efsys_mem_s {
 209         const struct rte_memzone        *esm_mz;
 210         /*
 211          * Ideally it should have volatile qualifier to denote that
 212          * the memory may be updated by someone else. However, it adds
 213          * qualifier discard warnings when the pointer or its derivative
 214          * is passed to memset() or rte_mov16().
 215          * So, skip the qualifier here, but make sure that it is added
 216          * below in access macros.
 217          */
 218         void                            *esm_base;
 219         efsys_dma_addr_t                esm_addr;
 220 } efsys_mem_t;
 221
 222
 223 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
 224         do {                                                            \
 225                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
 226                                                                         \
 227                 _NOTE(CONSTANTCONDITION);                               \
 228         } while (B_FALSE)
 229
 230 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
 231         do {                                                            \
 232                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 233                 volatile uint32_t *_addr;                               \
 234                                                                         \
 235                 _NOTE(CONSTANTCONDITION);                               \
 236                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 237                                                 sizeof(efx_dword_t)));  \
 238                                                                         \
 239                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 240                 (_edp)->ed_u32[0] = _addr[0];                           \
 241                                                                         \
 242                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
 243                                          uint32_t, (_edp)->ed_u32[0]);  \
 244                                                                         \
 245                 _NOTE(CONSTANTCONDITION);                               \
 246         } while (B_FALSE)
 247
 248 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
 249         do {                                                            \
 250                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 251                 volatile uint64_t *_addr;                               \
 252                                                                         \
 253                 _NOTE(CONSTANTCONDITION);                               \
 254                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 255                                                 sizeof(efx_qword_t)));  \
 256                                                                         \
 257                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 258                 (_eqp)->eq_u64[0] = _addr[0];                           \
 259                                                                         \
 260                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
 261                                          uint32_t, (_eqp)->eq_u32[1],   \
 262                                          uint32_t, (_eqp)->eq_u32[0]);  \
 263                                                                         \
 264                 _NOTE(CONSTANTCONDITION);                               \
 265         } while (B_FALSE)
 266
 267 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
 268         do {                                                            \
 269                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 270                 volatile __m128i *_addr;                                \
 271                                                                         \
 272                 _NOTE(CONSTANTCONDITION);                               \
 273                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 274                                                 sizeof(efx_oword_t)));  \
 275                                                                         \
 276                 _addr = (volatile __m128i *)(_base + (_offset));        \
 277                 (_eop)->eo_u128[0] = _addr[0];                          \
 278                                                                         \
 279                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
 280                                          uint32_t, (_eop)->eo_u32[3],   \
 281                                          uint32_t, (_eop)->eo_u32[2],   \
 282                                          uint32_t, (_eop)->eo_u32[1],   \
 283                                          uint32_t, (_eop)->eo_u32[0]);  \
 284                                                                         \
 285                 _NOTE(CONSTANTCONDITION);                               \
 286         } while (B_FALSE)
 287
 288
 289 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
 290         do {                                                            \
 291                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 292                 volatile uint32_t *_addr;                               \
 293                                                                         \
 294                 _NOTE(CONSTANTCONDITION);                               \
 295                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 296                                                 sizeof(efx_dword_t)));  \
 297                                                                         \
 298                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
 299                                          uint32_t, (_edp)->ed_u32[0]);  \
 300                                                                         \
 301                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 302                 _addr[0] = (_edp)->ed_u32[0];                           \
 303                                                                         \
 304                 _NOTE(CONSTANTCONDITION);                               \
 305         } while (B_FALSE)
 306
 307 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
 308         do {                                                            \
 309                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 310                 volatile uint64_t *_addr;                               \
 311                                                                         \
 312                 _NOTE(CONSTANTCONDITION);                               \
 313                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 314                                                 sizeof(efx_qword_t)));  \
 315                                                                         \
 316                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
 317                                          uint32_t, (_eqp)->eq_u32[1],   \
 318                                          uint32_t, (_eqp)->eq_u32[0]);  \
 319                                                                         \
 320                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 321                 _addr[0] = (_eqp)->eq_u64[0];                           \
 322                                                                         \
 323                 _NOTE(CONSTANTCONDITION);                               \
 324         } while (B_FALSE)
 325
 326 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
 327         do {                                                            \
 328                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 329                 volatile __m128i *_addr;                                \
 330                                                                         \
 331                 _NOTE(CONSTANTCONDITION);                               \
 332                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 333                                                 sizeof(efx_oword_t)));  \
 334                                                                         \
 335                                                                         \
 336                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
 337                                          uint32_t, (_eop)->eo_u32[3],   \
 338                                          uint32_t, (_eop)->eo_u32[2],   \
 339                                          uint32_t, (_eop)->eo_u32[1],   \
 340                                          uint32_t, (_eop)->eo_u32[0]);  \
 341                                                                         \
 342                 _addr = (volatile __m128i *)(_base + (_offset));        \
 343                 _addr[0] = (_eop)->eo_u128[0];                          \
 344                                                                         \
 345                 _NOTE(CONSTANTCONDITION);                               \
 346         } while (B_FALSE)
 347
 348
 349 #define EFSYS_MEM_SIZE(_esmp)                                           \
 350         ((_esmp)->esm_mz->len)
 351
 352 #define EFSYS_MEM_ADDR(_esmp)                                           \
 353         ((_esmp)->esm_addr)
 354
 355 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
 356         ((_esmp)->esm_base == NULL)
 357
 358 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
 359         do {                                                            \
 360                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 361                                                                         \
 362                 rte_prefetch0(_base + (_offset));                       \
 363         } while (0)
 364
 365
 366 /* BAR */
 367
 368 typedef struct efsys_bar_s {
 369         rte_spinlock_t          esb_lock;
 370         int                     esb_rid;
 371         struct rte_pci_device   *esb_dev;
 372         /*
 373          * Ideally it should have volatile qualifier to denote that
 374          * the memory may be updated by someone else. However, it adds
 375          * qualifier discard warnings when the pointer or its derivative
 376          * is passed to memset() or rte_mov16().
 377          * So, skip the qualifier here, but make sure that it is added
 378          * below in access macros.
 379          */
 380         void                    *esb_base;
 381 } efsys_bar_t;
 382
 383 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
 384         do {                                                            \
 385                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
 386                 _NOTE(CONSTANTCONDITION);                               \
 387         } while (B_FALSE)
 388 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
 389 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
 390 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
 391
 392 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
 393         do {                                                            \
 394                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 395                 volatile uint32_t *_addr;                               \
 396                                                                         \
 397                 _NOTE(CONSTANTCONDITION);                               \
 398                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 399                                                 sizeof(efx_dword_t)));  \
 400                 _NOTE(CONSTANTCONDITION);                               \
 401                 if (_lock)                                              \
 402                         SFC_BAR_LOCK(_esbp);                            \
 403                                                                         \
 404                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 405                 rte_rmb();                                              \
 406                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
 407                                                                         \
 408                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
 409                                          uint32_t, (_edp)->ed_u32[0]);  \
 410                                                                         \
 411                 _NOTE(CONSTANTCONDITION);                               \
 412                 if (_lock)                                              \
 413                         SFC_BAR_UNLOCK(_esbp);                          \
 414                 _NOTE(CONSTANTCONDITION);                               \
 415         } while (B_FALSE)
 416
 417 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
 418         do {                                                            \
 419                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 420                 volatile uint64_t *_addr;                               \
 421                                                                         \
 422                 _NOTE(CONSTANTCONDITION);                               \
 423                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 424                                                 sizeof(efx_qword_t)));  \
 425                                                                         \
 426                 SFC_BAR_LOCK(_esbp);                                    \
 427                                                                         \
 428                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 429                 rte_rmb();                                              \
 430                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
 431                                                                         \
 432                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
 433                                          uint32_t, (_eqp)->eq_u32[1],   \
 434                                          uint32_t, (_eqp)->eq_u32[0]);  \
 435                                                                         \
 436                 SFC_BAR_UNLOCK(_esbp);                                  \
 437                 _NOTE(CONSTANTCONDITION);                               \
 438         } while (B_FALSE)
 439
 440 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
 441         do {                                                            \
 442                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 443                 volatile __m128i *_addr;                                \
 444                                                                         \
 445                 _NOTE(CONSTANTCONDITION);                               \
 446                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 447                                                 sizeof(efx_oword_t)));  \
 448                                                                         \
 449                 _NOTE(CONSTANTCONDITION);                               \
 450                 if (_lock)                                              \
 451                         SFC_BAR_LOCK(_esbp);                            \
 452                                                                         \
 453                 _addr = (volatile __m128i *)(_base + (_offset));        \
 454                 rte_rmb();                                              \
 455                 /* There is no rte_read128_relaxed() yet */             \
 456                 (_eop)->eo_u128[0] = _addr[0];                          \
 457                                                                         \
 458                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
 459                                          uint32_t, (_eop)->eo_u32[3],   \
 460                                          uint32_t, (_eop)->eo_u32[2],   \
 461                                          uint32_t, (_eop)->eo_u32[1],   \
 462                                          uint32_t, (_eop)->eo_u32[0]);  \
 463                                                                         \
 464                 _NOTE(CONSTANTCONDITION);                               \
 465                 if (_lock)                                              \
 466                         SFC_BAR_UNLOCK(_esbp);                          \
 467                 _NOTE(CONSTANTCONDITION);                               \
 468         } while (B_FALSE)
 469
 470
 471 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
 472         do {                                                            \
 473                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 474                 volatile uint32_t *_addr;                               \
 475                                                                         \
 476                 _NOTE(CONSTANTCONDITION);                               \
 477                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 478                                                 sizeof(efx_dword_t)));  \
 479                                                                         \
 480                 _NOTE(CONSTANTCONDITION);                               \
 481                 if (_lock)                                              \
 482                         SFC_BAR_LOCK(_esbp);                            \
 483                                                                         \
 484                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
 485                                          uint32_t, (_edp)->ed_u32[0]);  \
 486                                                                         \
 487                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 488                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
 489                 rte_wmb();                                              \
 490                                                                         \
 491                 _NOTE(CONSTANTCONDITION);                               \
 492                 if (_lock)                                              \
 493                         SFC_BAR_UNLOCK(_esbp);                          \
 494                 _NOTE(CONSTANTCONDITION);                               \
 495         } while (B_FALSE)
 496
 497 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
 498         do {                                                            \
 499                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 500                 volatile uint64_t *_addr;                               \
 501                                                                         \
 502                 _NOTE(CONSTANTCONDITION);                               \
 503                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 504                                                 sizeof(efx_qword_t)));  \
 505                                                                         \
 506                 SFC_BAR_LOCK(_esbp);                                    \
 507                                                                         \
 508                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
 509                                          uint32_t, (_eqp)->eq_u32[1],   \
 510                                          uint32_t, (_eqp)->eq_u32[0]);  \
 511                                                                         \
 512                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 513                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
 514                 rte_wmb();                                              \
 515                                                                         \
 516                 SFC_BAR_UNLOCK(_esbp);                                  \
 517                 _NOTE(CONSTANTCONDITION);                               \
 518         } while (B_FALSE)
 519
 520 /*
 521  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
 522  * (required by PIO hardware).
 523  *
 524  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
 525  * write-combined memory mapped to user-land, so just abort if used.
 526  */
 527 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
 528         do {                                                            \
 529                 rte_panic("Write-combined BAR access not supported");   \
 530         } while (B_FALSE)
 531
 532 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
 533         do {                                                            \
 534                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 535                 volatile __m128i *_addr;                                \
 536                                                                         \
 537                 _NOTE(CONSTANTCONDITION);                               \
 538                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 539                                                 sizeof(efx_oword_t)));  \
 540                                                                         \
 541                 _NOTE(CONSTANTCONDITION);                               \
 542                 if (_lock)                                              \
 543                         SFC_BAR_LOCK(_esbp);                            \
 544                                                                         \
 545                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
 546                                          uint32_t, (_eop)->eo_u32[3],   \
 547                                          uint32_t, (_eop)->eo_u32[2],   \
 548                                          uint32_t, (_eop)->eo_u32[1],   \
 549                                          uint32_t, (_eop)->eo_u32[0]);  \
 550                                                                         \
 551                 _addr = (volatile __m128i *)(_base + (_offset));        \
 552                 /* There is no rte_write128_relaxed() yet */            \
 553                 _addr[0] = (_eop)->eo_u128[0];                          \
 554                 rte_wmb();                                              \
 555                                                                         \
 556                 _NOTE(CONSTANTCONDITION);                               \
 557                 if (_lock)                                              \
 558                         SFC_BAR_UNLOCK(_esbp);                          \
 559                 _NOTE(CONSTANTCONDITION);                               \
 560         } while (B_FALSE)
 561
 562 /* Use the standard octo-word write for doorbell writes */
 563 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
 564         do {                                                            \
 565                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
 566                 _NOTE(CONSTANTCONDITION);                               \
 567         } while (B_FALSE)
 568
 569 /* SPIN */
 570
 571 #define EFSYS_SPIN(_us)                                                 \
 572         do {                                                            \
 573                 rte_delay_us(_us);                                      \
 574                 _NOTE(CONSTANTCONDITION);                               \
 575         } while (B_FALSE)
 576
 577 #define EFSYS_SLEEP EFSYS_SPIN
 578
 579 /* BARRIERS */
 580
 581 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
 582 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
 583
 584 /* DMA SYNC */
 585
 586 /*
 587  * DPDK does not provide any DMA syncing API, and no PMD drivers
 588  * have any traces of explicit DMA syncing.
 589  * DMA mapping is assumed to be coherent.
 590  */
 591
 592 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
 593
 594 /* Just avoid store and compiler (impliciltly) reordering */
 595 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
 596
 597 /* TIMESTAMP */
 598
 599 typedef uint64_t efsys_timestamp_t;
 600
 601 #define EFSYS_TIMESTAMP(_usp)                                           \
 602         do {                                                            \
 603                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
 604                         rte_get_timer_hz();                             \
 605                 _NOTE(CONSTANTCONDITION);                               \
 606         } while (B_FALSE)
 607
 608 /* KMEM */
 609
 610 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
 611         do {                                                            \
 612                 (_esip) = (_esip);                                      \
 613                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
 614                 _NOTE(CONSTANTCONDITION);                               \
 615         } while (B_FALSE)
 616
 617 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
 618         do {                                                            \
 619                 (void)(_esip);                                          \
 620                 (void)(_size);                                          \
 621                 rte_free((_p));                                         \
 622                 _NOTE(CONSTANTCONDITION);                               \
 623         } while (B_FALSE)
 624
 625 /* LOCK */
 626
 627 typedef rte_spinlock_t efsys_lock_t;
 628
 629 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
 630         rte_spinlock_init((_eslp))
 631 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
 632 #define SFC_EFSYS_LOCK(_eslp)                           \
 633         rte_spinlock_lock((_eslp))
 634 #define SFC_EFSYS_UNLOCK(_eslp)                         \
 635         rte_spinlock_unlock((_eslp))
 636 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
 637         SFC_EFX_ASSERT(rte_spinlock_is_locked((_eslp)))
 638
 639 typedef int efsys_lock_state_t;
 640
 641 #define EFSYS_LOCK_MAGIC        0x000010c4
 642
 643 #define EFSYS_LOCK(_lockp, _state)                              \
 644         do {                                                    \
 645                 SFC_EFSYS_LOCK(_lockp);                         \
 646                 (_state) = EFSYS_LOCK_MAGIC;                    \
 647                 _NOTE(CONSTANTCONDITION);                       \
 648         } while (B_FALSE)
 649
 650 #define EFSYS_UNLOCK(_lockp, _state)                            \
 651         do {                                                    \
 652                 SFC_EFX_ASSERT((_state) == EFSYS_LOCK_MAGIC);   \
 653                 SFC_EFSYS_UNLOCK(_lockp);                       \
 654                 _NOTE(CONSTANTCONDITION);                       \
 655         } while (B_FALSE)
 656
 657 /* STAT */
 658
 659 typedef uint64_t        efsys_stat_t;
 660
 661 #define EFSYS_STAT_INCR(_knp, _delta)                           \
 662         do {                                                    \
 663                 *(_knp) += (_delta);                            \
 664                 _NOTE(CONSTANTCONDITION);                       \
 665         } while (B_FALSE)
 666
 667 #define EFSYS_STAT_DECR(_knp, _delta)                           \
 668         do {                                                    \
 669                 *(_knp) -= (_delta);                            \
 670                 _NOTE(CONSTANTCONDITION);                       \
 671         } while (B_FALSE)
 672
 673 #define EFSYS_STAT_SET(_knp, _val)                              \
 674         do {                                                    \
 675                 *(_knp) = (_val);                               \
 676                 _NOTE(CONSTANTCONDITION);                       \
 677         } while (B_FALSE)
 678
 679 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
 680         do {                                                    \
 681                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
 682                 _NOTE(CONSTANTCONDITION);                       \
 683         } while (B_FALSE)
 684
 685 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
 686         do {                                                    \
 687                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
 688                 _NOTE(CONSTANTCONDITION);                       \
 689         } while (B_FALSE)
 690
 691 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
 692         do {                                                            \
 693                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 694                 _NOTE(CONSTANTCONDITION);                               \
 695         } while (B_FALSE)
 696
 697 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
 698         do {                                                            \
 699                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 700                 _NOTE(CONSTANTCONDITION);                               \
 701         } while (B_FALSE)
 702
 703 /* ERR */
 704
 705 #if EFSYS_OPT_DECODE_INTR_FATAL
 706 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
 707         do {                                                            \
 708                 (void)(_esip);                                          \
 709                 SFC_EFX_LOG(ERR, "FATAL ERROR #%u (0x%08x%08x)",        \
 710                         (_code), (_dword0), (_dword1));                 \
 711                 _NOTE(CONSTANTCONDITION);                               \
 712         } while (B_FALSE)
 713 #endif
 714
 715 /* ASSERT */
 716
 717 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
 718  * so we re-implement it here
 719  */
 720 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 721 #define EFSYS_ASSERT(_exp)                                              \
 722         do {                                                            \
 723                 if (unlikely(!(_exp)))                                  \
 724                         rte_panic("line %d\tassert \"%s\" failed\n",    \
 725                                   __LINE__, (#_exp));                   \
 726         } while (0)
 727 #else
 728 #define EFSYS_ASSERT(_exp)              (void)(_exp)
 729 #endif
 730
 731 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
 732
 733 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
 734 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
 735 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
 736
 737 /* ROTATE */
 738
 739 #define EFSYS_HAS_ROTL_DWORD    0
 740
 741 #ifdef __cplusplus
 742 }
 743 #endif
 744
 745 #endif  /* _SFC_COMMON_EFSYS_H */