drivers/common/sfc_efx/efsys.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright(c) 2019-2020 Xilinx, Inc.
   4  * Copyright(c) 2016-2019 Solarflare Communications Inc.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #ifndef _SFC_COMMON_EFSYS_H
  11 #define _SFC_COMMON_EFSYS_H
  12
  13 #include <stdbool.h>
  14
  15 #include <rte_spinlock.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_debug.h>
  18 #include <rte_memzone.h>
  19 #include <rte_memory.h>
  20 #include <rte_memcpy.h>
  21 #include <rte_cycles.h>
  22 #include <rte_prefetch.h>
  23 #include <rte_common.h>
  24 #include <rte_malloc.h>
  25 #include <rte_log.h>
  26 #include <rte_io.h>
  27
  28 #include "sfc_efx_debug.h"
  29 #include "sfc_efx_log.h"
  30
  31 #ifdef __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 #define LIBEFX_API              __rte_internal
  36
  37 /* No specific decorations required since functions are local by default */
  38 #define LIBEFX_INTERNAL
  39
  40 #define EFSYS_HAS_UINT64 1
  41 #define EFSYS_USE_UINT64 1
  42 #define EFSYS_HAS_SSE2_M128 1
  43
  44 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
  45 #define EFSYS_IS_BIG_ENDIAN 1
  46 #define EFSYS_IS_LITTLE_ENDIAN 0
  47 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
  48 #define EFSYS_IS_BIG_ENDIAN 0
  49 #define EFSYS_IS_LITTLE_ENDIAN 1
  50 #else
  51 #error "Cannot determine system endianness"
  52 #endif
  53
  54
  55 typedef bool boolean_t;
  56
  57 #ifndef B_FALSE
  58 #define B_FALSE false
  59 #endif
  60 #ifndef B_TRUE
  61 #define B_TRUE  true
  62 #endif
  63
  64 /*
  65  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
  66  * expression allowed only inside a function, but MAX() is used as
  67  * a number of elements in array.
  68  */
  69 #ifndef MAX
  70 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
  71 #endif
  72 #ifndef MIN
  73 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
  74 #endif
  75
  76 #ifndef ISP2
  77 #define ISP2(x)                 rte_is_power_of_2(x)
  78 #endif
  79
  80 #define ENOTACTIVE      ENOTCONN
  81
  82 static inline void
  83 prefetch_read_many(const volatile void *addr)
  84 {
  85         rte_prefetch0(addr);
  86 }
  87
  88 static inline void
  89 prefetch_read_once(const volatile void *addr)
  90 {
  91         rte_prefetch_non_temporal(addr);
  92 }
  93
  94 /* Code inclusion options */
  95
  96
  97 #define EFSYS_OPT_NAMES 1
  98
  99 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
 100 #define EFSYS_OPT_SIENA 0
 101 /* Enable SFN7xxx support */
 102 #define EFSYS_OPT_HUNTINGTON 1
 103 /* Enable SFN8xxx support */
 104 #define EFSYS_OPT_MEDFORD 1
 105 /* Enable SFN2xxx support */
 106 #define EFSYS_OPT_MEDFORD2 1
 107 /* Disable Riverhead support */
 108 #define EFSYS_OPT_RIVERHEAD 0
 109
 110 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 111 #define EFSYS_OPT_CHECK_REG 1
 112 #else
 113 #define EFSYS_OPT_CHECK_REG 0
 114 #endif
 115
 116 /* MCDI is required for SFN7xxx and SFN8xx */
 117 #define EFSYS_OPT_MCDI 1
 118 #define EFSYS_OPT_MCDI_LOGGING 1
 119 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
 120
 121 #define EFSYS_OPT_MAC_STATS 1
 122
 123 #define EFSYS_OPT_LOOPBACK 1
 124
 125 #define EFSYS_OPT_MON_MCDI 0
 126 #define EFSYS_OPT_MON_STATS 0
 127
 128 #define EFSYS_OPT_PHY_STATS 0
 129 #define EFSYS_OPT_BIST 0
 130 #define EFSYS_OPT_PHY_LED_CONTROL 0
 131 #define EFSYS_OPT_PHY_FLAGS 0
 132
 133 #define EFSYS_OPT_VPD 0
 134 #define EFSYS_OPT_NVRAM 0
 135 #define EFSYS_OPT_BOOTCFG 0
 136 #define EFSYS_OPT_IMAGE_LAYOUT 0
 137
 138 #define EFSYS_OPT_DIAG 0
 139 #define EFSYS_OPT_RX_SCALE 1
 140 #define EFSYS_OPT_QSTATS 0
 141 /* Filters support is required for SFN7xxx and SFN8xx */
 142 #define EFSYS_OPT_FILTER 1
 143 #define EFSYS_OPT_RX_SCATTER 0
 144
 145 #define EFSYS_OPT_EV_EXTENDED_WIDTH 0
 146 #define EFSYS_OPT_EV_PREFETCH 0
 147
 148 #define EFSYS_OPT_DECODE_INTR_FATAL 0
 149
 150 #define EFSYS_OPT_LICENSING 0
 151
 152 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
 153
 154 #define EFSYS_OPT_RX_PACKED_STREAM 0
 155
 156 #define EFSYS_OPT_RX_ES_SUPER_BUFFER 1
 157
 158 #define EFSYS_OPT_TUNNEL 1
 159
 160 #define EFSYS_OPT_FW_SUBVARIANT_AWARE 1
 161
 162 #define EFSYS_OPT_EVB 0
 163
 164 #define EFSYS_OPT_MCDI_PROXY_AUTH_SERVER 0
 165
 166 #define EFSYS_OPT_PCI 0
 167
 168 /* ID */
 169
 170 typedef struct __efsys_identifier_s efsys_identifier_t;
 171
 172
 173 #define EFSYS_PROBE(_name)                                              \
 174         do { } while (0)
 175
 176 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
 177         do { } while (0)
 178
 179 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
 180         do { } while (0)
 181
 182 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
 183                      _type3, _arg3)                                     \
 184         do { } while (0)
 185
 186 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
 187                      _type3, _arg3, _type4, _arg4)                      \
 188         do { } while (0)
 189
 190 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
 191                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
 192         do { } while (0)
 193
 194 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
 195                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 196                      _type6, _arg6)                                     \
 197         do { } while (0)
 198
 199 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
 200                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 201                      _type6, _arg6, _type7, _arg7)                      \
 202         do { } while (0)
 203
 204
 205 /* DMA */
 206
 207 typedef rte_iova_t efsys_dma_addr_t;
 208
 209 typedef struct efsys_mem_s {
 210         const struct rte_memzone        *esm_mz;
 211         /*
 212          * Ideally it should have volatile qualifier to denote that
 213          * the memory may be updated by someone else. However, it adds
 214          * qualifier discard warnings when the pointer or its derivative
 215          * is passed to memset() or rte_mov16().
 216          * So, skip the qualifier here, but make sure that it is added
 217          * below in access macros.
 218          */
 219         void                            *esm_base;
 220         efsys_dma_addr_t                esm_addr;
 221 } efsys_mem_t;
 222
 223
 224 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
 225         do {                                                            \
 226                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
 227                                                                         \
 228                 _NOTE(CONSTANTCONDITION);                               \
 229         } while (B_FALSE)
 230
 231 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
 232         do {                                                            \
 233                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 234                 volatile uint32_t *_addr;                               \
 235                                                                         \
 236                 _NOTE(CONSTANTCONDITION);                               \
 237                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 238                                                 sizeof(efx_dword_t)));  \
 239                                                                         \
 240                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 241                 (_edp)->ed_u32[0] = _addr[0];                           \
 242                                                                         \
 243                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
 244                                          uint32_t, (_edp)->ed_u32[0]);  \
 245                                                                         \
 246                 _NOTE(CONSTANTCONDITION);                               \
 247         } while (B_FALSE)
 248
 249 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
 250         do {                                                            \
 251                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 252                 volatile uint64_t *_addr;                               \
 253                                                                         \
 254                 _NOTE(CONSTANTCONDITION);                               \
 255                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 256                                                 sizeof(efx_qword_t)));  \
 257                                                                         \
 258                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 259                 (_eqp)->eq_u64[0] = _addr[0];                           \
 260                                                                         \
 261                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
 262                                          uint32_t, (_eqp)->eq_u32[1],   \
 263                                          uint32_t, (_eqp)->eq_u32[0]);  \
 264                                                                         \
 265                 _NOTE(CONSTANTCONDITION);                               \
 266         } while (B_FALSE)
 267
 268 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
 269         do {                                                            \
 270                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 271                 volatile __m128i *_addr;                                \
 272                                                                         \
 273                 _NOTE(CONSTANTCONDITION);                               \
 274                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 275                                                 sizeof(efx_oword_t)));  \
 276                                                                         \
 277                 _addr = (volatile __m128i *)(_base + (_offset));        \
 278                 (_eop)->eo_u128[0] = _addr[0];                          \
 279                                                                         \
 280                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
 281                                          uint32_t, (_eop)->eo_u32[3],   \
 282                                          uint32_t, (_eop)->eo_u32[2],   \
 283                                          uint32_t, (_eop)->eo_u32[1],   \
 284                                          uint32_t, (_eop)->eo_u32[0]);  \
 285                                                                         \
 286                 _NOTE(CONSTANTCONDITION);                               \
 287         } while (B_FALSE)
 288
 289
 290 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
 291         do {                                                            \
 292                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 293                 volatile uint32_t *_addr;                               \
 294                                                                         \
 295                 _NOTE(CONSTANTCONDITION);                               \
 296                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 297                                                 sizeof(efx_dword_t)));  \
 298                                                                         \
 299                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
 300                                          uint32_t, (_edp)->ed_u32[0]);  \
 301                                                                         \
 302                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 303                 _addr[0] = (_edp)->ed_u32[0];                           \
 304                                                                         \
 305                 _NOTE(CONSTANTCONDITION);                               \
 306         } while (B_FALSE)
 307
 308 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
 309         do {                                                            \
 310                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 311                 volatile uint64_t *_addr;                               \
 312                                                                         \
 313                 _NOTE(CONSTANTCONDITION);                               \
 314                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 315                                                 sizeof(efx_qword_t)));  \
 316                                                                         \
 317                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
 318                                          uint32_t, (_eqp)->eq_u32[1],   \
 319                                          uint32_t, (_eqp)->eq_u32[0]);  \
 320                                                                         \
 321                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 322                 _addr[0] = (_eqp)->eq_u64[0];                           \
 323                                                                         \
 324                 _NOTE(CONSTANTCONDITION);                               \
 325         } while (B_FALSE)
 326
 327 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
 328         do {                                                            \
 329                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 330                 volatile __m128i *_addr;                                \
 331                                                                         \
 332                 _NOTE(CONSTANTCONDITION);                               \
 333                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 334                                                 sizeof(efx_oword_t)));  \
 335                                                                         \
 336                                                                         \
 337                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
 338                                          uint32_t, (_eop)->eo_u32[3],   \
 339                                          uint32_t, (_eop)->eo_u32[2],   \
 340                                          uint32_t, (_eop)->eo_u32[1],   \
 341                                          uint32_t, (_eop)->eo_u32[0]);  \
 342                                                                         \
 343                 _addr = (volatile __m128i *)(_base + (_offset));        \
 344                 _addr[0] = (_eop)->eo_u128[0];                          \
 345                                                                         \
 346                 _NOTE(CONSTANTCONDITION);                               \
 347         } while (B_FALSE)
 348
 349
 350 #define EFSYS_MEM_SIZE(_esmp)                                           \
 351         ((_esmp)->esm_mz->len)
 352
 353 #define EFSYS_MEM_ADDR(_esmp)                                           \
 354         ((_esmp)->esm_addr)
 355
 356 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
 357         ((_esmp)->esm_base == NULL)
 358
 359 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
 360         do {                                                            \
 361                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 362                                                                         \
 363                 rte_prefetch0(_base + (_offset));                       \
 364         } while (0)
 365
 366
 367 /* BAR */
 368
 369 typedef struct efsys_bar_s {
 370         rte_spinlock_t          esb_lock;
 371         int                     esb_rid;
 372         struct rte_pci_device   *esb_dev;
 373         /*
 374          * Ideally it should have volatile qualifier to denote that
 375          * the memory may be updated by someone else. However, it adds
 376          * qualifier discard warnings when the pointer or its derivative
 377          * is passed to memset() or rte_mov16().
 378          * So, skip the qualifier here, but make sure that it is added
 379          * below in access macros.
 380          */
 381         void                    *esb_base;
 382 } efsys_bar_t;
 383
 384 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
 385         do {                                                            \
 386                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
 387                 _NOTE(CONSTANTCONDITION);                               \
 388         } while (B_FALSE)
 389 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
 390 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
 391 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
 392
 393 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
 394         do {                                                            \
 395                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 396                 volatile uint32_t *_addr;                               \
 397                                                                         \
 398                 _NOTE(CONSTANTCONDITION);                               \
 399                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 400                                                 sizeof(efx_dword_t)));  \
 401                 _NOTE(CONSTANTCONDITION);                               \
 402                 if (_lock)                                              \
 403                         SFC_BAR_LOCK(_esbp);                            \
 404                                                                         \
 405                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 406                 rte_rmb();                                              \
 407                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
 408                                                                         \
 409                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
 410                                          uint32_t, (_edp)->ed_u32[0]);  \
 411                                                                         \
 412                 _NOTE(CONSTANTCONDITION);                               \
 413                 if (_lock)                                              \
 414                         SFC_BAR_UNLOCK(_esbp);                          \
 415                 _NOTE(CONSTANTCONDITION);                               \
 416         } while (B_FALSE)
 417
 418 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
 419         do {                                                            \
 420                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 421                 volatile uint64_t *_addr;                               \
 422                                                                         \
 423                 _NOTE(CONSTANTCONDITION);                               \
 424                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 425                                                 sizeof(efx_qword_t)));  \
 426                                                                         \
 427                 SFC_BAR_LOCK(_esbp);                                    \
 428                                                                         \
 429                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 430                 rte_rmb();                                              \
 431                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
 432                                                                         \
 433                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
 434                                          uint32_t, (_eqp)->eq_u32[1],   \
 435                                          uint32_t, (_eqp)->eq_u32[0]);  \
 436                                                                         \
 437                 SFC_BAR_UNLOCK(_esbp);                                  \
 438                 _NOTE(CONSTANTCONDITION);                               \
 439         } while (B_FALSE)
 440
 441 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
 442         do {                                                            \
 443                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 444                 volatile __m128i *_addr;                                \
 445                                                                         \
 446                 _NOTE(CONSTANTCONDITION);                               \
 447                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 448                                                 sizeof(efx_oword_t)));  \
 449                                                                         \
 450                 _NOTE(CONSTANTCONDITION);                               \
 451                 if (_lock)                                              \
 452                         SFC_BAR_LOCK(_esbp);                            \
 453                                                                         \
 454                 _addr = (volatile __m128i *)(_base + (_offset));        \
 455                 rte_rmb();                                              \
 456                 /* There is no rte_read128_relaxed() yet */             \
 457                 (_eop)->eo_u128[0] = _addr[0];                          \
 458                                                                         \
 459                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
 460                                          uint32_t, (_eop)->eo_u32[3],   \
 461                                          uint32_t, (_eop)->eo_u32[2],   \
 462                                          uint32_t, (_eop)->eo_u32[1],   \
 463                                          uint32_t, (_eop)->eo_u32[0]);  \
 464                                                                         \
 465                 _NOTE(CONSTANTCONDITION);                               \
 466                 if (_lock)                                              \
 467                         SFC_BAR_UNLOCK(_esbp);                          \
 468                 _NOTE(CONSTANTCONDITION);                               \
 469         } while (B_FALSE)
 470
 471
 472 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
 473         do {                                                            \
 474                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 475                 volatile uint32_t *_addr;                               \
 476                                                                         \
 477                 _NOTE(CONSTANTCONDITION);                               \
 478                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 479                                                 sizeof(efx_dword_t)));  \
 480                                                                         \
 481                 _NOTE(CONSTANTCONDITION);                               \
 482                 if (_lock)                                              \
 483                         SFC_BAR_LOCK(_esbp);                            \
 484                                                                         \
 485                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
 486                                          uint32_t, (_edp)->ed_u32[0]);  \
 487                                                                         \
 488                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 489                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
 490                 rte_wmb();                                              \
 491                                                                         \
 492                 _NOTE(CONSTANTCONDITION);                               \
 493                 if (_lock)                                              \
 494                         SFC_BAR_UNLOCK(_esbp);                          \
 495                 _NOTE(CONSTANTCONDITION);                               \
 496         } while (B_FALSE)
 497
 498 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
 499         do {                                                            \
 500                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 501                 volatile uint64_t *_addr;                               \
 502                                                                         \
 503                 _NOTE(CONSTANTCONDITION);                               \
 504                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 505                                                 sizeof(efx_qword_t)));  \
 506                                                                         \
 507                 SFC_BAR_LOCK(_esbp);                                    \
 508                                                                         \
 509                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
 510                                          uint32_t, (_eqp)->eq_u32[1],   \
 511                                          uint32_t, (_eqp)->eq_u32[0]);  \
 512                                                                         \
 513                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 514                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
 515                 rte_wmb();                                              \
 516                                                                         \
 517                 SFC_BAR_UNLOCK(_esbp);                                  \
 518                 _NOTE(CONSTANTCONDITION);                               \
 519         } while (B_FALSE)
 520
 521 /*
 522  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
 523  * (required by PIO hardware).
 524  *
 525  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
 526  * write-combined memory mapped to user-land, so just abort if used.
 527  */
 528 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
 529         do {                                                            \
 530                 rte_panic("Write-combined BAR access not supported");   \
 531         } while (B_FALSE)
 532
 533 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
 534         do {                                                            \
 535                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 536                 volatile __m128i *_addr;                                \
 537                                                                         \
 538                 _NOTE(CONSTANTCONDITION);                               \
 539                 SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,        \
 540                                                 sizeof(efx_oword_t)));  \
 541                                                                         \
 542                 _NOTE(CONSTANTCONDITION);                               \
 543                 if (_lock)                                              \
 544                         SFC_BAR_LOCK(_esbp);                            \
 545                                                                         \
 546                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
 547                                          uint32_t, (_eop)->eo_u32[3],   \
 548                                          uint32_t, (_eop)->eo_u32[2],   \
 549                                          uint32_t, (_eop)->eo_u32[1],   \
 550                                          uint32_t, (_eop)->eo_u32[0]);  \
 551                                                                         \
 552                 _addr = (volatile __m128i *)(_base + (_offset));        \
 553                 /* There is no rte_write128_relaxed() yet */            \
 554                 _addr[0] = (_eop)->eo_u128[0];                          \
 555                 rte_wmb();                                              \
 556                                                                         \
 557                 _NOTE(CONSTANTCONDITION);                               \
 558                 if (_lock)                                              \
 559                         SFC_BAR_UNLOCK(_esbp);                          \
 560                 _NOTE(CONSTANTCONDITION);                               \
 561         } while (B_FALSE)
 562
 563 /* Use the standard octo-word write for doorbell writes */
 564 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
 565         do {                                                            \
 566                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
 567                 _NOTE(CONSTANTCONDITION);                               \
 568         } while (B_FALSE)
 569
 570 /* SPIN */
 571
 572 #define EFSYS_SPIN(_us)                                                 \
 573         do {                                                            \
 574                 rte_delay_us(_us);                                      \
 575                 _NOTE(CONSTANTCONDITION);                               \
 576         } while (B_FALSE)
 577
 578 #define EFSYS_SLEEP EFSYS_SPIN
 579
 580 /* BARRIERS */
 581
 582 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
 583 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
 584
 585 /* DMA SYNC */
 586
 587 /*
 588  * DPDK does not provide any DMA syncing API, and no PMD drivers
 589  * have any traces of explicit DMA syncing.
 590  * DMA mapping is assumed to be coherent.
 591  */
 592
 593 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
 594
 595 /* Just avoid store and compiler (impliciltly) reordering */
 596 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
 597
 598 /* TIMESTAMP */
 599
 600 typedef uint64_t efsys_timestamp_t;
 601
 602 #define EFSYS_TIMESTAMP(_usp)                                           \
 603         do {                                                            \
 604                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
 605                         rte_get_timer_hz();                             \
 606                 _NOTE(CONSTANTCONDITION);                               \
 607         } while (B_FALSE)
 608
 609 /* KMEM */
 610
 611 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
 612         do {                                                            \
 613                 (_esip) = (_esip);                                      \
 614                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
 615                 _NOTE(CONSTANTCONDITION);                               \
 616         } while (B_FALSE)
 617
 618 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
 619         do {                                                            \
 620                 (void)(_esip);                                          \
 621                 (void)(_size);                                          \
 622                 rte_free((_p));                                         \
 623                 _NOTE(CONSTANTCONDITION);                               \
 624         } while (B_FALSE)
 625
 626 /* LOCK */
 627
 628 typedef rte_spinlock_t efsys_lock_t;
 629
 630 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
 631         rte_spinlock_init((_eslp))
 632 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
 633 #define SFC_EFSYS_LOCK(_eslp)                           \
 634         rte_spinlock_lock((_eslp))
 635 #define SFC_EFSYS_UNLOCK(_eslp)                         \
 636         rte_spinlock_unlock((_eslp))
 637 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
 638         SFC_EFX_ASSERT(rte_spinlock_is_locked((_eslp)))
 639
 640 typedef int efsys_lock_state_t;
 641
 642 #define EFSYS_LOCK_MAGIC        0x000010c4
 643
 644 #define EFSYS_LOCK(_lockp, _state)                              \
 645         do {                                                    \
 646                 SFC_EFSYS_LOCK(_lockp);                         \
 647                 (_state) = EFSYS_LOCK_MAGIC;                    \
 648                 _NOTE(CONSTANTCONDITION);                       \
 649         } while (B_FALSE)
 650
 651 #define EFSYS_UNLOCK(_lockp, _state)                            \
 652         do {                                                    \
 653                 SFC_EFX_ASSERT((_state) == EFSYS_LOCK_MAGIC);   \
 654                 SFC_EFSYS_UNLOCK(_lockp);                       \
 655                 _NOTE(CONSTANTCONDITION);                       \
 656         } while (B_FALSE)
 657
 658 /* STAT */
 659
 660 typedef uint64_t        efsys_stat_t;
 661
 662 #define EFSYS_STAT_INCR(_knp, _delta)                           \
 663         do {                                                    \
 664                 *(_knp) += (_delta);                            \
 665                 _NOTE(CONSTANTCONDITION);                       \
 666         } while (B_FALSE)
 667
 668 #define EFSYS_STAT_DECR(_knp, _delta)                           \
 669         do {                                                    \
 670                 *(_knp) -= (_delta);                            \
 671                 _NOTE(CONSTANTCONDITION);                       \
 672         } while (B_FALSE)
 673
 674 #define EFSYS_STAT_SET(_knp, _val)                              \
 675         do {                                                    \
 676                 *(_knp) = (_val);                               \
 677                 _NOTE(CONSTANTCONDITION);                       \
 678         } while (B_FALSE)
 679
 680 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
 681         do {                                                    \
 682                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
 683                 _NOTE(CONSTANTCONDITION);                       \
 684         } while (B_FALSE)
 685
 686 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
 687         do {                                                    \
 688                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
 689                 _NOTE(CONSTANTCONDITION);                       \
 690         } while (B_FALSE)
 691
 692 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
 693         do {                                                            \
 694                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 695                 _NOTE(CONSTANTCONDITION);                               \
 696         } while (B_FALSE)
 697
 698 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
 699         do {                                                            \
 700                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 701                 _NOTE(CONSTANTCONDITION);                               \
 702         } while (B_FALSE)
 703
 704 /* ERR */
 705
 706 #if EFSYS_OPT_DECODE_INTR_FATAL
 707 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
 708         do {                                                            \
 709                 (void)(_esip);                                          \
 710                 SFC_EFX_LOG(ERR, "FATAL ERROR #%u (0x%08x%08x)",        \
 711                         (_code), (_dword0), (_dword1));                 \
 712                 _NOTE(CONSTANTCONDITION);                               \
 713         } while (B_FALSE)
 714 #endif
 715
 716 /* ASSERT */
 717
 718 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
 719  * so we re-implement it here
 720  */
 721 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 722 #define EFSYS_ASSERT(_exp)                                              \
 723         do {                                                            \
 724                 if (unlikely(!(_exp)))                                  \
 725                         rte_panic("line %d\tassert \"%s\" failed\n",    \
 726                                   __LINE__, (#_exp));                   \
 727         } while (0)
 728 #else
 729 #define EFSYS_ASSERT(_exp)              (void)(_exp)
 730 #endif
 731
 732 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
 733
 734 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
 735 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
 736 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
 737
 738 /* ROTATE */
 739
 740 #define EFSYS_HAS_ROTL_DWORD    0
 741
 742 #ifdef __cplusplus
 743 }
 744 #endif
 745
 746 #endif  /* _SFC_COMMON_EFSYS_H */