4 * Copyright(c) 2016-2017 Intel Corporation. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_hexdump.h>
36 #include <rte_cryptodev.h>
37 #include <rte_cryptodev_pmd.h>
38 #include <rte_cryptodev_vdev.h>
40 #include <rte_malloc.h>
41 #include <rte_cpuflags.h>
42 #include <rte_byteorder.h>
44 #include "aesni_gcm_pmd_private.h"
46 static uint8_t cryptodev_driver_id;
48 /** Parse crypto xform chain and set private session parameters */
50 aesni_gcm_set_session_parameters(const struct aesni_gcm_ops *gcm_ops,
51 struct aesni_gcm_session *sess,
52 const struct rte_crypto_sym_xform *xform)
54 const struct rte_crypto_sym_xform *auth_xform;
55 const struct rte_crypto_sym_xform *aead_xform;
56 uint16_t digest_length;
61 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
63 if (auth_xform->auth.algo != RTE_CRYPTO_AUTH_AES_GMAC) {
64 GCM_LOG_ERR("Only AES GMAC is supported as an "
65 "authentication only algorithm");
68 /* Set IV parameters */
69 sess->iv.offset = auth_xform->auth.iv.offset;
70 sess->iv.length = auth_xform->auth.iv.length;
72 /* Select Crypto operation */
73 if (auth_xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE)
74 sess->op = AESNI_GMAC_OP_GENERATE;
76 sess->op = AESNI_GMAC_OP_VERIFY;
78 key_length = auth_xform->auth.key.length;
79 key = auth_xform->auth.key.data;
80 digest_length = auth_xform->auth.digest_length;
83 } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) {
86 if (aead_xform->aead.algo != RTE_CRYPTO_AEAD_AES_GCM) {
87 GCM_LOG_ERR("The only combined operation "
88 "supported is AES GCM");
92 /* Set IV parameters */
93 sess->iv.offset = aead_xform->aead.iv.offset;
94 sess->iv.length = aead_xform->aead.iv.length;
96 /* Select Crypto operation */
97 if (aead_xform->aead.op == RTE_CRYPTO_AEAD_OP_ENCRYPT)
98 sess->op = AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION;
100 sess->op = AESNI_GCM_OP_AUTHENTICATED_DECRYPTION;
102 key_length = aead_xform->aead.key.length;
103 key = aead_xform->aead.key.data;
105 sess->aad_length = aead_xform->aead.aad_length;
106 digest_length = aead_xform->aead.digest_length;
108 GCM_LOG_ERR("Wrong xform type, has to be AEAD or authentication");
114 if (sess->iv.length != 16 && sess->iv.length != 12 &&
115 sess->iv.length != 0) {
116 GCM_LOG_ERR("Wrong IV length");
120 /* Check key length and calculate GCM pre-compute. */
121 switch (key_length) {
123 sess->key = AESNI_GCM_KEY_128;
126 sess->key = AESNI_GCM_KEY_192;
129 sess->key = AESNI_GCM_KEY_256;
132 GCM_LOG_ERR("Invalid key length");
136 gcm_ops[sess->key].precomp(key, &sess->gdata_key);
139 if (digest_length != 16 &&
140 digest_length != 12 &&
141 digest_length != 8) {
142 GCM_LOG_ERR("digest");
145 sess->digest_length = digest_length;
150 /** Get gcm session */
151 static struct aesni_gcm_session *
152 aesni_gcm_get_session(struct aesni_gcm_qp *qp, struct rte_crypto_op *op)
154 struct aesni_gcm_session *sess = NULL;
155 struct rte_crypto_sym_op *sym_op = op->sym;
157 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
158 if (likely(sym_op->session != NULL))
159 sess = (struct aesni_gcm_session *)
160 get_session_private_data(
162 cryptodev_driver_id);
165 void *_sess_private_data = NULL;
167 if (rte_mempool_get(qp->sess_mp, (void **)&_sess))
170 if (rte_mempool_get(qp->sess_mp, (void **)&_sess_private_data))
173 sess = (struct aesni_gcm_session *)_sess_private_data;
175 if (unlikely(aesni_gcm_set_session_parameters(qp->ops,
176 sess, sym_op->xform) != 0)) {
177 rte_mempool_put(qp->sess_mp, _sess);
178 rte_mempool_put(qp->sess_mp, _sess_private_data);
181 sym_op->session = (struct rte_cryptodev_sym_session *)_sess;
182 set_session_private_data(sym_op->session, cryptodev_driver_id,
186 if (unlikely(sess == NULL))
187 op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
193 * Process a crypto operation, calling
194 * the GCM API from the multi buffer library.
196 * @param qp queue pair
197 * @param op symmetric crypto operation
198 * @param session GCM session
204 process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_op *op,
205 struct aesni_gcm_session *session)
209 struct rte_crypto_sym_op *sym_op = op->sym;
210 struct rte_mbuf *m_src = sym_op->m_src;
211 uint32_t offset, data_offset, data_length;
212 uint32_t part_len, total_len, data_len;
214 if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION ||
215 session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
216 offset = sym_op->aead.data.offset;
217 data_offset = offset;
218 data_length = sym_op->aead.data.length;
220 offset = sym_op->auth.data.offset;
221 data_offset = offset;
222 data_length = sym_op->auth.data.length;
225 RTE_ASSERT(m_src != NULL);
227 while (offset >= m_src->data_len && data_length != 0) {
228 offset -= m_src->data_len;
231 RTE_ASSERT(m_src != NULL);
234 data_len = m_src->data_len - offset;
235 part_len = (data_len < data_length) ? data_len :
238 /* Destination buffer is required when segmented source buffer */
239 RTE_ASSERT((part_len == data_length) ||
240 ((part_len != data_length) &&
241 (sym_op->m_dst != NULL)));
242 /* Segmented destination buffer is not supported */
243 RTE_ASSERT((sym_op->m_dst == NULL) ||
244 ((sym_op->m_dst != NULL) &&
245 rte_pktmbuf_is_contiguous(sym_op->m_dst)));
248 dst = sym_op->m_dst ?
249 rte_pktmbuf_mtod_offset(sym_op->m_dst, uint8_t *,
251 rte_pktmbuf_mtod_offset(sym_op->m_src, uint8_t *,
254 src = rte_pktmbuf_mtod_offset(m_src, uint8_t *, offset);
256 iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
259 * GCM working in 12B IV mode => 16B pre-counter block we need
260 * to set BE LSB to 1, driver expects that 16B is allocated
262 if (session->iv.length == 12) {
263 uint32_t *iv_padd = (uint32_t *)&(iv_ptr[12]);
264 *iv_padd = rte_bswap32(1);
267 if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION) {
269 qp->ops[session->key].init(&session->gdata_key,
272 sym_op->aead.aad.data,
273 (uint64_t)session->aad_length);
275 qp->ops[session->key].update_enc(&session->gdata_key,
276 &qp->gdata_ctx, dst, src,
278 total_len = data_length - part_len;
284 RTE_ASSERT(m_src != NULL);
286 src = rte_pktmbuf_mtod(m_src, uint8_t *);
287 part_len = (m_src->data_len < total_len) ?
288 m_src->data_len : total_len;
290 qp->ops[session->key].update_enc(&session->gdata_key,
291 &qp->gdata_ctx, dst, src,
293 total_len -= part_len;
296 qp->ops[session->key].finalize(&session->gdata_key,
298 sym_op->aead.digest.data,
299 (uint64_t)session->digest_length);
300 } else if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
301 uint8_t *auth_tag = qp->temp_digest;
303 qp->ops[session->key].init(&session->gdata_key,
306 sym_op->aead.aad.data,
307 (uint64_t)session->aad_length);
309 qp->ops[session->key].update_dec(&session->gdata_key,
310 &qp->gdata_ctx, dst, src,
312 total_len = data_length - part_len;
318 RTE_ASSERT(m_src != NULL);
320 src = rte_pktmbuf_mtod(m_src, uint8_t *);
321 part_len = (m_src->data_len < total_len) ?
322 m_src->data_len : total_len;
324 qp->ops[session->key].update_dec(&session->gdata_key,
328 total_len -= part_len;
331 qp->ops[session->key].finalize(&session->gdata_key,
334 (uint64_t)session->digest_length);
335 } else if (session->op == AESNI_GMAC_OP_GENERATE) {
336 qp->ops[session->key].init(&session->gdata_key,
340 (uint64_t)data_length);
341 qp->ops[session->key].finalize(&session->gdata_key,
343 sym_op->auth.digest.data,
344 (uint64_t)session->digest_length);
345 } else { /* AESNI_GMAC_OP_VERIFY */
346 uint8_t *auth_tag = qp->temp_digest;
348 qp->ops[session->key].init(&session->gdata_key,
352 (uint64_t)data_length);
354 qp->ops[session->key].finalize(&session->gdata_key,
357 (uint64_t)session->digest_length);
364 * Process a completed job and return rte_mbuf which job processed
366 * @param job JOB_AES_HMAC job to process
369 * - Returns processed mbuf which is trimmed of output digest used in
370 * verification of supplied digest in the case of a HASH_CIPHER operation
371 * - Returns NULL on invalid job
374 post_process_gcm_crypto_op(struct aesni_gcm_qp *qp,
375 struct rte_crypto_op *op,
376 struct aesni_gcm_session *session)
378 op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
380 /* Verify digest if required */
381 if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION ||
382 session->op == AESNI_GMAC_OP_VERIFY) {
385 uint8_t *tag = (uint8_t *)&qp->temp_digest;
387 if (session->op == AESNI_GMAC_OP_VERIFY)
388 digest = op->sym->auth.digest.data;
390 digest = op->sym->aead.digest.data;
392 #ifdef RTE_LIBRTE_PMD_AESNI_GCM_DEBUG
393 rte_hexdump(stdout, "auth tag (orig):",
394 digest, session->digest_length);
395 rte_hexdump(stdout, "auth tag (calc):",
396 tag, session->digest_length);
399 if (memcmp(tag, digest, session->digest_length) != 0)
400 op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
405 * Process a completed GCM request
407 * @param qp Queue Pair to process
408 * @param op Crypto operation
409 * @param job JOB_AES_HMAC job
412 * - Number of processed jobs
415 handle_completed_gcm_crypto_op(struct aesni_gcm_qp *qp,
416 struct rte_crypto_op *op,
417 struct aesni_gcm_session *sess)
419 post_process_gcm_crypto_op(qp, op, sess);
421 /* Free session if a session-less crypto op */
422 if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {
423 memset(sess, 0, sizeof(struct aesni_gcm_session));
424 memset(op->sym->session, 0,
425 rte_cryptodev_get_header_session_size());
426 rte_mempool_put(qp->sess_mp, sess);
427 rte_mempool_put(qp->sess_mp, op->sym->session);
428 op->sym->session = NULL;
433 aesni_gcm_pmd_dequeue_burst(void *queue_pair,
434 struct rte_crypto_op **ops, uint16_t nb_ops)
436 struct aesni_gcm_session *sess;
437 struct aesni_gcm_qp *qp = queue_pair;
440 unsigned int i, nb_dequeued;
442 nb_dequeued = rte_ring_dequeue_burst(qp->processed_pkts,
443 (void **)ops, nb_ops, NULL);
445 for (i = 0; i < nb_dequeued; i++) {
447 sess = aesni_gcm_get_session(qp, ops[i]);
448 if (unlikely(sess == NULL)) {
449 ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
450 qp->qp_stats.dequeue_err_count++;
454 retval = process_gcm_crypto_op(qp, ops[i], sess);
456 ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
457 qp->qp_stats.dequeue_err_count++;
461 handle_completed_gcm_crypto_op(qp, ops[i], sess);
464 qp->qp_stats.dequeued_count += i;
470 aesni_gcm_pmd_enqueue_burst(void *queue_pair,
471 struct rte_crypto_op **ops, uint16_t nb_ops)
473 struct aesni_gcm_qp *qp = queue_pair;
475 unsigned int nb_enqueued;
477 nb_enqueued = rte_ring_enqueue_burst(qp->processed_pkts,
478 (void **)ops, nb_ops, NULL);
479 qp->qp_stats.enqueued_count += nb_enqueued;
484 static int aesni_gcm_remove(struct rte_vdev_device *vdev);
487 aesni_gcm_create(const char *name,
488 struct rte_vdev_device *vdev,
489 struct rte_crypto_vdev_init_params *init_params)
491 struct rte_cryptodev *dev;
492 struct aesni_gcm_private *internals;
493 enum aesni_gcm_vector_mode vector_mode;
495 if (init_params->name[0] == '\0')
496 snprintf(init_params->name, sizeof(init_params->name),
499 /* Check CPU for support for AES instruction set */
500 if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
501 GCM_LOG_ERR("AES instructions not supported by CPU");
505 /* Check CPU for supported vector instruction set */
506 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
507 vector_mode = RTE_AESNI_GCM_AVX2;
508 else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX))
509 vector_mode = RTE_AESNI_GCM_AVX;
511 vector_mode = RTE_AESNI_GCM_SSE;
513 dev = rte_cryptodev_vdev_pmd_init(init_params->name,
514 sizeof(struct aesni_gcm_private), init_params->socket_id,
517 GCM_LOG_ERR("failed to create cryptodev vdev");
521 dev->driver_id = cryptodev_driver_id;
522 dev->dev_ops = rte_aesni_gcm_pmd_ops;
524 /* register rx/tx burst functions for data path */
525 dev->dequeue_burst = aesni_gcm_pmd_dequeue_burst;
526 dev->enqueue_burst = aesni_gcm_pmd_enqueue_burst;
528 dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
529 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
530 RTE_CRYPTODEV_FF_CPU_AESNI |
531 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER;
533 switch (vector_mode) {
534 case RTE_AESNI_GCM_SSE:
535 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;
537 case RTE_AESNI_GCM_AVX:
538 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;
540 case RTE_AESNI_GCM_AVX2:
541 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
547 internals = dev->data->dev_private;
549 internals->vector_mode = vector_mode;
551 internals->max_nb_queue_pairs = init_params->max_nb_queue_pairs;
552 internals->max_nb_sessions = init_params->max_nb_sessions;
557 GCM_LOG_ERR("driver %s: create failed", init_params->name);
559 aesni_gcm_remove(vdev);
564 aesni_gcm_probe(struct rte_vdev_device *vdev)
566 struct rte_crypto_vdev_init_params init_params = {
567 RTE_CRYPTODEV_VDEV_DEFAULT_MAX_NB_QUEUE_PAIRS,
568 RTE_CRYPTODEV_VDEV_DEFAULT_MAX_NB_SESSIONS,
573 const char *input_args;
575 name = rte_vdev_device_name(vdev);
578 input_args = rte_vdev_device_args(vdev);
579 rte_cryptodev_vdev_parse_init_params(&init_params, input_args);
581 RTE_LOG(INFO, PMD, "Initialising %s on NUMA node %d\n", name,
582 init_params.socket_id);
583 if (init_params.name[0] != '\0')
584 RTE_LOG(INFO, PMD, " User defined name = %s\n",
586 RTE_LOG(INFO, PMD, " Max number of queue pairs = %d\n",
587 init_params.max_nb_queue_pairs);
588 RTE_LOG(INFO, PMD, " Max number of sessions = %d\n",
589 init_params.max_nb_sessions);
591 return aesni_gcm_create(name, vdev, &init_params);
595 aesni_gcm_remove(struct rte_vdev_device *vdev)
599 name = rte_vdev_device_name(vdev);
603 GCM_LOG_INFO("Closing AESNI crypto device %s on numa socket %u\n",
604 name, rte_socket_id());
609 static struct rte_vdev_driver aesni_gcm_pmd_drv = {
610 .probe = aesni_gcm_probe,
611 .remove = aesni_gcm_remove
614 static struct cryptodev_driver aesni_gcm_crypto_drv;
616 RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_AESNI_GCM_PMD, aesni_gcm_pmd_drv);
617 RTE_PMD_REGISTER_ALIAS(CRYPTODEV_NAME_AESNI_GCM_PMD, cryptodev_aesni_gcm_pmd);
618 RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_AESNI_GCM_PMD,
619 "max_nb_queue_pairs=<int> "
620 "max_nb_sessions=<int> "
622 RTE_PMD_REGISTER_CRYPTO_DRIVER(aesni_gcm_crypto_drv, aesni_gcm_pmd_drv,
623 cryptodev_driver_id);