1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2016-2017 Intel Corporation
5 #include <rte_common.h>
6 #include <rte_hexdump.h>
7 #include <rte_cryptodev.h>
8 #include <rte_cryptodev_pmd.h>
9 #include <rte_bus_vdev.h>
10 #include <rte_malloc.h>
11 #include <rte_cpuflags.h>
12 #include <rte_byteorder.h>
14 #include "aesni_gcm_pmd_private.h"
16 static uint8_t cryptodev_driver_id;
18 /** Parse crypto xform chain and set private session parameters */
20 aesni_gcm_set_session_parameters(const struct aesni_gcm_ops *gcm_ops,
21 struct aesni_gcm_session *sess,
22 const struct rte_crypto_sym_xform *xform)
24 const struct rte_crypto_sym_xform *auth_xform;
25 const struct rte_crypto_sym_xform *aead_xform;
26 uint16_t digest_length;
31 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
33 if (auth_xform->auth.algo != RTE_CRYPTO_AUTH_AES_GMAC) {
34 AESNI_GCM_LOG(ERR, "Only AES GMAC is supported as an "
35 "authentication only algorithm");
38 /* Set IV parameters */
39 sess->iv.offset = auth_xform->auth.iv.offset;
40 sess->iv.length = auth_xform->auth.iv.length;
42 /* Select Crypto operation */
43 if (auth_xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE)
44 sess->op = AESNI_GMAC_OP_GENERATE;
46 sess->op = AESNI_GMAC_OP_VERIFY;
48 key_length = auth_xform->auth.key.length;
49 key = auth_xform->auth.key.data;
50 digest_length = auth_xform->auth.digest_length;
53 } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) {
56 if (aead_xform->aead.algo != RTE_CRYPTO_AEAD_AES_GCM) {
57 AESNI_GCM_LOG(ERR, "The only combined operation "
58 "supported is AES GCM");
62 /* Set IV parameters */
63 sess->iv.offset = aead_xform->aead.iv.offset;
64 sess->iv.length = aead_xform->aead.iv.length;
66 /* Select Crypto operation */
67 if (aead_xform->aead.op == RTE_CRYPTO_AEAD_OP_ENCRYPT)
68 sess->op = AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION;
70 sess->op = AESNI_GCM_OP_AUTHENTICATED_DECRYPTION;
72 key_length = aead_xform->aead.key.length;
73 key = aead_xform->aead.key.data;
75 sess->aad_length = aead_xform->aead.aad_length;
76 digest_length = aead_xform->aead.digest_length;
78 AESNI_GCM_LOG(ERR, "Wrong xform type, has to be AEAD or authentication");
84 if (sess->iv.length != 16 && sess->iv.length != 12 &&
85 sess->iv.length != 0) {
86 AESNI_GCM_LOG(ERR, "Wrong IV length");
90 /* Check key length and calculate GCM pre-compute. */
93 sess->key = AESNI_GCM_KEY_128;
96 sess->key = AESNI_GCM_KEY_192;
99 sess->key = AESNI_GCM_KEY_256;
102 AESNI_GCM_LOG(ERR, "Invalid key length");
106 gcm_ops[sess->key].precomp(key, &sess->gdata_key);
109 if (digest_length != 16 &&
110 digest_length != 12 &&
111 digest_length != 8) {
112 AESNI_GCM_LOG(ERR, "Invalid digest length");
115 sess->digest_length = digest_length;
120 /** Get gcm session */
121 static struct aesni_gcm_session *
122 aesni_gcm_get_session(struct aesni_gcm_qp *qp, struct rte_crypto_op *op)
124 struct aesni_gcm_session *sess = NULL;
125 struct rte_crypto_sym_op *sym_op = op->sym;
127 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
128 if (likely(sym_op->session != NULL))
129 sess = (struct aesni_gcm_session *)
130 get_sym_session_private_data(
132 cryptodev_driver_id);
135 void *_sess_private_data = NULL;
137 if (rte_mempool_get(qp->sess_mp, (void **)&_sess))
140 if (rte_mempool_get(qp->sess_mp, (void **)&_sess_private_data))
143 sess = (struct aesni_gcm_session *)_sess_private_data;
145 if (unlikely(aesni_gcm_set_session_parameters(qp->ops,
146 sess, sym_op->xform) != 0)) {
147 rte_mempool_put(qp->sess_mp, _sess);
148 rte_mempool_put(qp->sess_mp, _sess_private_data);
151 sym_op->session = (struct rte_cryptodev_sym_session *)_sess;
152 set_sym_session_private_data(sym_op->session,
153 cryptodev_driver_id, _sess_private_data);
156 if (unlikely(sess == NULL))
157 op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
163 * Process a crypto operation, calling
164 * the GCM API from the multi buffer library.
166 * @param qp queue pair
167 * @param op symmetric crypto operation
168 * @param session GCM session
174 process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_op *op,
175 struct aesni_gcm_session *session)
179 struct rte_crypto_sym_op *sym_op = op->sym;
180 struct rte_mbuf *m_src = sym_op->m_src;
181 uint32_t offset, data_offset, data_length;
182 uint32_t part_len, total_len, data_len;
184 if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION ||
185 session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
186 offset = sym_op->aead.data.offset;
187 data_offset = offset;
188 data_length = sym_op->aead.data.length;
190 offset = sym_op->auth.data.offset;
191 data_offset = offset;
192 data_length = sym_op->auth.data.length;
195 RTE_ASSERT(m_src != NULL);
197 while (offset >= m_src->data_len && data_length != 0) {
198 offset -= m_src->data_len;
201 RTE_ASSERT(m_src != NULL);
204 data_len = m_src->data_len - offset;
205 part_len = (data_len < data_length) ? data_len :
208 /* Destination buffer is required when segmented source buffer */
209 RTE_ASSERT((part_len == data_length) ||
210 ((part_len != data_length) &&
211 (sym_op->m_dst != NULL)));
212 /* Segmented destination buffer is not supported */
213 RTE_ASSERT((sym_op->m_dst == NULL) ||
214 ((sym_op->m_dst != NULL) &&
215 rte_pktmbuf_is_contiguous(sym_op->m_dst)));
218 dst = sym_op->m_dst ?
219 rte_pktmbuf_mtod_offset(sym_op->m_dst, uint8_t *,
221 rte_pktmbuf_mtod_offset(sym_op->m_src, uint8_t *,
224 src = rte_pktmbuf_mtod_offset(m_src, uint8_t *, offset);
226 iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
229 * GCM working in 12B IV mode => 16B pre-counter block we need
230 * to set BE LSB to 1, driver expects that 16B is allocated
232 if (session->iv.length == 12) {
233 uint32_t *iv_padd = (uint32_t *)&(iv_ptr[12]);
234 *iv_padd = rte_bswap32(1);
237 if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION) {
239 qp->ops[session->key].init(&session->gdata_key,
242 sym_op->aead.aad.data,
243 (uint64_t)session->aad_length);
245 qp->ops[session->key].update_enc(&session->gdata_key,
246 &qp->gdata_ctx, dst, src,
248 total_len = data_length - part_len;
254 RTE_ASSERT(m_src != NULL);
256 src = rte_pktmbuf_mtod(m_src, uint8_t *);
257 part_len = (m_src->data_len < total_len) ?
258 m_src->data_len : total_len;
260 qp->ops[session->key].update_enc(&session->gdata_key,
261 &qp->gdata_ctx, dst, src,
263 total_len -= part_len;
266 qp->ops[session->key].finalize(&session->gdata_key,
268 sym_op->aead.digest.data,
269 (uint64_t)session->digest_length);
270 } else if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
271 uint8_t *auth_tag = qp->temp_digest;
273 qp->ops[session->key].init(&session->gdata_key,
276 sym_op->aead.aad.data,
277 (uint64_t)session->aad_length);
279 qp->ops[session->key].update_dec(&session->gdata_key,
280 &qp->gdata_ctx, dst, src,
282 total_len = data_length - part_len;
288 RTE_ASSERT(m_src != NULL);
290 src = rte_pktmbuf_mtod(m_src, uint8_t *);
291 part_len = (m_src->data_len < total_len) ?
292 m_src->data_len : total_len;
294 qp->ops[session->key].update_dec(&session->gdata_key,
298 total_len -= part_len;
301 qp->ops[session->key].finalize(&session->gdata_key,
304 (uint64_t)session->digest_length);
305 } else if (session->op == AESNI_GMAC_OP_GENERATE) {
306 qp->ops[session->key].init(&session->gdata_key,
310 (uint64_t)data_length);
311 qp->ops[session->key].finalize(&session->gdata_key,
313 sym_op->auth.digest.data,
314 (uint64_t)session->digest_length);
315 } else { /* AESNI_GMAC_OP_VERIFY */
316 uint8_t *auth_tag = qp->temp_digest;
318 qp->ops[session->key].init(&session->gdata_key,
322 (uint64_t)data_length);
324 qp->ops[session->key].finalize(&session->gdata_key,
327 (uint64_t)session->digest_length);
334 * Process a completed job and return rte_mbuf which job processed
336 * @param job JOB_AES_HMAC job to process
339 * - Returns processed mbuf which is trimmed of output digest used in
340 * verification of supplied digest in the case of a HASH_CIPHER operation
341 * - Returns NULL on invalid job
344 post_process_gcm_crypto_op(struct aesni_gcm_qp *qp,
345 struct rte_crypto_op *op,
346 struct aesni_gcm_session *session)
348 op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
350 /* Verify digest if required */
351 if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION ||
352 session->op == AESNI_GMAC_OP_VERIFY) {
355 uint8_t *tag = qp->temp_digest;
357 if (session->op == AESNI_GMAC_OP_VERIFY)
358 digest = op->sym->auth.digest.data;
360 digest = op->sym->aead.digest.data;
362 #ifdef RTE_LIBRTE_PMD_AESNI_GCM_DEBUG
363 rte_hexdump(stdout, "auth tag (orig):",
364 digest, session->digest_length);
365 rte_hexdump(stdout, "auth tag (calc):",
366 tag, session->digest_length);
369 if (memcmp(tag, digest, session->digest_length) != 0)
370 op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
375 * Process a completed GCM request
377 * @param qp Queue Pair to process
378 * @param op Crypto operation
379 * @param job JOB_AES_HMAC job
382 * - Number of processed jobs
385 handle_completed_gcm_crypto_op(struct aesni_gcm_qp *qp,
386 struct rte_crypto_op *op,
387 struct aesni_gcm_session *sess)
389 post_process_gcm_crypto_op(qp, op, sess);
391 /* Free session if a session-less crypto op */
392 if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {
393 memset(sess, 0, sizeof(struct aesni_gcm_session));
394 memset(op->sym->session, 0,
395 rte_cryptodev_sym_get_header_session_size());
396 rte_mempool_put(qp->sess_mp, sess);
397 rte_mempool_put(qp->sess_mp, op->sym->session);
398 op->sym->session = NULL;
403 aesni_gcm_pmd_dequeue_burst(void *queue_pair,
404 struct rte_crypto_op **ops, uint16_t nb_ops)
406 struct aesni_gcm_session *sess;
407 struct aesni_gcm_qp *qp = queue_pair;
410 unsigned int i, nb_dequeued;
412 nb_dequeued = rte_ring_dequeue_burst(qp->processed_pkts,
413 (void **)ops, nb_ops, NULL);
415 for (i = 0; i < nb_dequeued; i++) {
417 sess = aesni_gcm_get_session(qp, ops[i]);
418 if (unlikely(sess == NULL)) {
419 ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
420 qp->qp_stats.dequeue_err_count++;
424 retval = process_gcm_crypto_op(qp, ops[i], sess);
426 ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
427 qp->qp_stats.dequeue_err_count++;
431 handle_completed_gcm_crypto_op(qp, ops[i], sess);
434 qp->qp_stats.dequeued_count += i;
440 aesni_gcm_pmd_enqueue_burst(void *queue_pair,
441 struct rte_crypto_op **ops, uint16_t nb_ops)
443 struct aesni_gcm_qp *qp = queue_pair;
445 unsigned int nb_enqueued;
447 nb_enqueued = rte_ring_enqueue_burst(qp->processed_pkts,
448 (void **)ops, nb_ops, NULL);
449 qp->qp_stats.enqueued_count += nb_enqueued;
454 static int aesni_gcm_remove(struct rte_vdev_device *vdev);
457 aesni_gcm_create(const char *name,
458 struct rte_vdev_device *vdev,
459 struct rte_cryptodev_pmd_init_params *init_params)
461 struct rte_cryptodev *dev;
462 struct aesni_gcm_private *internals;
463 enum aesni_gcm_vector_mode vector_mode;
465 /* Check CPU for support for AES instruction set */
466 if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
467 AESNI_GCM_LOG(ERR, "AES instructions not supported by CPU");
470 dev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);
472 AESNI_GCM_LOG(ERR, "driver %s: create failed",
477 /* Check CPU for supported vector instruction set */
478 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
479 vector_mode = RTE_AESNI_GCM_AVX2;
480 else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX))
481 vector_mode = RTE_AESNI_GCM_AVX;
483 vector_mode = RTE_AESNI_GCM_SSE;
485 dev->driver_id = cryptodev_driver_id;
486 dev->dev_ops = rte_aesni_gcm_pmd_ops;
488 /* register rx/tx burst functions for data path */
489 dev->dequeue_burst = aesni_gcm_pmd_dequeue_burst;
490 dev->enqueue_burst = aesni_gcm_pmd_enqueue_burst;
492 dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
493 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
494 RTE_CRYPTODEV_FF_CPU_AESNI |
495 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
496 RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
498 switch (vector_mode) {
499 case RTE_AESNI_GCM_SSE:
500 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;
502 case RTE_AESNI_GCM_AVX:
503 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;
505 case RTE_AESNI_GCM_AVX2:
506 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
512 internals = dev->data->dev_private;
514 internals->vector_mode = vector_mode;
516 internals->max_nb_queue_pairs = init_params->max_nb_queue_pairs;
518 #if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)
519 AESNI_GCM_LOG(INFO, "IPSec Multi-buffer library version used: %s\n",
520 imb_get_version_str());
522 AESNI_GCM_LOG(INFO, "IPSec Multi-buffer library version used: 0.49.0\n");
529 aesni_gcm_probe(struct rte_vdev_device *vdev)
531 struct rte_cryptodev_pmd_init_params init_params = {
533 sizeof(struct aesni_gcm_private),
535 RTE_CRYPTODEV_PMD_DEFAULT_MAX_NB_QUEUE_PAIRS
538 const char *input_args;
540 name = rte_vdev_device_name(vdev);
543 input_args = rte_vdev_device_args(vdev);
544 rte_cryptodev_pmd_parse_input_args(&init_params, input_args);
546 return aesni_gcm_create(name, vdev, &init_params);
550 aesni_gcm_remove(struct rte_vdev_device *vdev)
552 struct rte_cryptodev *cryptodev;
555 name = rte_vdev_device_name(vdev);
559 cryptodev = rte_cryptodev_pmd_get_named_dev(name);
560 if (cryptodev == NULL)
563 return rte_cryptodev_pmd_destroy(cryptodev);
566 static struct rte_vdev_driver aesni_gcm_pmd_drv = {
567 .probe = aesni_gcm_probe,
568 .remove = aesni_gcm_remove
571 static struct cryptodev_driver aesni_gcm_crypto_drv;
573 RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_AESNI_GCM_PMD, aesni_gcm_pmd_drv);
574 RTE_PMD_REGISTER_ALIAS(CRYPTODEV_NAME_AESNI_GCM_PMD, cryptodev_aesni_gcm_pmd);
575 RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_AESNI_GCM_PMD,
576 "max_nb_queue_pairs=<int> "
578 RTE_PMD_REGISTER_CRYPTO_DRIVER(aesni_gcm_crypto_drv, aesni_gcm_pmd_drv.driver,
579 cryptodev_driver_id);
582 RTE_INIT(aesni_gcm_init_log)
584 aesni_gcm_logtype_driver = rte_log_register("pmd.crypto.aesni_gcm");