drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2015-2017 Intel Corporation
   3  */
   4
   5 #include <string.h>
   6
   7 #include <rte_common.h>
   8 #include <rte_malloc.h>
   9 #include <rte_cryptodev_pmd.h>
  10
  11 #include "rte_aesni_mb_pmd_private.h"
  12
  13
  14 static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
  15         {       /* MD5 HMAC */
  16                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  17                 {.sym = {
  18                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  19                         {.auth = {
  20                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
  21                                 .block_size = 64,
  22                                 .key_size = {
  23                                         .min = 1,
  24                                         .max = 64,
  25                                         .increment = 1
  26                                 },
  27                                 .digest_size = {
  28                                         .min = 12,
  29                                         .max = 12,
  30                                         .increment = 0
  31                                 },
  32                                 .iv_size = { 0 }
  33                         }, }
  34                 }, }
  35         },
  36         {       /* SHA1 HMAC */
  37                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  38                 {.sym = {
  39                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  40                         {.auth = {
  41                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
  42                                 .block_size = 64,
  43                                 .key_size = {
  44                                         .min = 1,
  45                                         .max = 64,
  46                                         .increment = 1
  47                                 },
  48                                 .digest_size = {
  49                                         .min = 12,
  50                                         .max = 12,
  51                                         .increment = 0
  52                                 },
  53                                 .iv_size = { 0 }
  54                         }, }
  55                 }, }
  56         },
  57         {       /* SHA224 HMAC */
  58                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  59                 {.sym = {
  60                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  61                         {.auth = {
  62                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
  63                                 .block_size = 64,
  64                                 .key_size = {
  65                                         .min = 1,
  66                                         .max = 64,
  67                                         .increment = 1
  68                                 },
  69                                 .digest_size = {
  70                                         .min = 14,
  71                                         .max = 14,
  72                                         .increment = 0
  73                                 },
  74                                 .iv_size = { 0 }
  75                         }, }
  76                 }, }
  77         },
  78         {       /* SHA256 HMAC */
  79                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  80                 {.sym = {
  81                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  82                         {.auth = {
  83                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
  84                                 .block_size = 64,
  85                                 .key_size = {
  86                                         .min = 1,
  87                                         .max = 64,
  88                                         .increment = 1
  89                                 },
  90                                 .digest_size = {
  91                                         .min = 16,
  92                                         .max = 16,
  93                                         .increment = 0
  94                                 },
  95                                 .iv_size = { 0 }
  96                         }, }
  97                 }, }
  98         },
  99         {       /* SHA384 HMAC */
 100                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 101                 {.sym = {
 102                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 103                         {.auth = {
 104                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
 105                                 .block_size = 128,
 106                                 .key_size = {
 107                                         .min = 1,
 108                                         .max = 128,
 109                                         .increment = 1
 110                                 },
 111                                 .digest_size = {
 112                                         .min = 24,
 113                                         .max = 24,
 114                                         .increment = 0
 115                                 },
 116                                 .iv_size = { 0 }
 117                         }, }
 118                 }, }
 119         },
 120         {       /* SHA512 HMAC */
 121                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 122                 {.sym = {
 123                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 124                         {.auth = {
 125                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
 126                                 .block_size = 128,
 127                                 .key_size = {
 128                                         .min = 1,
 129                                         .max = 128,
 130                                         .increment = 1
 131                                 },
 132                                 .digest_size = {
 133                                         .min = 32,
 134                                         .max = 32,
 135                                         .increment = 0
 136                                 },
 137                                 .iv_size = { 0 }
 138                         }, }
 139                 }, }
 140         },
 141         {       /* AES XCBC HMAC */
 142                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 143                 {.sym = {
 144                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 145                         {.auth = {
 146                                 .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
 147                                 .block_size = 16,
 148                                 .key_size = {
 149                                         .min = 16,
 150                                         .max = 16,
 151                                         .increment = 0
 152                                 },
 153                                 .digest_size = {
 154                                         .min = 12,
 155                                         .max = 12,
 156                                         .increment = 0
 157                                 },
 158                                 .iv_size = { 0 }
 159                         }, }
 160                 }, }
 161         },
 162         {       /* AES CBC */
 163                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 164                 {.sym = {
 165                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 166                         {.cipher = {
 167                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
 168                                 .block_size = 16,
 169                                 .key_size = {
 170                                         .min = 16,
 171                                         .max = 32,
 172                                         .increment = 8
 173                                 },
 174                                 .iv_size = {
 175                                         .min = 16,
 176                                         .max = 16,
 177                                         .increment = 0
 178                                 }
 179                         }, }
 180                 }, }
 181         },
 182         {       /* AES CTR */
 183                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 184                 {.sym = {
 185                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 186                         {.cipher = {
 187                                 .algo = RTE_CRYPTO_CIPHER_AES_CTR,
 188                                 .block_size = 16,
 189                                 .key_size = {
 190                                         .min = 16,
 191                                         .max = 32,
 192                                         .increment = 8
 193                                 },
 194                                 .iv_size = {
 195                                         .min = 12,
 196                                         .max = 16,
 197                                         .increment = 4
 198                                 }
 199                         }, }
 200                 }, }
 201         },
 202         {       /* AES DOCSIS BPI */
 203                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 204                 {.sym = {
 205                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 206                         {.cipher = {
 207                                 .algo = RTE_CRYPTO_CIPHER_AES_DOCSISBPI,
 208                                 .block_size = 16,
 209                                 .key_size = {
 210                                         .min = 16,
 211                                         .max = 16,
 212                                         .increment = 0
 213                                 },
 214                                 .iv_size = {
 215                                         .min = 16,
 216                                         .max = 16,
 217                                         .increment = 0
 218                                 }
 219                         }, }
 220                 }, }
 221         },
 222         {       /* DES CBC */
 223                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 224                 {.sym = {
 225                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 226                         {.cipher = {
 227                                 .algo = RTE_CRYPTO_CIPHER_DES_CBC,
 228                                 .block_size = 8,
 229                                 .key_size = {
 230                                         .min = 8,
 231                                         .max = 8,
 232                                         .increment = 0
 233                                 },
 234                                 .iv_size = {
 235                                         .min = 8,
 236                                         .max = 8,
 237                                         .increment = 0
 238                                 }
 239                         }, }
 240                 }, }
 241         },
 242         {       /* DES DOCSIS BPI */
 243                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 244                 {.sym = {
 245                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 246                         {.cipher = {
 247                                 .algo = RTE_CRYPTO_CIPHER_DES_DOCSISBPI,
 248                                 .block_size = 8,
 249                                 .key_size = {
 250                                         .min = 8,
 251                                         .max = 8,
 252                                         .increment = 0
 253                                 },
 254                                 .iv_size = {
 255                                         .min = 8,
 256                                         .max = 8,
 257                                         .increment = 0
 258                                 }
 259                         }, }
 260                 }, }
 261         },
 262
 263
 264
 265         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 266 };
 267
 268
 269 /** Configure device */
 270 static int
 271 aesni_mb_pmd_config(__rte_unused struct rte_cryptodev *dev,
 272                 __rte_unused struct rte_cryptodev_config *config)
 273 {
 274         return 0;
 275 }
 276
 277 /** Start device */
 278 static int
 279 aesni_mb_pmd_start(__rte_unused struct rte_cryptodev *dev)
 280 {
 281         return 0;
 282 }
 283
 284 /** Stop device */
 285 static void
 286 aesni_mb_pmd_stop(__rte_unused struct rte_cryptodev *dev)
 287 {
 288 }
 289
 290 /** Close device */
 291 static int
 292 aesni_mb_pmd_close(__rte_unused struct rte_cryptodev *dev)
 293 {
 294         return 0;
 295 }
 296
 297
 298 /** Get device statistics */
 299 static void
 300 aesni_mb_pmd_stats_get(struct rte_cryptodev *dev,
 301                 struct rte_cryptodev_stats *stats)
 302 {
 303         int qp_id;
 304
 305         for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
 306                 struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 307
 308                 stats->enqueued_count += qp->stats.enqueued_count;
 309                 stats->dequeued_count += qp->stats.dequeued_count;
 310
 311                 stats->enqueue_err_count += qp->stats.enqueue_err_count;
 312                 stats->dequeue_err_count += qp->stats.dequeue_err_count;
 313         }
 314 }
 315
 316 /** Reset device statistics */
 317 static void
 318 aesni_mb_pmd_stats_reset(struct rte_cryptodev *dev)
 319 {
 320         int qp_id;
 321
 322         for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
 323                 struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 324
 325                 memset(&qp->stats, 0, sizeof(qp->stats));
 326         }
 327 }
 328
 329
 330 /** Get device info */
 331 static void
 332 aesni_mb_pmd_info_get(struct rte_cryptodev *dev,
 333                 struct rte_cryptodev_info *dev_info)
 334 {
 335         struct aesni_mb_private *internals = dev->data->dev_private;
 336
 337         if (dev_info != NULL) {
 338                 dev_info->driver_id = dev->driver_id;
 339                 dev_info->feature_flags = dev->feature_flags;
 340                 dev_info->capabilities = aesni_mb_pmd_capabilities;
 341                 dev_info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
 342                 dev_info->sym.max_nb_sessions = internals->max_nb_sessions;
 343         }
 344 }
 345
 346 /** Release queue pair */
 347 static int
 348 aesni_mb_pmd_qp_release(struct rte_cryptodev *dev, uint16_t qp_id)
 349 {
 350         struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 351         struct rte_ring *r = NULL;
 352
 353         if (qp != NULL) {
 354                 r = rte_ring_lookup(qp->name);
 355                 if (r)
 356                         rte_ring_free(r);
 357                 rte_free(qp);
 358                 dev->data->queue_pairs[qp_id] = NULL;
 359         }
 360         return 0;
 361 }
 362
 363 /** set a unique name for the queue pair based on it's name, dev_id and qp_id */
 364 static int
 365 aesni_mb_pmd_qp_set_unique_name(struct rte_cryptodev *dev,
 366                 struct aesni_mb_qp *qp)
 367 {
 368         unsigned n = snprintf(qp->name, sizeof(qp->name),
 369                         "aesni_mb_pmd_%u_qp_%u",
 370                         dev->data->dev_id, qp->id);
 371
 372         if (n >= sizeof(qp->name))
 373                 return -1;
 374
 375         return 0;
 376 }
 377
 378 /** Create a ring to place processed operations on */
 379 static struct rte_ring *
 380 aesni_mb_pmd_qp_create_processed_ops_ring(struct aesni_mb_qp *qp,
 381                 const char *str, unsigned int ring_size, int socket_id)
 382 {
 383         struct rte_ring *r;
 384         char ring_name[RTE_CRYPTODEV_NAME_LEN];
 385
 386         unsigned int n = snprintf(ring_name, sizeof(ring_name),
 387                                 "%s_%s",
 388                                 qp->name, str);
 389
 390         if (n >= sizeof(ring_name))
 391                 return NULL;
 392
 393         r = rte_ring_lookup(ring_name);
 394         if (r) {
 395                 if (rte_ring_get_size(r) >= ring_size) {
 396                         MB_LOG_INFO("Reusing existing ring %s for processed ops",
 397                         ring_name);
 398                         return r;
 399                 }
 400
 401                 MB_LOG_ERR("Unable to reuse existing ring %s for processed ops",
 402                         ring_name);
 403                 return NULL;
 404         }
 405
 406         return rte_ring_create(ring_name, ring_size, socket_id,
 407                         RING_F_SP_ENQ | RING_F_SC_DEQ);
 408 }
 409
 410 /** Setup a queue pair */
 411 static int
 412 aesni_mb_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 413                 const struct rte_cryptodev_qp_conf *qp_conf,
 414                 int socket_id, struct rte_mempool *session_pool)
 415 {
 416         struct aesni_mb_qp *qp = NULL;
 417         struct aesni_mb_private *internals = dev->data->dev_private;
 418
 419         /* Free memory prior to re-allocation if needed. */
 420         if (dev->data->queue_pairs[qp_id] != NULL)
 421                 aesni_mb_pmd_qp_release(dev, qp_id);
 422
 423         /* Allocate the queue pair data structure. */
 424         qp = rte_zmalloc_socket("AES-NI PMD Queue Pair", sizeof(*qp),
 425                                         RTE_CACHE_LINE_SIZE, socket_id);
 426         if (qp == NULL)
 427                 return -ENOMEM;
 428
 429         qp->id = qp_id;
 430         dev->data->queue_pairs[qp_id] = qp;
 431
 432         if (aesni_mb_pmd_qp_set_unique_name(dev, qp))
 433                 goto qp_setup_cleanup;
 434
 435
 436         qp->op_fns = &job_ops[internals->vector_mode];
 437
 438         qp->ingress_queue = aesni_mb_pmd_qp_create_processed_ops_ring(qp,
 439                         "ingress", qp_conf->nb_descriptors, socket_id);
 440         if (qp->ingress_queue == NULL)
 441                 goto qp_setup_cleanup;
 442
 443         qp->sess_mp = session_pool;
 444
 445         memset(&qp->stats, 0, sizeof(qp->stats));
 446
 447         char mp_name[RTE_MEMPOOL_NAMESIZE];
 448
 449         snprintf(mp_name, RTE_MEMPOOL_NAMESIZE,
 450                                 "digest_mp_%u_%u", dev->data->dev_id, qp_id);
 451
 452         /* Initialise multi-buffer manager */
 453         (*qp->op_fns->job.init_mgr)(&qp->mb_mgr);
 454         return 0;
 455
 456 qp_setup_cleanup:
 457         if (qp)
 458                 rte_free(qp);
 459
 460         return -1;
 461 }
 462
 463 /** Start queue pair */
 464 static int
 465 aesni_mb_pmd_qp_start(__rte_unused struct rte_cryptodev *dev,
 466                 __rte_unused uint16_t queue_pair_id)
 467 {
 468         return -ENOTSUP;
 469 }
 470
 471 /** Stop queue pair */
 472 static int
 473 aesni_mb_pmd_qp_stop(__rte_unused struct rte_cryptodev *dev,
 474                 __rte_unused uint16_t queue_pair_id)
 475 {
 476         return -ENOTSUP;
 477 }
 478
 479 /** Return the number of allocated queue pairs */
 480 static uint32_t
 481 aesni_mb_pmd_qp_count(struct rte_cryptodev *dev)
 482 {
 483         return dev->data->nb_queue_pairs;
 484 }
 485
 486 /** Returns the size of the aesni multi-buffer session structure */
 487 static unsigned
 488 aesni_mb_pmd_session_get_size(struct rte_cryptodev *dev __rte_unused)
 489 {
 490         return sizeof(struct aesni_mb_session);
 491 }
 492
 493 /** Configure a aesni multi-buffer session from a crypto xform chain */
 494 static int
 495 aesni_mb_pmd_session_configure(struct rte_cryptodev *dev,
 496                 struct rte_crypto_sym_xform *xform,
 497                 struct rte_cryptodev_sym_session *sess,
 498                 struct rte_mempool *mempool)
 499 {
 500         void *sess_private_data;
 501         struct aesni_mb_private *internals = dev->data->dev_private;
 502         int ret;
 503
 504         if (unlikely(sess == NULL)) {
 505                 MB_LOG_ERR("invalid session struct");
 506                 return -EINVAL;
 507         }
 508
 509         if (rte_mempool_get(mempool, &sess_private_data)) {
 510                 CDEV_LOG_ERR(
 511                         "Couldn't get object from session mempool");
 512                 return -ENOMEM;
 513         }
 514
 515         ret = aesni_mb_set_session_parameters(&job_ops[internals->vector_mode],
 516                         sess_private_data, xform);
 517         if (ret != 0) {
 518                 MB_LOG_ERR("failed configure session parameters");
 519
 520                 /* Return session to mempool */
 521                 rte_mempool_put(mempool, sess_private_data);
 522                 return ret;
 523         }
 524
 525         set_session_private_data(sess, dev->driver_id,
 526                         sess_private_data);
 527
 528         return 0;
 529 }
 530
 531 /** Clear the memory of session so it doesn't leave key material behind */
 532 static void
 533 aesni_mb_pmd_session_clear(struct rte_cryptodev *dev,
 534                 struct rte_cryptodev_sym_session *sess)
 535 {
 536         uint8_t index = dev->driver_id;
 537         void *sess_priv = get_session_private_data(sess, index);
 538
 539         /* Zero out the whole structure */
 540         if (sess_priv) {
 541                 memset(sess_priv, 0, sizeof(struct aesni_mb_session));
 542                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
 543                 set_session_private_data(sess, index, NULL);
 544                 rte_mempool_put(sess_mp, sess_priv);
 545         }
 546 }
 547
 548 struct rte_cryptodev_ops aesni_mb_pmd_ops = {
 549                 .dev_configure          = aesni_mb_pmd_config,
 550                 .dev_start              = aesni_mb_pmd_start,
 551                 .dev_stop               = aesni_mb_pmd_stop,
 552                 .dev_close              = aesni_mb_pmd_close,
 553
 554                 .stats_get              = aesni_mb_pmd_stats_get,
 555                 .stats_reset            = aesni_mb_pmd_stats_reset,
 556
 557                 .dev_infos_get          = aesni_mb_pmd_info_get,
 558
 559                 .queue_pair_setup       = aesni_mb_pmd_qp_setup,
 560                 .queue_pair_release     = aesni_mb_pmd_qp_release,
 561                 .queue_pair_start       = aesni_mb_pmd_qp_start,
 562                 .queue_pair_stop        = aesni_mb_pmd_qp_stop,
 563                 .queue_pair_count       = aesni_mb_pmd_qp_count,
 564
 565                 .session_get_size       = aesni_mb_pmd_session_get_size,
 566                 .session_configure      = aesni_mb_pmd_session_configure,
 567                 .session_clear          = aesni_mb_pmd_session_clear
 568 };
 569
 570 struct rte_cryptodev_ops *rte_aesni_mb_pmd_ops = &aesni_mb_pmd_ops;