drivers/crypto/bcmfs/hw/bcmfs_rm_common.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2020 Broadcom.
   3  * All rights reserved.
   4  */
   5
   6 #include "bcmfs_hw_defs.h"
   7 #include "bcmfs_rm_common.h"
   8
   9 /* Completion descriptor format */
  10 #define FS_CMPL_OPAQUE_SHIFT                    0
  11 #define FS_CMPL_OPAQUE_MASK                     0xffff
  12 #define FS_CMPL_ENGINE_STATUS_SHIFT             16
  13 #define FS_CMPL_ENGINE_STATUS_MASK              0xffff
  14 #define FS_CMPL_DME_STATUS_SHIFT                32
  15 #define FS_CMPL_DME_STATUS_MASK                 0xffff
  16 #define FS_CMPL_RM_STATUS_SHIFT                 48
  17 #define FS_CMPL_RM_STATUS_MASK                  0xffff
  18 /* Completion RM status code */
  19 #define FS_RM_STATUS_CODE_SHIFT                 0
  20 #define FS_RM_STATUS_CODE_MASK                  0x3ff
  21 #define FS_RM_STATUS_CODE_GOOD                  0x0
  22 #define FS_RM_STATUS_CODE_AE_TIMEOUT            0x3ff
  23
  24
  25 /* Completion DME status code */
  26 #define FS_DME_STATUS_MEM_COR_ERR               BIT(0)
  27 #define FS_DME_STATUS_MEM_UCOR_ERR              BIT(1)
  28 #define FS_DME_STATUS_FIFO_UNDRFLOW             BIT(2)
  29 #define FS_DME_STATUS_FIFO_OVERFLOW             BIT(3)
  30 #define FS_DME_STATUS_RRESP_ERR                 BIT(4)
  31 #define FS_DME_STATUS_BRESP_ERR                 BIT(5)
  32 #define FS_DME_STATUS_ERROR_MASK                (FS_DME_STATUS_MEM_COR_ERR | \
  33                                                  FS_DME_STATUS_MEM_UCOR_ERR | \
  34                                                  FS_DME_STATUS_FIFO_UNDRFLOW | \
  35                                                  FS_DME_STATUS_FIFO_OVERFLOW | \
  36                                                  FS_DME_STATUS_RRESP_ERR | \
  37                                                  FS_DME_STATUS_BRESP_ERR)
  38
  39 /* APIs related to ring manager descriptors */
  40 uint64_t
  41 rm_build_desc(uint64_t val, uint32_t shift,
  42            uint64_t mask)
  43 {
  44         return((val & mask) << shift);
  45 }
  46
  47 uint64_t
  48 rm_read_desc(void *desc_ptr)
  49 {
  50         return le64_to_cpu(*((uint64_t *)desc_ptr));
  51 }
  52
  53 void
  54 rm_write_desc(void *desc_ptr, uint64_t desc)
  55 {
  56         *((uint64_t *)desc_ptr) = cpu_to_le64(desc);
  57 }
  58
  59 uint32_t
  60 rm_cmpl_desc_to_reqid(uint64_t cmpl_desc)
  61 {
  62         return (uint32_t)(cmpl_desc & FS_CMPL_OPAQUE_MASK);
  63 }
  64
  65 int
  66 rm_cmpl_desc_to_error(uint64_t cmpl_desc)
  67 {
  68         uint32_t status;
  69
  70         status = FS_DESC_DEC(cmpl_desc, FS_CMPL_DME_STATUS_SHIFT,
  71                              FS_CMPL_DME_STATUS_MASK);
  72         if (status & FS_DME_STATUS_ERROR_MASK)
  73                 return -EIO;
  74
  75         status = FS_DESC_DEC(cmpl_desc, FS_CMPL_RM_STATUS_SHIFT,
  76                              FS_CMPL_RM_STATUS_MASK);
  77         status &= FS_RM_STATUS_CODE_MASK;
  78         if (status == FS_RM_STATUS_CODE_AE_TIMEOUT)
  79                 return -ETIMEDOUT;
  80
  81         return 0;
  82 }