1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2017-2018 NXP
10 #include <rte_byteorder.h>
11 #include <rte_common.h>
12 #include <rte_cryptodev_pmd.h>
13 #include <rte_crypto.h>
14 #include <rte_cryptodev.h>
15 #include <rte_bus_vdev.h>
16 #include <rte_malloc.h>
17 #include <rte_security_driver.h>
18 #include <rte_hexdump.h>
20 #include <caam_jr_capabilities.h>
21 #include <caam_jr_config.h>
22 #include <caam_jr_hw_specific.h>
23 #include <caam_jr_pvt.h>
24 #include <caam_jr_desc.h>
25 #include <caam_jr_log.h>
27 /* RTA header files */
28 #include <hw/desc/common.h>
29 #include <hw/desc/algo.h>
30 #include <hw/desc/ipsec.h>
34 #define CRYPTODEV_NAME_CAAM_JR_PMD crypto_caam_jr
35 static uint8_t cryptodev_driver_id;
38 enum rta_sec_era rta_sec_era;
40 /* Lists the states possible for the SEC user space driver. */
41 enum sec_driver_state_e {
42 SEC_DRIVER_STATE_IDLE, /* Driver not initialized */
43 SEC_DRIVER_STATE_STARTED, /* Driver initialized and can be used*/
44 SEC_DRIVER_STATE_RELEASE, /* Driver release is in progress */
47 /* Job rings used for communication with SEC HW */
48 static struct sec_job_ring_t g_job_rings[MAX_SEC_JOB_RINGS];
50 /* The current state of SEC user space driver */
51 static enum sec_driver_state_e g_driver_state = SEC_DRIVER_STATE_IDLE;
53 /* The number of job rings used by SEC user space driver */
54 static int g_job_rings_no;
55 static int g_job_rings_max;
57 struct sec_outring_entry {
58 phys_addr_t desc; /* Pointer to completed descriptor */
59 uint32_t status; /* Status for completed descriptor */
62 /* virtual address conversin when mempool support is available for ctx */
63 static inline phys_addr_t
64 caam_jr_vtop_ctx(struct caam_jr_op_ctx *ctx, void *vaddr)
66 PMD_INIT_FUNC_TRACE();
67 return (size_t)vaddr - ctx->vtop_offset;
71 caam_jr_op_ending(struct caam_jr_op_ctx *ctx)
73 PMD_INIT_FUNC_TRACE();
74 /* report op status to sym->op and then free the ctx memeory */
75 rte_mempool_put(ctx->ctx_pool, (void *)ctx);
78 static inline struct caam_jr_op_ctx *
79 caam_jr_alloc_ctx(struct caam_jr_session *ses)
81 struct caam_jr_op_ctx *ctx;
84 PMD_INIT_FUNC_TRACE();
85 ret = rte_mempool_get(ses->ctx_pool, (void **)(&ctx));
87 CAAM_JR_DP_WARN("Alloc sec descriptor failed!");
91 * Clear SG memory. There are 16 SG entries of 16 Bytes each.
92 * one call to dcbz_64() clear 64 bytes, hence calling it 4 times
93 * to clear all the SG entries. caam_jr_alloc_ctx() is called for
94 * each packet, memset is costlier than dcbz_64().
96 dcbz_64(&ctx->sg[SG_CACHELINE_0]);
97 dcbz_64(&ctx->sg[SG_CACHELINE_1]);
98 dcbz_64(&ctx->sg[SG_CACHELINE_2]);
99 dcbz_64(&ctx->sg[SG_CACHELINE_3]);
101 ctx->ctx_pool = ses->ctx_pool;
102 ctx->vtop_offset = (size_t) ctx - rte_mempool_virt2iova(ctx);
108 void caam_jr_stats_get(struct rte_cryptodev *dev,
109 struct rte_cryptodev_stats *stats)
111 struct caam_jr_qp **qp = (struct caam_jr_qp **)
112 dev->data->queue_pairs;
115 PMD_INIT_FUNC_TRACE();
117 CAAM_JR_ERR("Invalid stats ptr NULL");
120 for (i = 0; i < dev->data->nb_queue_pairs; i++) {
122 CAAM_JR_WARN("Uninitialised queue pair");
126 stats->enqueued_count += qp[i]->tx_pkts;
127 stats->dequeued_count += qp[i]->rx_pkts;
128 stats->enqueue_err_count += qp[i]->tx_errs;
129 stats->dequeue_err_count += qp[i]->rx_errs;
130 CAAM_JR_INFO("extra stats:\n\tRX Poll ERR = %" PRIu64
131 "\n\tTX Ring Full = %" PRIu64,
133 qp[i]->tx_ring_full);
138 void caam_jr_stats_reset(struct rte_cryptodev *dev)
141 struct caam_jr_qp **qp = (struct caam_jr_qp **)
142 (dev->data->queue_pairs);
144 PMD_INIT_FUNC_TRACE();
145 for (i = 0; i < dev->data->nb_queue_pairs; i++) {
147 CAAM_JR_WARN("Uninitialised queue pair");
152 qp[i]->rx_poll_err = 0;
155 qp[i]->tx_ring_full = 0;
160 is_cipher_only(struct caam_jr_session *ses)
162 PMD_INIT_FUNC_TRACE();
163 return ((ses->cipher_alg != RTE_CRYPTO_CIPHER_NULL) &&
164 (ses->auth_alg == RTE_CRYPTO_AUTH_NULL));
168 is_auth_only(struct caam_jr_session *ses)
170 PMD_INIT_FUNC_TRACE();
171 return ((ses->cipher_alg == RTE_CRYPTO_CIPHER_NULL) &&
172 (ses->auth_alg != RTE_CRYPTO_AUTH_NULL));
176 is_aead(struct caam_jr_session *ses)
178 PMD_INIT_FUNC_TRACE();
179 return ((ses->cipher_alg == 0) &&
180 (ses->auth_alg == 0) &&
181 (ses->aead_alg != 0));
185 is_auth_cipher(struct caam_jr_session *ses)
187 PMD_INIT_FUNC_TRACE();
188 return ((ses->cipher_alg != RTE_CRYPTO_CIPHER_NULL) &&
189 (ses->auth_alg != RTE_CRYPTO_AUTH_NULL));
193 is_encode(struct caam_jr_session *ses)
195 PMD_INIT_FUNC_TRACE();
196 return ses->dir == DIR_ENC;
200 is_decode(struct caam_jr_session *ses)
202 PMD_INIT_FUNC_TRACE();
203 return ses->dir == DIR_DEC;
207 caam_auth_alg(struct caam_jr_session *ses, struct alginfo *alginfo_a)
209 PMD_INIT_FUNC_TRACE();
210 switch (ses->auth_alg) {
211 case RTE_CRYPTO_AUTH_NULL:
212 ses->digest_length = 0;
214 case RTE_CRYPTO_AUTH_MD5_HMAC:
215 alginfo_a->algtype = OP_ALG_ALGSEL_MD5;
216 alginfo_a->algmode = OP_ALG_AAI_HMAC;
218 case RTE_CRYPTO_AUTH_SHA1_HMAC:
219 alginfo_a->algtype = OP_ALG_ALGSEL_SHA1;
220 alginfo_a->algmode = OP_ALG_AAI_HMAC;
222 case RTE_CRYPTO_AUTH_SHA224_HMAC:
223 alginfo_a->algtype = OP_ALG_ALGSEL_SHA224;
224 alginfo_a->algmode = OP_ALG_AAI_HMAC;
226 case RTE_CRYPTO_AUTH_SHA256_HMAC:
227 alginfo_a->algtype = OP_ALG_ALGSEL_SHA256;
228 alginfo_a->algmode = OP_ALG_AAI_HMAC;
230 case RTE_CRYPTO_AUTH_SHA384_HMAC:
231 alginfo_a->algtype = OP_ALG_ALGSEL_SHA384;
232 alginfo_a->algmode = OP_ALG_AAI_HMAC;
234 case RTE_CRYPTO_AUTH_SHA512_HMAC:
235 alginfo_a->algtype = OP_ALG_ALGSEL_SHA512;
236 alginfo_a->algmode = OP_ALG_AAI_HMAC;
239 CAAM_JR_DEBUG("unsupported auth alg %u", ses->auth_alg);
244 caam_cipher_alg(struct caam_jr_session *ses, struct alginfo *alginfo_c)
246 PMD_INIT_FUNC_TRACE();
247 switch (ses->cipher_alg) {
248 case RTE_CRYPTO_CIPHER_NULL:
250 case RTE_CRYPTO_CIPHER_AES_CBC:
251 alginfo_c->algtype = OP_ALG_ALGSEL_AES;
252 alginfo_c->algmode = OP_ALG_AAI_CBC;
254 case RTE_CRYPTO_CIPHER_3DES_CBC:
255 alginfo_c->algtype = OP_ALG_ALGSEL_3DES;
256 alginfo_c->algmode = OP_ALG_AAI_CBC;
258 case RTE_CRYPTO_CIPHER_AES_CTR:
259 alginfo_c->algtype = OP_ALG_ALGSEL_AES;
260 alginfo_c->algmode = OP_ALG_AAI_CTR;
263 CAAM_JR_DEBUG("unsupported cipher alg %d", ses->cipher_alg);
268 caam_aead_alg(struct caam_jr_session *ses, struct alginfo *alginfo)
270 PMD_INIT_FUNC_TRACE();
271 switch (ses->aead_alg) {
272 case RTE_CRYPTO_AEAD_AES_GCM:
273 alginfo->algtype = OP_ALG_ALGSEL_AES;
274 alginfo->algmode = OP_ALG_AAI_GCM;
277 CAAM_JR_DEBUG("unsupported AEAD alg %d", ses->aead_alg);
281 /* prepare command block of the session */
283 caam_jr_prep_cdb(struct caam_jr_session *ses)
285 struct alginfo alginfo_c = {0}, alginfo_a = {0}, alginfo = {0};
286 int32_t shared_desc_len = 0;
289 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
295 PMD_INIT_FUNC_TRACE();
297 caam_jr_dma_free(ses->cdb);
299 cdb = caam_jr_dma_mem_alloc(L1_CACHE_BYTES, sizeof(struct sec_cdb));
301 CAAM_JR_ERR("failed to allocate memory for cdb\n");
307 memset(cdb, 0, sizeof(struct sec_cdb));
309 if (is_cipher_only(ses)) {
310 caam_cipher_alg(ses, &alginfo_c);
311 if (alginfo_c.algtype == (unsigned int)CAAM_JR_ALG_UNSUPPORT) {
312 CAAM_JR_ERR("not supported cipher alg");
317 alginfo_c.key = (size_t)ses->cipher_key.data;
318 alginfo_c.keylen = ses->cipher_key.length;
319 alginfo_c.key_enc_flags = 0;
320 alginfo_c.key_type = RTA_DATA_IMM;
322 shared_desc_len = cnstr_shdsc_blkcipher(
328 } else if (is_auth_only(ses)) {
329 caam_auth_alg(ses, &alginfo_a);
330 if (alginfo_a.algtype == (unsigned int)CAAM_JR_ALG_UNSUPPORT) {
331 CAAM_JR_ERR("not supported auth alg");
336 alginfo_a.key = (size_t)ses->auth_key.data;
337 alginfo_a.keylen = ses->auth_key.length;
338 alginfo_a.key_enc_flags = 0;
339 alginfo_a.key_type = RTA_DATA_IMM;
341 shared_desc_len = cnstr_shdsc_hmac(cdb->sh_desc, true,
345 } else if (is_aead(ses)) {
346 caam_aead_alg(ses, &alginfo);
347 if (alginfo.algtype == (unsigned int)CAAM_JR_ALG_UNSUPPORT) {
348 CAAM_JR_ERR("not supported aead alg");
352 alginfo.key = (size_t)ses->aead_key.data;
353 alginfo.keylen = ses->aead_key.length;
354 alginfo.key_enc_flags = 0;
355 alginfo.key_type = RTA_DATA_IMM;
357 if (ses->dir == DIR_ENC)
358 shared_desc_len = cnstr_shdsc_gcm_encap(
359 cdb->sh_desc, true, swap,
364 shared_desc_len = cnstr_shdsc_gcm_decap(
365 cdb->sh_desc, true, swap,
370 caam_cipher_alg(ses, &alginfo_c);
371 if (alginfo_c.algtype == (unsigned int)CAAM_JR_ALG_UNSUPPORT) {
372 CAAM_JR_ERR("not supported cipher alg");
377 alginfo_c.key = (size_t)ses->cipher_key.data;
378 alginfo_c.keylen = ses->cipher_key.length;
379 alginfo_c.key_enc_flags = 0;
380 alginfo_c.key_type = RTA_DATA_IMM;
382 caam_auth_alg(ses, &alginfo_a);
383 if (alginfo_a.algtype == (unsigned int)CAAM_JR_ALG_UNSUPPORT) {
384 CAAM_JR_ERR("not supported auth alg");
389 alginfo_a.key = (size_t)ses->auth_key.data;
390 alginfo_a.keylen = ses->auth_key.length;
391 alginfo_a.key_enc_flags = 0;
392 alginfo_a.key_type = RTA_DATA_IMM;
394 cdb->sh_desc[0] = alginfo_c.keylen;
395 cdb->sh_desc[1] = alginfo_a.keylen;
396 err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
398 (unsigned int *)cdb->sh_desc,
399 &cdb->sh_desc[2], 2);
402 CAAM_JR_ERR("Crypto: Incorrect key lengths");
406 if (cdb->sh_desc[2] & 1)
407 alginfo_c.key_type = RTA_DATA_IMM;
409 alginfo_c.key = (size_t)caam_jr_mem_vtop(
410 (void *)(size_t)alginfo_c.key);
411 alginfo_c.key_type = RTA_DATA_PTR;
413 if (cdb->sh_desc[2] & (1<<1))
414 alginfo_a.key_type = RTA_DATA_IMM;
416 alginfo_a.key = (size_t)caam_jr_mem_vtop(
417 (void *)(size_t)alginfo_a.key);
418 alginfo_a.key_type = RTA_DATA_PTR;
423 /* Auth_only_len is set as 0 here and it will be
424 * overwritten in fd for each packet.
426 shared_desc_len = cnstr_shdsc_authenc(cdb->sh_desc,
427 true, swap, &alginfo_c, &alginfo_a,
429 ses->digest_length, ses->dir);
432 if (shared_desc_len < 0) {
433 CAAM_JR_ERR("error in preparing command block");
434 return shared_desc_len;
438 SEC_DUMP_DESC(cdb->sh_desc);
441 cdb->sh_hdr.hi.field.idlen = shared_desc_len;
446 /* @brief Poll the HW for already processed jobs in the JR
447 * and silently discard the available jobs or notify them to UA
448 * with indicated error code.
450 * @param [in,out] job_ring The job ring to poll.
451 * @param [in] do_notify Can be #TRUE or #FALSE. Indicates if
452 * descriptors are to be discarded
453 * or notified to UA with given error_code.
454 * @param [out] notified_descs Number of notified descriptors. Can be NULL
455 * if do_notify is #FALSE
458 hw_flush_job_ring(struct sec_job_ring_t *job_ring,
460 uint32_t *notified_descs)
462 int32_t jobs_no_to_discard = 0;
463 int32_t discarded_descs_no = 0;
465 PMD_INIT_FUNC_TRACE();
466 CAAM_JR_DEBUG("Jr[%p] pi[%d] ci[%d].Flushing jr notify desc=[%d]",
467 job_ring, job_ring->pidx, job_ring->cidx, do_notify);
469 jobs_no_to_discard = hw_get_no_finished_jobs(job_ring);
471 /* Discard all jobs */
472 CAAM_JR_DEBUG("Jr[%p] pi[%d] ci[%d].Discarding %d descs",
473 job_ring, job_ring->pidx, job_ring->cidx,
476 while (jobs_no_to_discard > discarded_descs_no) {
477 discarded_descs_no++;
478 /* Now increment the consumer index for the current job ring,
479 * AFTER saving job in temporary location!
480 * Increment the consumer index for the current job ring
482 job_ring->cidx = SEC_CIRCULAR_COUNTER(job_ring->cidx,
485 hw_remove_entries(job_ring, 1);
488 if (do_notify == true) {
489 ASSERT(notified_descs != NULL);
490 *notified_descs = discarded_descs_no;
494 /* @brief Poll the HW for already processed jobs in the JR
495 * and notify the available jobs to UA.
497 * @param [in] job_ring The job ring to poll.
498 * @param [in] limit The maximum number of jobs to notify.
499 * If set to negative value, all available jobs are
502 * @retval >=0 for No of jobs notified to UA.
503 * @retval -1 for error
506 hw_poll_job_ring(struct sec_job_ring_t *job_ring,
507 struct rte_crypto_op **ops, int32_t limit,
508 struct caam_jr_qp *jr_qp)
510 int32_t jobs_no_to_notify = 0; /* the number of done jobs to notify*/
511 int32_t number_of_jobs_available = 0;
512 int32_t notified_descs_no = 0;
513 uint32_t sec_error_code = 0;
514 struct job_descriptor *current_desc;
515 phys_addr_t current_desc_addr;
516 phys_addr_t *temp_addr;
517 struct caam_jr_op_ctx *ctx;
519 PMD_INIT_FUNC_TRACE();
520 /* TODO check for ops have memory*/
521 /* check here if any JR error that cannot be written
522 * in the output status word has occurred
524 if (JR_REG_JRINT_JRE_EXTRACT(GET_JR_REG(JRINT, job_ring))) {
525 CAAM_JR_INFO("err received");
526 sec_error_code = JR_REG_JRINT_ERR_TYPE_EXTRACT(
527 GET_JR_REG(JRINT, job_ring));
528 if (unlikely(sec_error_code)) {
529 hw_job_ring_error_print(job_ring, sec_error_code);
533 /* compute the number of jobs available in the job ring based on the
534 * producer and consumer index values.
536 number_of_jobs_available = hw_get_no_finished_jobs(job_ring);
537 /* Compute the number of notifications that need to be raised to UA
538 * If limit > total number of done jobs -> notify all done jobs
539 * If limit = 0 -> error
540 * If limit < total number of done jobs -> notify a number
541 * of done jobs equal with limit
543 jobs_no_to_notify = (limit > number_of_jobs_available) ?
544 number_of_jobs_available : limit;
546 "Jr[%p] pi[%d] ci[%d].limit =%d Available=%d.Jobs to notify=%d",
547 job_ring, job_ring->pidx, job_ring->cidx,
548 limit, number_of_jobs_available, jobs_no_to_notify);
552 while (jobs_no_to_notify > notified_descs_no) {
553 static uint64_t false_alarm;
554 static uint64_t real_poll;
556 /* Get job status here */
557 sec_error_code = job_ring->output_ring[job_ring->cidx].status;
558 /* Get completed descriptor */
559 temp_addr = &(job_ring->output_ring[job_ring->cidx].desc);
560 current_desc_addr = (phys_addr_t)sec_read_addr(temp_addr);
563 /* todo check if it is false alarm no desc present */
564 if (!current_desc_addr) {
566 printf("false alarm %" PRIu64 "real %" PRIu64
567 " sec_err =0x%x cidx Index =0%d\n",
568 false_alarm, real_poll,
569 sec_error_code, job_ring->cidx);
570 rte_panic("CAAM JR descriptor NULL");
571 return notified_descs_no;
573 current_desc = (struct job_descriptor *)
574 caam_jr_dma_ptov(current_desc_addr);
575 /* now increment the consumer index for the current job ring,
576 * AFTER saving job in temporary location!
578 job_ring->cidx = SEC_CIRCULAR_COUNTER(job_ring->cidx,
580 /* Signal that the job has been processed and the slot is free*/
581 hw_remove_entries(job_ring, 1);
582 /*TODO for multiple ops, packets*/
583 ctx = container_of(current_desc, struct caam_jr_op_ctx, jobdes);
584 if (unlikely(sec_error_code)) {
585 CAAM_JR_ERR("desc at cidx %d generated error 0x%x\n",
586 job_ring->cidx, sec_error_code);
587 hw_handle_job_ring_error(job_ring, sec_error_code);
588 //todo improve with exact errors
589 ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
592 ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
594 if (ctx->op->sym->m_dst) {
595 rte_hexdump(stdout, "PROCESSED",
596 rte_pktmbuf_mtod(ctx->op->sym->m_dst, void *),
597 rte_pktmbuf_data_len(ctx->op->sym->m_dst));
599 rte_hexdump(stdout, "PROCESSED",
600 rte_pktmbuf_mtod(ctx->op->sym->m_src, void *),
601 rte_pktmbuf_data_len(ctx->op->sym->m_src));
605 if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
608 if (ctx->op->sym->m_dst) {
609 /*TODO check for ip header or other*/
610 ip4_hdr = (struct ip *)
611 rte_pktmbuf_mtod(ctx->op->sym->m_dst, char*);
612 ctx->op->sym->m_dst->pkt_len =
613 rte_be_to_cpu_16(ip4_hdr->ip_len);
614 ctx->op->sym->m_dst->data_len =
615 rte_be_to_cpu_16(ip4_hdr->ip_len);
617 ip4_hdr = (struct ip *)
618 rte_pktmbuf_mtod(ctx->op->sym->m_src, char*);
619 ctx->op->sym->m_src->pkt_len =
620 rte_be_to_cpu_16(ip4_hdr->ip_len);
621 ctx->op->sym->m_src->data_len =
622 rte_be_to_cpu_16(ip4_hdr->ip_len);
626 caam_jr_op_ending(ctx);
630 return notified_descs_no;
634 caam_jr_dequeue_burst(void *qp, struct rte_crypto_op **ops,
637 struct caam_jr_qp *jr_qp = (struct caam_jr_qp *)qp;
638 struct sec_job_ring_t *ring = jr_qp->ring;
642 PMD_INIT_FUNC_TRACE();
643 CAAM_JR_DP_DEBUG("Jr[%p]Polling. limit[%d]", ring, nb_ops);
646 * If nb_ops < 0 -> poll JR until no more notifications are available.
647 * If nb_ops > 0 -> poll JR until limit is reached.
650 /* Run hw poll job ring */
651 num_rx = hw_poll_job_ring(ring, ops, nb_ops, jr_qp);
653 CAAM_JR_ERR("Error polling SEC engine (%d)", num_rx);
657 CAAM_JR_DP_DEBUG("Jr[%p].Jobs notified[%d]. ", ring, num_rx);
659 if (ring->jr_mode == SEC_NOTIFICATION_TYPE_NAPI) {
660 if (num_rx < nb_ops) {
661 ret = caam_jr_enable_irqs(ring->irq_fd);
662 SEC_ASSERT(ret == 0, ret,
663 "Failed to enable irqs for job ring %p", ring);
665 } else if (ring->jr_mode == SEC_NOTIFICATION_TYPE_IRQ) {
667 /* Always enable IRQ generation when in pure IRQ mode */
668 ret = caam_jr_enable_irqs(ring->irq_fd);
669 SEC_ASSERT(ret == 0, ret,
670 "Failed to enable irqs for job ring %p", ring);
673 jr_qp->rx_pkts += num_rx;
680 * |<----data_len------->|
681 * |ip_header|ah_header|icv|payload|
686 static inline struct caam_jr_op_ctx *
687 build_auth_only_sg(struct rte_crypto_op *op, struct caam_jr_session *ses)
689 struct rte_crypto_sym_op *sym = op->sym;
690 struct rte_mbuf *mbuf = sym->m_src;
691 struct caam_jr_op_ctx *ctx;
692 struct sec4_sg_entry *sg;
695 uint64_t sdesc_offset;
696 struct sec_job_descriptor_t *jobdescr;
699 PMD_INIT_FUNC_TRACE();
705 if ((mbuf->nb_segs + extra_segs) > MAX_SG_ENTRIES) {
706 CAAM_JR_DP_ERR("Auth: Max sec segs supported is %d",
711 ctx = caam_jr_alloc_ctx(ses);
718 sdesc_offset = (size_t) ((char *)&cdb->sh_desc - (char *)cdb);
720 jobdescr = (struct sec_job_descriptor_t *) ctx->jobdes.desc;
722 SEC_JD_INIT(jobdescr);
723 SEC_JD_SET_SD(jobdescr,
724 (phys_addr_t)(caam_jr_dma_vtop(cdb)) + sdesc_offset,
725 cdb->sh_hdr.hi.field.idlen);
728 SEC_JD_SET_OUT_PTR(jobdescr, (uint64_t)sym->auth.digest.phys_addr,
729 0, ses->digest_length);
733 length = sym->auth.data.length;
734 sg->ptr = cpu_to_caam64(rte_pktmbuf_iova(mbuf) + sym->auth.data.offset);
735 sg->len = cpu_to_caam32(mbuf->data_len - sym->auth.data.offset);
737 /* Successive segs */
741 sg->ptr = cpu_to_caam64(rte_pktmbuf_iova(mbuf));
742 sg->len = cpu_to_caam32(mbuf->data_len);
746 if (is_decode(ses)) {
747 /* digest verification case */
749 /* hash result or digest, save digest first */
750 rte_memcpy(ctx->digest, sym->auth.digest.data,
753 rte_hexdump(stdout, "ICV", ctx->digest, ses->digest_length);
755 sg->ptr = cpu_to_caam64(caam_jr_vtop_ctx(ctx, ctx->digest));
756 sg->len = cpu_to_caam32(ses->digest_length);
757 length += ses->digest_length;
759 length -= ses->digest_length;
763 sg->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
765 SEC_JD_SET_IN_PTR(jobdescr,
766 (uint64_t)caam_jr_vtop_ctx(ctx, &ctx->sg[0]), 0, length);
767 /* enabling sg list */
768 (jobdescr)->seq_in.command.word |= 0x01000000;
773 static inline struct caam_jr_op_ctx *
774 build_auth_only(struct rte_crypto_op *op, struct caam_jr_session *ses)
776 struct rte_crypto_sym_op *sym = op->sym;
777 struct caam_jr_op_ctx *ctx;
778 struct sec4_sg_entry *sg;
779 rte_iova_t start_addr;
781 uint64_t sdesc_offset;
782 struct sec_job_descriptor_t *jobdescr;
784 PMD_INIT_FUNC_TRACE();
785 ctx = caam_jr_alloc_ctx(ses);
792 sdesc_offset = (size_t) ((char *)&cdb->sh_desc - (char *)cdb);
794 start_addr = rte_pktmbuf_iova(sym->m_src);
796 jobdescr = (struct sec_job_descriptor_t *) ctx->jobdes.desc;
798 SEC_JD_INIT(jobdescr);
799 SEC_JD_SET_SD(jobdescr,
800 (phys_addr_t)(caam_jr_dma_vtop(cdb)) + sdesc_offset,
801 cdb->sh_hdr.hi.field.idlen);
804 SEC_JD_SET_OUT_PTR(jobdescr, (uint64_t)sym->auth.digest.phys_addr,
805 0, ses->digest_length);
808 if (is_decode(ses)) {
810 SEC_JD_SET_IN_PTR(jobdescr,
811 (uint64_t)caam_jr_vtop_ctx(ctx, sg), 0,
812 (sym->auth.data.length + ses->digest_length));
813 /* enabling sg list */
814 (jobdescr)->seq_in.command.word |= 0x01000000;
816 /* hash result or digest, save digest first */
817 rte_memcpy(ctx->digest, sym->auth.digest.data,
819 sg->ptr = cpu_to_caam64(start_addr + sym->auth.data.offset);
820 sg->len = cpu_to_caam32(sym->auth.data.length);
823 rte_hexdump(stdout, "ICV", ctx->digest, ses->digest_length);
825 /* let's check digest by hw */
827 sg->ptr = cpu_to_caam64(caam_jr_vtop_ctx(ctx, ctx->digest));
828 sg->len = cpu_to_caam32(ses->digest_length);
830 sg->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
832 SEC_JD_SET_IN_PTR(jobdescr, (uint64_t)start_addr,
833 sym->auth.data.offset, sym->auth.data.length);
838 static inline struct caam_jr_op_ctx *
839 build_cipher_only_sg(struct rte_crypto_op *op, struct caam_jr_session *ses)
841 struct rte_crypto_sym_op *sym = op->sym;
842 struct rte_mbuf *mbuf = sym->m_src;
843 struct caam_jr_op_ctx *ctx;
844 struct sec4_sg_entry *sg, *in_sg;
847 uint64_t sdesc_offset;
848 uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
850 struct sec_job_descriptor_t *jobdescr;
853 PMD_INIT_FUNC_TRACE();
856 reg_segs = mbuf->nb_segs + sym->m_src->nb_segs + 2;
859 reg_segs = mbuf->nb_segs * 2 + 2;
862 if (reg_segs > MAX_SG_ENTRIES) {
863 CAAM_JR_DP_ERR("Cipher: Max sec segs supported is %d",
868 ctx = caam_jr_alloc_ctx(ses);
874 sdesc_offset = (size_t) ((char *)&cdb->sh_desc - (char *)cdb);
876 jobdescr = (struct sec_job_descriptor_t *) ctx->jobdes.desc;
878 SEC_JD_INIT(jobdescr);
879 SEC_JD_SET_SD(jobdescr,
880 (phys_addr_t)(caam_jr_dma_vtop(cdb)) + sdesc_offset,
881 cdb->sh_hdr.hi.field.idlen);
884 CAAM_JR_INFO("mbuf offset =%d, cipher offset = %d, length =%d+%d",
885 sym->m_src->data_off, sym->cipher.data.offset,
886 sym->cipher.data.length, ses->iv.length);
895 length = sym->cipher.data.length;
897 sg->ptr = cpu_to_caam64(rte_pktmbuf_iova(mbuf)
898 + sym->cipher.data.offset);
899 sg->len = cpu_to_caam32(mbuf->data_len - sym->cipher.data.offset);
901 /* Successive segs */
905 sg->ptr = cpu_to_caam64(rte_pktmbuf_iova(mbuf));
906 sg->len = cpu_to_caam32(mbuf->data_len);
910 sg->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
912 SEC_JD_SET_OUT_PTR(jobdescr,
913 (uint64_t)caam_jr_vtop_ctx(ctx, &ctx->sg[0]), 0,
916 (jobdescr)->seq_out.command.word |= 0x01000000;
923 length = sym->cipher.data.length + ses->iv.length;
926 sg->ptr = cpu_to_caam64(caam_jr_dma_vtop(IV_ptr));
927 sg->len = cpu_to_caam32(ses->iv.length);
931 sg->ptr = cpu_to_caam64(rte_pktmbuf_iova(mbuf)
932 + sym->cipher.data.offset);
933 sg->len = cpu_to_caam32(mbuf->data_len - sym->cipher.data.offset);
935 /* Successive segs */
939 sg->ptr = cpu_to_caam64(rte_pktmbuf_iova(mbuf));
940 sg->len = cpu_to_caam32(mbuf->data_len);
944 sg->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
947 SEC_JD_SET_IN_PTR(jobdescr, (uint64_t)caam_jr_vtop_ctx(ctx, in_sg), 0,
950 (jobdescr)->seq_in.command.word |= 0x01000000;
955 static inline struct caam_jr_op_ctx *
956 build_cipher_only(struct rte_crypto_op *op, struct caam_jr_session *ses)
958 struct rte_crypto_sym_op *sym = op->sym;
959 struct caam_jr_op_ctx *ctx;
960 struct sec4_sg_entry *sg;
961 rte_iova_t src_start_addr, dst_start_addr;
963 uint64_t sdesc_offset;
964 uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
966 struct sec_job_descriptor_t *jobdescr;
968 PMD_INIT_FUNC_TRACE();
969 ctx = caam_jr_alloc_ctx(ses);
975 sdesc_offset = (size_t) ((char *)&cdb->sh_desc - (char *)cdb);
977 src_start_addr = rte_pktmbuf_iova(sym->m_src);
979 dst_start_addr = rte_pktmbuf_iova(sym->m_dst);
981 dst_start_addr = src_start_addr;
983 jobdescr = (struct sec_job_descriptor_t *) ctx->jobdes.desc;
985 SEC_JD_INIT(jobdescr);
986 SEC_JD_SET_SD(jobdescr,
987 (phys_addr_t)(caam_jr_dma_vtop(cdb)) + sdesc_offset,
988 cdb->sh_hdr.hi.field.idlen);
991 CAAM_JR_INFO("mbuf offset =%d, cipher offset = %d, length =%d+%d",
992 sym->m_src->data_off, sym->cipher.data.offset,
993 sym->cipher.data.length, ses->iv.length);
996 SEC_JD_SET_OUT_PTR(jobdescr, (uint64_t)dst_start_addr,
997 sym->cipher.data.offset,
998 sym->cipher.data.length + ses->iv.length);
1002 SEC_JD_SET_IN_PTR(jobdescr, (uint64_t)caam_jr_vtop_ctx(ctx, sg), 0,
1003 sym->cipher.data.length + ses->iv.length);
1004 /*enabling sg bit */
1005 (jobdescr)->seq_in.command.word |= 0x01000000;
1007 sg->ptr = cpu_to_caam64(caam_jr_dma_vtop(IV_ptr));
1008 sg->len = cpu_to_caam32(ses->iv.length);
1011 sg->ptr = cpu_to_caam64(src_start_addr + sym->cipher.data.offset);
1012 sg->len = cpu_to_caam32(sym->cipher.data.length);
1014 sg->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
1019 /* For decapsulation:
1021 * +----+----------------+--------------------------------+-----+
1022 * | IV | Auth-only data | Authenticated & Encrypted data | ICV |
1023 * +----+----------------+--------------------------------+-----+
1025 * +----+--------------------------+
1026 * | Decrypted & authenticated data |
1027 * +----+--------------------------+
1030 static inline struct caam_jr_op_ctx *
1031 build_cipher_auth_sg(struct rte_crypto_op *op, struct caam_jr_session *ses)
1033 struct rte_crypto_sym_op *sym = op->sym;
1034 struct caam_jr_op_ctx *ctx;
1035 struct sec4_sg_entry *sg, *out_sg, *in_sg;
1036 struct rte_mbuf *mbuf;
1037 uint32_t length = 0;
1038 struct sec_cdb *cdb;
1039 uint64_t sdesc_offset;
1041 uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1043 struct sec_job_descriptor_t *jobdescr;
1044 uint32_t auth_only_len;
1046 PMD_INIT_FUNC_TRACE();
1047 auth_only_len = op->sym->auth.data.length -
1048 op->sym->cipher.data.length;
1052 req_segs = mbuf->nb_segs + sym->m_src->nb_segs + 3;
1055 req_segs = mbuf->nb_segs * 2 + 3;
1058 if (req_segs > MAX_SG_ENTRIES) {
1059 CAAM_JR_DP_ERR("Cipher-Auth: Max sec segs supported is %d",
1064 ctx = caam_jr_alloc_ctx(ses);
1070 sdesc_offset = (size_t) ((char *)&cdb->sh_desc - (char *)cdb);
1072 jobdescr = (struct sec_job_descriptor_t *) ctx->jobdes.desc;
1074 SEC_JD_INIT(jobdescr);
1075 SEC_JD_SET_SD(jobdescr,
1076 (phys_addr_t)(caam_jr_dma_vtop(cdb)) + sdesc_offset,
1077 cdb->sh_hdr.hi.field.idlen);
1085 out_sg = &ctx->sg[0];
1087 length = sym->auth.data.length + ses->digest_length;
1089 length = sym->auth.data.length;
1094 sg->ptr = cpu_to_caam64(rte_pktmbuf_iova(mbuf)
1095 + sym->auth.data.offset);
1096 sg->len = cpu_to_caam32(mbuf->data_len - sym->auth.data.offset);
1098 /* Successive segs */
1102 sg->ptr = cpu_to_caam64(rte_pktmbuf_iova(mbuf));
1103 sg->len = cpu_to_caam32(mbuf->data_len);
1107 if (is_encode(ses)) {
1108 /* set auth output */
1110 sg->ptr = cpu_to_caam64(sym->auth.digest.phys_addr);
1111 sg->len = cpu_to_caam32(ses->digest_length);
1114 sg->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
1116 SEC_JD_SET_OUT_PTR(jobdescr,
1117 (uint64_t)caam_jr_dma_vtop(out_sg), 0, length);
1119 (jobdescr)->seq_out.command.word |= 0x01000000;
1126 length = ses->iv.length + sym->auth.data.length;
1128 length = ses->iv.length + sym->auth.data.length
1129 + ses->digest_length;
1131 sg->ptr = cpu_to_caam64(caam_jr_dma_vtop(IV_ptr));
1132 sg->len = cpu_to_caam32(ses->iv.length);
1136 sg->ptr = cpu_to_caam64(rte_pktmbuf_iova(mbuf)
1137 + sym->auth.data.offset);
1138 sg->len = cpu_to_caam32(mbuf->data_len - sym->auth.data.offset);
1140 /* Successive segs */
1144 sg->ptr = cpu_to_caam64(rte_pktmbuf_iova(mbuf));
1145 sg->len = cpu_to_caam32(mbuf->data_len);
1149 if (is_decode(ses)) {
1151 rte_memcpy(ctx->digest, sym->auth.digest.data,
1152 ses->digest_length);
1153 sg->ptr = cpu_to_caam64(caam_jr_dma_vtop(ctx->digest));
1154 sg->len = cpu_to_caam32(ses->digest_length);
1157 sg->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
1159 SEC_JD_SET_IN_PTR(jobdescr, (uint64_t)caam_jr_dma_vtop(in_sg), 0,
1162 (jobdescr)->seq_in.command.word |= 0x01000000;
1163 /* Auth_only_len is set as 0 in descriptor and it is
1164 * overwritten here in the jd which will update
1169 (jobdescr)->dpovrd = 0x80000000 | auth_only_len;
1174 static inline struct caam_jr_op_ctx *
1175 build_cipher_auth(struct rte_crypto_op *op, struct caam_jr_session *ses)
1177 struct rte_crypto_sym_op *sym = op->sym;
1178 struct caam_jr_op_ctx *ctx;
1179 struct sec4_sg_entry *sg;
1180 rte_iova_t src_start_addr, dst_start_addr;
1181 uint32_t length = 0;
1182 struct sec_cdb *cdb;
1183 uint64_t sdesc_offset;
1184 uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1186 struct sec_job_descriptor_t *jobdescr;
1187 uint32_t auth_only_len;
1189 PMD_INIT_FUNC_TRACE();
1190 auth_only_len = op->sym->auth.data.length -
1191 op->sym->cipher.data.length;
1193 src_start_addr = rte_pktmbuf_iova(sym->m_src);
1195 dst_start_addr = rte_pktmbuf_iova(sym->m_dst);
1197 dst_start_addr = src_start_addr;
1199 ctx = caam_jr_alloc_ctx(ses);
1205 sdesc_offset = (size_t) ((char *)&cdb->sh_desc - (char *)cdb);
1207 jobdescr = (struct sec_job_descriptor_t *) ctx->jobdes.desc;
1209 SEC_JD_INIT(jobdescr);
1210 SEC_JD_SET_SD(jobdescr,
1211 (phys_addr_t)(caam_jr_dma_vtop(cdb)) + sdesc_offset,
1212 cdb->sh_hdr.hi.field.idlen);
1216 if (is_encode(ses)) {
1217 sg->ptr = cpu_to_caam64(caam_jr_dma_vtop(IV_ptr));
1218 sg->len = cpu_to_caam32(ses->iv.length);
1219 length += ses->iv.length;
1222 sg->ptr = cpu_to_caam64(src_start_addr + sym->auth.data.offset);
1223 sg->len = cpu_to_caam32(sym->auth.data.length);
1224 length += sym->auth.data.length;
1226 sg->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
1228 sg->ptr = cpu_to_caam64(caam_jr_dma_vtop(IV_ptr));
1229 sg->len = cpu_to_caam32(ses->iv.length);
1230 length += ses->iv.length;
1233 sg->ptr = cpu_to_caam64(src_start_addr + sym->auth.data.offset);
1234 sg->len = cpu_to_caam32(sym->auth.data.length);
1235 length += sym->auth.data.length;
1237 rte_memcpy(ctx->digest, sym->auth.digest.data,
1238 ses->digest_length);
1240 sg->ptr = cpu_to_caam64(caam_jr_dma_vtop(ctx->digest));
1241 sg->len = cpu_to_caam32(ses->digest_length);
1242 length += ses->digest_length;
1244 sg->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
1247 SEC_JD_SET_IN_PTR(jobdescr, (uint64_t)caam_jr_dma_vtop(&ctx->sg[0]), 0,
1250 (jobdescr)->seq_in.command.word |= 0x01000000;
1255 sg->ptr = cpu_to_caam64(dst_start_addr + sym->cipher.data.offset);
1256 sg->len = cpu_to_caam32(sym->cipher.data.length);
1257 length = sym->cipher.data.length;
1259 if (is_encode(ses)) {
1260 /* set auth output */
1262 sg->ptr = cpu_to_caam64(sym->auth.digest.phys_addr);
1263 sg->len = cpu_to_caam32(ses->digest_length);
1264 length += ses->digest_length;
1267 sg->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
1269 SEC_JD_SET_OUT_PTR(jobdescr,
1270 (uint64_t)caam_jr_dma_vtop(&ctx->sg[6]), 0, length);
1272 (jobdescr)->seq_out.command.word |= 0x01000000;
1274 /* Auth_only_len is set as 0 in descriptor and it is
1275 * overwritten here in the jd which will update
1280 (jobdescr)->dpovrd = 0x80000000 | auth_only_len;
1285 caam_jr_enqueue_op(struct rte_crypto_op *op, struct caam_jr_qp *qp)
1287 struct sec_job_ring_t *ring = qp->ring;
1288 struct caam_jr_session *ses;
1289 struct caam_jr_op_ctx *ctx = NULL;
1290 struct sec_job_descriptor_t *jobdescr __rte_unused;
1292 PMD_INIT_FUNC_TRACE();
1293 switch (op->sess_type) {
1294 case RTE_CRYPTO_OP_WITH_SESSION:
1295 ses = (struct caam_jr_session *)
1296 get_sym_session_private_data(op->sym->session,
1297 cryptodev_driver_id);
1300 CAAM_JR_DP_ERR("sessionless crypto op not supported");
1305 if (unlikely(!ses->qp || ses->qp != qp)) {
1306 CAAM_JR_DP_DEBUG("Old:sess->qp=%p New qp = %p\n", ses->qp, qp);
1308 caam_jr_prep_cdb(ses);
1311 if (rte_pktmbuf_is_contiguous(op->sym->m_src)) {
1312 if (is_auth_cipher(ses))
1313 ctx = build_cipher_auth(op, ses);
1314 else if (is_aead(ses))
1316 else if (is_auth_only(ses))
1317 ctx = build_auth_only(op, ses);
1318 else if (is_cipher_only(ses))
1319 ctx = build_cipher_only(op, ses);
1321 if (is_auth_cipher(ses))
1322 ctx = build_cipher_auth_sg(op, ses);
1323 else if (is_aead(ses))
1325 else if (is_auth_only(ses))
1326 ctx = build_auth_only_sg(op, ses);
1327 else if (is_cipher_only(ses))
1328 ctx = build_cipher_only_sg(op, ses);
1331 if (unlikely(!ctx)) {
1333 CAAM_JR_ERR("not supported sec op");
1338 rte_hexdump(stdout, "DECODE",
1339 rte_pktmbuf_mtod(op->sym->m_src, void *),
1340 rte_pktmbuf_data_len(op->sym->m_src));
1342 rte_hexdump(stdout, "ENCODE",
1343 rte_pktmbuf_mtod(op->sym->m_src, void *),
1344 rte_pktmbuf_data_len(op->sym->m_src));
1346 printf("\n JD before conversion\n");
1347 for (int i = 0; i < 12; i++)
1348 printf("\n 0x%08x", ctx->jobdes.desc[i]);
1351 CAAM_JR_DP_DEBUG("Jr[%p] pi[%d] ci[%d].Before sending desc",
1352 ring, ring->pidx, ring->cidx);
1354 /* todo - do we want to retry */
1355 if (SEC_JOB_RING_IS_FULL(ring->pidx, ring->cidx,
1356 SEC_JOB_RING_SIZE, SEC_JOB_RING_SIZE)) {
1357 CAAM_JR_DP_DEBUG("Ring FULL Jr[%p] pi[%d] ci[%d].Size = %d",
1358 ring, ring->pidx, ring->cidx, SEC_JOB_RING_SIZE);
1359 caam_jr_op_ending(ctx);
1364 #if CORE_BYTE_ORDER != CAAM_BYTE_ORDER
1365 jobdescr = (struct sec_job_descriptor_t *) ctx->jobdes.desc;
1367 jobdescr->deschdr.command.word =
1368 cpu_to_caam32(jobdescr->deschdr.command.word);
1369 jobdescr->sd_ptr = cpu_to_caam64(jobdescr->sd_ptr);
1370 jobdescr->seq_out.command.word =
1371 cpu_to_caam32(jobdescr->seq_out.command.word);
1372 jobdescr->seq_out_ptr = cpu_to_caam64(jobdescr->seq_out_ptr);
1373 jobdescr->out_ext_length = cpu_to_caam32(jobdescr->out_ext_length);
1374 jobdescr->seq_in.command.word =
1375 cpu_to_caam32(jobdescr->seq_in.command.word);
1376 jobdescr->seq_in_ptr = cpu_to_caam64(jobdescr->seq_in_ptr);
1377 jobdescr->in_ext_length = cpu_to_caam32(jobdescr->in_ext_length);
1378 jobdescr->load_dpovrd.command.word =
1379 cpu_to_caam32(jobdescr->load_dpovrd.command.word);
1380 jobdescr->dpovrd = cpu_to_caam32(jobdescr->dpovrd);
1383 /* Set ptr in input ring to current descriptor */
1384 sec_write_addr(&ring->input_ring[ring->pidx],
1385 (phys_addr_t)caam_jr_vtop_ctx(ctx, ctx->jobdes.desc));
1388 /* Notify HW that a new job is enqueued */
1389 hw_enqueue_desc_on_job_ring(ring);
1391 /* increment the producer index for the current job ring */
1392 ring->pidx = SEC_CIRCULAR_COUNTER(ring->pidx, SEC_JOB_RING_SIZE);
1398 caam_jr_enqueue_burst(void *qp, struct rte_crypto_op **ops,
1401 /* Function to transmit the frames to given device and queuepair */
1404 struct caam_jr_qp *jr_qp = (struct caam_jr_qp *)qp;
1405 uint16_t num_tx = 0;
1407 PMD_INIT_FUNC_TRACE();
1408 /*Prepare each packet which is to be sent*/
1409 for (loop = 0; loop < nb_ops; loop++) {
1410 ret = caam_jr_enqueue_op(ops[loop], jr_qp);
1415 jr_qp->tx_pkts += num_tx;
1420 /* Release queue pair */
1422 caam_jr_queue_pair_release(struct rte_cryptodev *dev,
1425 struct sec_job_ring_t *internals;
1426 struct caam_jr_qp *qp = NULL;
1428 PMD_INIT_FUNC_TRACE();
1429 CAAM_JR_DEBUG("dev =%p, queue =%d", dev, qp_id);
1431 internals = dev->data->dev_private;
1432 if (qp_id >= internals->max_nb_queue_pairs) {
1433 CAAM_JR_ERR("Max supported qpid %d",
1434 internals->max_nb_queue_pairs);
1438 qp = &internals->qps[qp_id];
1440 dev->data->queue_pairs[qp_id] = NULL;
1445 /* Setup a queue pair */
1447 caam_jr_queue_pair_setup(
1448 struct rte_cryptodev *dev, uint16_t qp_id,
1449 __rte_unused const struct rte_cryptodev_qp_conf *qp_conf,
1450 __rte_unused int socket_id,
1451 __rte_unused struct rte_mempool *session_pool)
1453 struct sec_job_ring_t *internals;
1454 struct caam_jr_qp *qp = NULL;
1456 PMD_INIT_FUNC_TRACE();
1457 CAAM_JR_DEBUG("dev =%p, queue =%d, conf =%p", dev, qp_id, qp_conf);
1459 internals = dev->data->dev_private;
1460 if (qp_id >= internals->max_nb_queue_pairs) {
1461 CAAM_JR_ERR("Max supported qpid %d",
1462 internals->max_nb_queue_pairs);
1466 qp = &internals->qps[qp_id];
1467 qp->ring = internals;
1468 dev->data->queue_pairs[qp_id] = qp;
1473 /* Return the number of allocated queue pairs */
1475 caam_jr_queue_pair_count(struct rte_cryptodev *dev)
1477 PMD_INIT_FUNC_TRACE();
1479 return dev->data->nb_queue_pairs;
1482 /* Returns the size of the aesni gcm session structure */
1484 caam_jr_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1486 PMD_INIT_FUNC_TRACE();
1488 return sizeof(struct caam_jr_session);
1492 caam_jr_cipher_init(struct rte_cryptodev *dev __rte_unused,
1493 struct rte_crypto_sym_xform *xform,
1494 struct caam_jr_session *session)
1496 PMD_INIT_FUNC_TRACE();
1497 session->cipher_alg = xform->cipher.algo;
1498 session->iv.length = xform->cipher.iv.length;
1499 session->iv.offset = xform->cipher.iv.offset;
1500 session->cipher_key.data = rte_zmalloc(NULL, xform->cipher.key.length,
1501 RTE_CACHE_LINE_SIZE);
1502 if (session->cipher_key.data == NULL && xform->cipher.key.length > 0) {
1503 CAAM_JR_ERR("No Memory for cipher key\n");
1506 session->cipher_key.length = xform->cipher.key.length;
1508 memcpy(session->cipher_key.data, xform->cipher.key.data,
1509 xform->cipher.key.length);
1510 session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1517 caam_jr_auth_init(struct rte_cryptodev *dev __rte_unused,
1518 struct rte_crypto_sym_xform *xform,
1519 struct caam_jr_session *session)
1521 PMD_INIT_FUNC_TRACE();
1522 session->auth_alg = xform->auth.algo;
1523 session->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,
1524 RTE_CACHE_LINE_SIZE);
1525 if (session->auth_key.data == NULL && xform->auth.key.length > 0) {
1526 CAAM_JR_ERR("No Memory for auth key\n");
1529 session->auth_key.length = xform->auth.key.length;
1530 session->digest_length = xform->auth.digest_length;
1532 memcpy(session->auth_key.data, xform->auth.key.data,
1533 xform->auth.key.length);
1534 session->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?
1541 caam_jr_aead_init(struct rte_cryptodev *dev __rte_unused,
1542 struct rte_crypto_sym_xform *xform,
1543 struct caam_jr_session *session)
1545 PMD_INIT_FUNC_TRACE();
1546 session->aead_alg = xform->aead.algo;
1547 session->iv.length = xform->aead.iv.length;
1548 session->iv.offset = xform->aead.iv.offset;
1549 session->auth_only_len = xform->aead.aad_length;
1550 session->aead_key.data = rte_zmalloc(NULL, xform->aead.key.length,
1551 RTE_CACHE_LINE_SIZE);
1552 if (session->aead_key.data == NULL && xform->aead.key.length > 0) {
1553 CAAM_JR_ERR("No Memory for aead key\n");
1556 session->aead_key.length = xform->aead.key.length;
1557 session->digest_length = xform->aead.digest_length;
1559 memcpy(session->aead_key.data, xform->aead.key.data,
1560 xform->aead.key.length);
1561 session->dir = (xform->aead.op == RTE_CRYPTO_AEAD_OP_ENCRYPT) ?
1568 caam_jr_set_session_parameters(struct rte_cryptodev *dev,
1569 struct rte_crypto_sym_xform *xform, void *sess)
1571 struct sec_job_ring_t *internals = dev->data->dev_private;
1572 struct caam_jr_session *session = sess;
1574 PMD_INIT_FUNC_TRACE();
1576 if (unlikely(sess == NULL)) {
1577 CAAM_JR_ERR("invalid session struct");
1581 /* Default IV length = 0 */
1582 session->iv.length = 0;
1585 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL) {
1586 session->auth_alg = RTE_CRYPTO_AUTH_NULL;
1587 caam_jr_cipher_init(dev, xform, session);
1589 /* Authentication Only */
1590 } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1591 xform->next == NULL) {
1592 session->cipher_alg = RTE_CRYPTO_CIPHER_NULL;
1593 caam_jr_auth_init(dev, xform, session);
1595 /* Cipher then Authenticate */
1596 } else if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
1597 xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
1598 if (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
1599 caam_jr_cipher_init(dev, xform, session);
1600 caam_jr_auth_init(dev, xform->next, session);
1602 CAAM_JR_ERR("Not supported: Auth then Cipher");
1606 /* Authenticate then Cipher */
1607 } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1608 xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
1609 if (xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT) {
1610 caam_jr_auth_init(dev, xform, session);
1611 caam_jr_cipher_init(dev, xform->next, session);
1613 CAAM_JR_ERR("Not supported: Auth then Cipher");
1617 /* AEAD operation for AES-GCM kind of Algorithms */
1618 } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD &&
1619 xform->next == NULL) {
1620 caam_jr_aead_init(dev, xform, session);
1623 CAAM_JR_ERR("Invalid crypto type");
1626 session->ctx_pool = internals->ctx_pool;
1631 rte_free(session->cipher_key.data);
1632 rte_free(session->auth_key.data);
1633 memset(session, 0, sizeof(struct caam_jr_session));
1639 caam_jr_sym_session_configure(struct rte_cryptodev *dev,
1640 struct rte_crypto_sym_xform *xform,
1641 struct rte_cryptodev_sym_session *sess,
1642 struct rte_mempool *mempool)
1644 void *sess_private_data;
1647 PMD_INIT_FUNC_TRACE();
1649 if (rte_mempool_get(mempool, &sess_private_data)) {
1650 CAAM_JR_ERR("Couldn't get object from session mempool");
1654 memset(sess_private_data, 0, sizeof(struct caam_jr_session));
1655 ret = caam_jr_set_session_parameters(dev, xform, sess_private_data);
1657 CAAM_JR_ERR("failed to configure session parameters");
1658 /* Return session to mempool */
1659 rte_mempool_put(mempool, sess_private_data);
1663 set_sym_session_private_data(sess, dev->driver_id, sess_private_data);
1668 /* Clear the memory of session so it doesn't leave key material behind */
1670 caam_jr_sym_session_clear(struct rte_cryptodev *dev,
1671 struct rte_cryptodev_sym_session *sess)
1673 uint8_t index = dev->driver_id;
1674 void *sess_priv = get_sym_session_private_data(sess, index);
1675 struct caam_jr_session *s = (struct caam_jr_session *)sess_priv;
1677 PMD_INIT_FUNC_TRACE();
1680 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
1682 rte_free(s->cipher_key.data);
1683 rte_free(s->auth_key.data);
1684 memset(s, 0, sizeof(struct caam_jr_session));
1685 set_sym_session_private_data(sess, index, NULL);
1686 rte_mempool_put(sess_mp, sess_priv);
1691 caam_jr_dev_configure(struct rte_cryptodev *dev,
1692 struct rte_cryptodev_config *config __rte_unused)
1695 struct sec_job_ring_t *internals;
1697 PMD_INIT_FUNC_TRACE();
1699 internals = dev->data->dev_private;
1700 sprintf(str, "ctx_pool_%d", dev->data->dev_id);
1701 if (!internals->ctx_pool) {
1702 internals->ctx_pool = rte_mempool_create((const char *)str,
1704 sizeof(struct caam_jr_op_ctx),
1705 CTX_POOL_CACHE_SIZE, 0,
1706 NULL, NULL, NULL, NULL,
1708 if (!internals->ctx_pool) {
1709 CAAM_JR_ERR("%s create failed\n", str);
1713 CAAM_JR_INFO("mempool already created for dev_id : %d",
1720 caam_jr_dev_start(struct rte_cryptodev *dev __rte_unused)
1722 PMD_INIT_FUNC_TRACE();
1727 caam_jr_dev_stop(struct rte_cryptodev *dev __rte_unused)
1729 PMD_INIT_FUNC_TRACE();
1733 caam_jr_dev_close(struct rte_cryptodev *dev)
1735 struct sec_job_ring_t *internals;
1737 PMD_INIT_FUNC_TRACE();
1742 internals = dev->data->dev_private;
1743 rte_mempool_free(internals->ctx_pool);
1744 internals->ctx_pool = NULL;
1750 caam_jr_dev_infos_get(struct rte_cryptodev *dev,
1751 struct rte_cryptodev_info *info)
1753 struct sec_job_ring_t *internals = dev->data->dev_private;
1755 PMD_INIT_FUNC_TRACE();
1757 info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
1758 info->feature_flags = dev->feature_flags;
1759 info->capabilities = caam_jr_get_cryptodev_capabilities();
1760 info->sym.max_nb_sessions = internals->max_nb_sessions;
1761 info->driver_id = cryptodev_driver_id;
1765 static struct rte_cryptodev_ops caam_jr_ops = {
1766 .dev_configure = caam_jr_dev_configure,
1767 .dev_start = caam_jr_dev_start,
1768 .dev_stop = caam_jr_dev_stop,
1769 .dev_close = caam_jr_dev_close,
1770 .dev_infos_get = caam_jr_dev_infos_get,
1771 .stats_get = caam_jr_stats_get,
1772 .stats_reset = caam_jr_stats_reset,
1773 .queue_pair_setup = caam_jr_queue_pair_setup,
1774 .queue_pair_release = caam_jr_queue_pair_release,
1775 .queue_pair_count = caam_jr_queue_pair_count,
1776 .sym_session_get_size = caam_jr_sym_session_get_size,
1777 .sym_session_configure = caam_jr_sym_session_configure,
1778 .sym_session_clear = caam_jr_sym_session_clear
1782 /* @brief Flush job rings of any processed descs.
1783 * The processed descs are silently dropped,
1784 * WITHOUT being notified to UA.
1787 close_job_ring(struct sec_job_ring_t *job_ring)
1789 PMD_INIT_FUNC_TRACE();
1790 if (job_ring->irq_fd) {
1791 /* Producer index is frozen. If consumer index is not equal
1792 * with producer index, then we have descs to flush.
1794 while (job_ring->pidx != job_ring->cidx)
1795 hw_flush_job_ring(job_ring, false, NULL);
1797 /* free the uio job ring */
1798 free_job_ring(job_ring->irq_fd);
1799 job_ring->irq_fd = 0;
1800 caam_jr_dma_free(job_ring->input_ring);
1801 caam_jr_dma_free(job_ring->output_ring);
1806 /** @brief Release the software and hardware resources tied to a job ring.
1807 * @param [in] job_ring The job ring
1809 * @retval 0 for success
1810 * @retval -1 for error
1813 shutdown_job_ring(struct sec_job_ring_t *job_ring)
1817 PMD_INIT_FUNC_TRACE();
1818 ASSERT(job_ring != NULL);
1819 ret = hw_shutdown_job_ring(job_ring);
1820 SEC_ASSERT(ret == 0, ret,
1821 "Failed to shutdown hardware job ring %p",
1824 if (job_ring->coalescing_en)
1825 hw_job_ring_disable_coalescing(job_ring);
1827 if (job_ring->jr_mode != SEC_NOTIFICATION_TYPE_POLL) {
1828 ret = caam_jr_disable_irqs(job_ring->irq_fd);
1829 SEC_ASSERT(ret == 0, ret,
1830 "Failed to disable irqs for job ring %p",
1838 * @brief Release the resources used by the SEC user space driver.
1840 * Reset and release SEC's job rings indicated by the User Application at
1841 * init_job_ring() and free any memory allocated internally.
1842 * Call once during application tear down.
1844 * @note In case there are any descriptors in-flight (descriptors received by
1845 * SEC driver for processing and for which no response was yet provided to UA),
1846 * the descriptors are discarded without any notifications to User Application.
1848 * @retval ::0 is returned for a successful execution
1849 * @retval ::-1 is returned if SEC driver release is in progress
1852 caam_jr_dev_uninit(struct rte_cryptodev *dev)
1854 struct sec_job_ring_t *internals;
1856 PMD_INIT_FUNC_TRACE();
1860 internals = dev->data->dev_private;
1861 rte_free(dev->security_ctx);
1863 /* If any descriptors in flight , poll and wait
1864 * until all descriptors are received and silently discarded.
1867 shutdown_job_ring(internals);
1868 close_job_ring(internals);
1869 rte_mempool_free(internals->ctx_pool);
1872 CAAM_JR_INFO("Closing crypto device %s", dev->data->name);
1874 /* last caam jr instance) */
1875 if (g_job_rings_no == 0)
1876 g_driver_state = SEC_DRIVER_STATE_IDLE;
1881 /* @brief Initialize the software and hardware resources tied to a job ring.
1882 * @param [in] jr_mode; Model to be used by SEC Driver to receive
1883 * notifications from SEC. Can be either
1884 * of the three: #SEC_NOTIFICATION_TYPE_NAPI
1885 * #SEC_NOTIFICATION_TYPE_IRQ or
1886 * #SEC_NOTIFICATION_TYPE_POLL
1887 * @param [in] NAPI_mode The NAPI work mode to configure a job ring at
1888 * startup. Used only when #SEC_NOTIFICATION_TYPE
1889 * is set to #SEC_NOTIFICATION_TYPE_NAPI.
1890 * @param [in] irq_coalescing_timer This value determines the maximum
1891 * amount of time after processing a
1892 * descriptor before raising an interrupt.
1893 * @param [in] irq_coalescing_count This value determines how many
1894 * descriptors are completed before
1895 * raising an interrupt.
1896 * @param [in] reg_base_addr, The job ring base address register
1897 * @param [in] irq_id The job ring interrupt identification number.
1898 * @retval job_ring_handle for successful job ring configuration
1899 * @retval NULL on error
1903 init_job_ring(void *reg_base_addr, uint32_t irq_id)
1905 struct sec_job_ring_t *job_ring = NULL;
1907 int jr_mode = SEC_NOTIFICATION_TYPE_POLL;
1909 int irq_coalescing_timer = 0;
1910 int irq_coalescing_count = 0;
1912 for (i = 0; i < MAX_SEC_JOB_RINGS; i++) {
1913 if (g_job_rings[i].irq_fd == 0) {
1914 job_ring = &g_job_rings[i];
1919 if (job_ring == NULL) {
1920 CAAM_JR_ERR("No free job ring\n");
1924 job_ring->register_base_addr = reg_base_addr;
1925 job_ring->jr_mode = jr_mode;
1926 job_ring->napi_mode = 0;
1927 job_ring->irq_fd = irq_id;
1929 /* Allocate mem for input and output ring */
1931 /* Allocate memory for input ring */
1932 job_ring->input_ring = caam_jr_dma_mem_alloc(L1_CACHE_BYTES,
1933 SEC_DMA_MEM_INPUT_RING_SIZE);
1934 memset(job_ring->input_ring, 0, SEC_DMA_MEM_INPUT_RING_SIZE);
1936 /* Allocate memory for output ring */
1937 job_ring->output_ring = caam_jr_dma_mem_alloc(L1_CACHE_BYTES,
1938 SEC_DMA_MEM_OUTPUT_RING_SIZE);
1939 memset(job_ring->output_ring, 0, SEC_DMA_MEM_OUTPUT_RING_SIZE);
1941 /* Reset job ring in SEC hw and configure job ring registers */
1942 ret = hw_reset_job_ring(job_ring);
1944 CAAM_JR_ERR("Failed to reset hardware job ring");
1948 if (jr_mode == SEC_NOTIFICATION_TYPE_NAPI) {
1949 /* When SEC US driver works in NAPI mode, the UA can select
1950 * if the driver starts with IRQs on or off.
1952 if (napi_mode == SEC_STARTUP_INTERRUPT_MODE) {
1953 CAAM_JR_INFO("Enabling DONE IRQ generationon job ring - %p",
1955 ret = caam_jr_enable_irqs(job_ring->irq_fd);
1957 CAAM_JR_ERR("Failed to enable irqs for job ring");
1961 } else if (jr_mode == SEC_NOTIFICATION_TYPE_IRQ) {
1962 /* When SEC US driver works in pure interrupt mode,
1963 * IRQ's are always enabled.
1965 CAAM_JR_INFO("Enabling DONE IRQ generation on job ring - %p",
1967 ret = caam_jr_enable_irqs(job_ring->irq_fd);
1969 CAAM_JR_ERR("Failed to enable irqs for job ring");
1973 if (irq_coalescing_timer || irq_coalescing_count) {
1974 hw_job_ring_set_coalescing_param(job_ring,
1975 irq_coalescing_timer,
1976 irq_coalescing_count);
1978 hw_job_ring_enable_coalescing(job_ring);
1979 job_ring->coalescing_en = 1;
1982 job_ring->jr_state = SEC_JOB_RING_STATE_STARTED;
1983 job_ring->max_nb_queue_pairs = RTE_CAAM_MAX_NB_SEC_QPS;
1984 job_ring->max_nb_sessions = RTE_CAAM_JR_PMD_MAX_NB_SESSIONS;
1988 caam_jr_dma_free(job_ring->output_ring);
1989 caam_jr_dma_free(job_ring->input_ring);
1995 caam_jr_dev_init(const char *name,
1996 struct rte_vdev_device *vdev,
1997 struct rte_cryptodev_pmd_init_params *init_params)
1999 struct rte_cryptodev *dev;
2000 struct uio_job_ring *job_ring;
2001 char str[RTE_CRYPTODEV_NAME_MAX_LEN];
2003 PMD_INIT_FUNC_TRACE();
2005 /* Validate driver state */
2006 if (g_driver_state == SEC_DRIVER_STATE_IDLE) {
2007 g_job_rings_max = sec_configure();
2008 if (!g_job_rings_max) {
2009 CAAM_JR_ERR("No job ring detected on UIO !!!!");
2012 /* Update driver state */
2013 g_driver_state = SEC_DRIVER_STATE_STARTED;
2016 if (g_job_rings_no >= g_job_rings_max) {
2017 CAAM_JR_ERR("No more job rings available max=%d!!!!",
2022 job_ring = config_job_ring();
2023 if (job_ring == NULL) {
2024 CAAM_JR_ERR("failed to create job ring");
2028 snprintf(str, sizeof(str), "caam_jr%d", job_ring->jr_id);
2030 dev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);
2032 CAAM_JR_ERR("failed to create cryptodev vdev");
2035 /*TODO free it during teardown*/
2036 dev->data->dev_private = init_job_ring(job_ring->register_base_addr,
2039 if (!dev->data->dev_private) {
2040 CAAM_JR_ERR("Ring memory allocation failed\n");
2044 dev->driver_id = cryptodev_driver_id;
2045 dev->dev_ops = &caam_jr_ops;
2047 /* register rx/tx burst functions for data path */
2048 dev->dequeue_burst = caam_jr_dequeue_burst;
2049 dev->enqueue_burst = caam_jr_enqueue_burst;
2050 dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
2051 RTE_CRYPTODEV_FF_HW_ACCELERATED |
2052 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
2053 RTE_CRYPTODEV_FF_SECURITY |
2054 RTE_CRYPTODEV_FF_IN_PLACE_SGL |
2055 RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
2056 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
2057 RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT |
2058 RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
2060 /* For secondary processes, we don't initialise any further as primary
2061 * has already done this work. Only check we don't need a different
2064 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2065 CAAM_JR_WARN("Device already init by primary process");
2069 RTE_LOG(INFO, PMD, "%s cryptodev init\n", dev->data->name);
2074 caam_jr_dev_uninit(dev);
2075 rte_cryptodev_pmd_release_device(dev);
2077 free_job_ring(job_ring->uio_fd);
2079 CAAM_JR_ERR("driver %s: cryptodev_caam_jr_create failed",
2085 /** Initialise CAAM JR crypto device */
2087 cryptodev_caam_jr_probe(struct rte_vdev_device *vdev)
2089 struct rte_cryptodev_pmd_init_params init_params = {
2091 sizeof(struct sec_job_ring_t),
2093 RTE_CRYPTODEV_PMD_DEFAULT_MAX_NB_QUEUE_PAIRS
2096 const char *input_args;
2098 name = rte_vdev_device_name(vdev);
2102 input_args = rte_vdev_device_args(vdev);
2103 rte_cryptodev_pmd_parse_input_args(&init_params, input_args);
2105 /* if sec device version is not configured */
2106 if (!rta_get_sec_era()) {
2107 const struct device_node *caam_node;
2109 for_each_compatible_node(caam_node, NULL, "fsl,sec-v4.0") {
2110 const uint32_t *prop = of_get_property(caam_node,
2115 INTL_SEC_ERA(cpu_to_caam32(*prop)));
2120 #ifdef RTE_LIBRTE_PMD_CAAM_JR_BE
2121 if (rta_get_sec_era() > RTA_SEC_ERA_8) {
2123 "CAAM is compiled in BE mode for device with sec era > 8???\n");
2128 return caam_jr_dev_init(name, vdev, &init_params);
2131 /** Uninitialise CAAM JR crypto device */
2133 cryptodev_caam_jr_remove(struct rte_vdev_device *vdev)
2135 struct rte_cryptodev *cryptodev;
2138 name = rte_vdev_device_name(vdev);
2142 cryptodev = rte_cryptodev_pmd_get_named_dev(name);
2143 if (cryptodev == NULL)
2146 caam_jr_dev_uninit(cryptodev);
2148 return rte_cryptodev_pmd_destroy(cryptodev);
2151 static struct rte_vdev_driver cryptodev_caam_jr_drv = {
2152 .probe = cryptodev_caam_jr_probe,
2153 .remove = cryptodev_caam_jr_remove
2156 static struct cryptodev_driver caam_jr_crypto_drv;
2158 RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_CAAM_JR_PMD, cryptodev_caam_jr_drv);
2159 RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_CAAM_JR_PMD,
2160 "max_nb_queue_pairs=<int>"
2162 RTE_PMD_REGISTER_CRYPTO_DRIVER(caam_jr_crypto_drv, cryptodev_caam_jr_drv.driver,
2163 cryptodev_driver_id);
2165 RTE_INIT(caam_jr_init_log)
2167 caam_jr_logtype = rte_log_register("pmd.crypto.caam");
2168 if (caam_jr_logtype >= 0)
2169 rte_log_set_level(caam_jr_logtype, RTE_LOG_NOTICE);