drivers/crypto/cnxk/cn10k_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #include <rte_cryptodev.h>
   6 #include <rte_cryptodev_pmd.h>
   7
   8 #include "cn10k_cryptodev.h"
   9 #include "cn10k_cryptodev_ops.h"
  10 #include "cnxk_cryptodev.h"
  11 #include "cnxk_cryptodev_ops.h"
  12 #include "cnxk_se.h"
  13
  14 static inline struct cnxk_se_sess *
  15 cn10k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op)
  16 {
  17         const int driver_id = cn10k_cryptodev_driver_id;
  18         struct rte_crypto_sym_op *sym_op = op->sym;
  19         struct rte_cryptodev_sym_session *sess;
  20         struct cnxk_se_sess *priv;
  21         int ret;
  22
  23         /* Create temporary session */
  24         sess = rte_cryptodev_sym_session_create(qp->sess_mp);
  25         if (sess == NULL)
  26                 return NULL;
  27
  28         ret = sym_session_configure(qp->lf.roc_cpt, driver_id, sym_op->xform,
  29                                     sess, qp->sess_mp_priv);
  30         if (ret)
  31                 goto sess_put;
  32
  33         priv = get_sym_session_private_data(sess, driver_id);
  34
  35         sym_op->session = sess;
  36
  37         return priv;
  38
  39 sess_put:
  40         rte_mempool_put(qp->sess_mp, sess);
  41         return NULL;
  42 }
  43
  44 static __rte_always_inline int __rte_hot
  45 cpt_sym_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,
  46                   struct cnxk_se_sess *sess, struct cpt_inflight_req *infl_req,
  47                   struct cpt_inst_s *inst)
  48 {
  49         uint64_t cpt_op;
  50         int ret = -1;
  51
  52         cpt_op = sess->cpt_op;
  53
  54         if (cpt_op & ROC_SE_OP_CIPHER_MASK)
  55                 ret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst);
  56
  57         return ret;
  58 }
  59
  60 static inline int
  61 cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[],
  62                     struct cpt_inst_s inst[], struct cpt_inflight_req *infl_req)
  63 {
  64         struct rte_crypto_sym_op *sym_op;
  65         struct cnxk_se_sess *sess;
  66         struct rte_crypto_op *op;
  67         uint64_t w7;
  68         int ret;
  69
  70         op = ops[0];
  71
  72         inst[0].w0.u64 = 0;
  73         inst[0].w2.u64 = 0;
  74         inst[0].w3.u64 = 0;
  75
  76         sym_op = op->sym;
  77
  78         if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
  79                 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
  80                         sess = get_sym_session_private_data(
  81                                 sym_op->session, cn10k_cryptodev_driver_id);
  82                         ret = cpt_sym_inst_fill(qp, op, sess, infl_req,
  83                                                 &inst[0]);
  84                         if (unlikely(ret))
  85                                 return 0;
  86                         w7 = sess->cpt_inst_w7;
  87                 } else {
  88                         sess = cn10k_cpt_sym_temp_sess_create(qp, op);
  89                         if (unlikely(sess == NULL)) {
  90                                 plt_dp_err("Could not create temp session");
  91                                 return 0;
  92                         }
  93
  94                         ret = cpt_sym_inst_fill(qp, op, sess, infl_req,
  95                                                 &inst[0]);
  96                         if (unlikely(ret)) {
  97                                 sym_session_clear(cn10k_cryptodev_driver_id,
  98                                                   op->sym->session);
  99                                 rte_mempool_put(qp->sess_mp, op->sym->session);
 100                                 return 0;
 101                         }
 102                         w7 = sess->cpt_inst_w7;
 103                 }
 104         } else {
 105                 plt_dp_err("Unsupported op type");
 106                 return 0;
 107         }
 108
 109         inst[0].res_addr = (uint64_t)&infl_req->res;
 110         infl_req->res.cn10k.compcode = CPT_COMP_NOT_DONE;
 111         infl_req->cop = op;
 112
 113         inst[0].w7.u64 = w7;
 114
 115         return 1;
 116 }
 117
 118 #define PKTS_PER_LOOP   32
 119 #define PKTS_PER_STEORL 16
 120
 121 static uint16_t
 122 cn10k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 123 {
 124         uint64_t lmt_base, lmt_arg, io_addr;
 125         struct cpt_inflight_req *infl_req;
 126         uint16_t nb_allowed, count = 0;
 127         struct cnxk_cpt_qp *qp = qptr;
 128         struct pending_queue *pend_q;
 129         struct cpt_inst_s *inst;
 130         uint16_t lmt_id;
 131         int ret, i;
 132
 133         pend_q = &qp->pend_q;
 134
 135         nb_allowed = qp->lf.nb_desc - pend_q->pending_count;
 136         nb_ops = RTE_MIN(nb_ops, nb_allowed);
 137
 138         if (unlikely(nb_ops == 0))
 139                 return 0;
 140
 141         lmt_base = qp->lmtline.lmt_base;
 142         io_addr = qp->lmtline.io_addr;
 143
 144         ROC_LMT_BASE_ID_GET(lmt_base, lmt_id);
 145         inst = (struct cpt_inst_s *)lmt_base;
 146
 147 again:
 148         for (i = 0; i < RTE_MIN(PKTS_PER_LOOP, nb_ops); i++) {
 149                 infl_req = &pend_q->req_queue[pend_q->enq_tail];
 150                 infl_req->op_flags = 0;
 151
 152                 ret = cn10k_cpt_fill_inst(qp, ops + i, &inst[2 * i], infl_req);
 153                 if (unlikely(ret != 1)) {
 154                         plt_dp_err("Could not process op: %p", ops + i);
 155                         if (i == 0)
 156                                 goto update_pending;
 157                         break;
 158                 }
 159
 160                 MOD_INC(pend_q->enq_tail, qp->lf.nb_desc);
 161         }
 162
 163         if (i > PKTS_PER_STEORL) {
 164                 lmt_arg = ROC_CN10K_CPT_LMT_ARG | (PKTS_PER_STEORL - 1) << 12 |
 165                           (uint64_t)lmt_id;
 166                 roc_lmt_submit_steorl(lmt_arg, io_addr);
 167                 lmt_arg = ROC_CN10K_CPT_LMT_ARG |
 168                           (i - PKTS_PER_STEORL - 1) << 12 |
 169                           (uint64_t)(lmt_id + PKTS_PER_STEORL);
 170                 roc_lmt_submit_steorl(lmt_arg, io_addr);
 171         } else {
 172                 lmt_arg = ROC_CN10K_CPT_LMT_ARG | (i - 1) << 12 |
 173                           (uint64_t)lmt_id;
 174                 roc_lmt_submit_steorl(lmt_arg, io_addr);
 175         }
 176
 177         rte_io_wmb();
 178
 179         if (nb_ops - i > 0 && i == PKTS_PER_LOOP) {
 180                 nb_ops -= i;
 181                 ops += i;
 182                 count += i;
 183                 goto again;
 184         }
 185
 186 update_pending:
 187         pend_q->pending_count += count + i;
 188
 189         pend_q->time_out = rte_get_timer_cycles() +
 190                            DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 191
 192         return count + i;
 193 }
 194
 195 static inline void
 196 cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
 197                                struct rte_crypto_op *cop,
 198                                struct cpt_inflight_req *infl_req)
 199 {
 200         struct cpt_cn10k_res_s *res = (struct cpt_cn10k_res_s *)&infl_req->res;
 201         unsigned int sz;
 202
 203         if (likely(res->compcode == CPT_COMP_GOOD ||
 204                    res->compcode == CPT_COMP_WARN)) {
 205                 if (unlikely(res->uc_compcode)) {
 206                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 207
 208                         plt_dp_info("Request failed with microcode error");
 209                         plt_dp_info("MC completion code 0x%x",
 210                                     res->uc_compcode);
 211                         goto temp_sess_free;
 212                 }
 213
 214                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 215         } else {
 216                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 217                 plt_dp_info("HW completion code 0x%x", res->compcode);
 218
 219                 switch (res->compcode) {
 220                 case CPT_COMP_INSTERR:
 221                         plt_dp_err("Request failed with instruction error");
 222                         break;
 223                 case CPT_COMP_FAULT:
 224                         plt_dp_err("Request failed with DMA fault");
 225                         break;
 226                 case CPT_COMP_HWERR:
 227                         plt_dp_err("Request failed with hardware error");
 228                         break;
 229                 default:
 230                         plt_dp_err(
 231                                 "Request failed with unknown completion code");
 232                 }
 233         }
 234
 235 temp_sess_free:
 236         if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 237                 if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 238                         sym_session_clear(cn10k_cryptodev_driver_id,
 239                                           cop->sym->session);
 240                         sz = rte_cryptodev_sym_get_existing_header_session_size(
 241                                 cop->sym->session);
 242                         memset(cop->sym->session, 0, sz);
 243                         rte_mempool_put(qp->sess_mp, cop->sym->session);
 244                         cop->sym->session = NULL;
 245                 }
 246         }
 247 }
 248
 249 static uint16_t
 250 cn10k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 251 {
 252         struct cpt_inflight_req *infl_req;
 253         struct cnxk_cpt_qp *qp = qptr;
 254         struct pending_queue *pend_q;
 255         struct cpt_cn10k_res_s *res;
 256         struct rte_crypto_op *cop;
 257         int i, nb_pending;
 258
 259         pend_q = &qp->pend_q;
 260
 261         nb_pending = pend_q->pending_count;
 262
 263         if (nb_ops > nb_pending)
 264                 nb_ops = nb_pending;
 265
 266         for (i = 0; i < nb_ops; i++) {
 267                 infl_req = &pend_q->req_queue[pend_q->deq_head];
 268
 269                 res = (struct cpt_cn10k_res_s *)&infl_req->res;
 270
 271                 if (unlikely(res->compcode == CPT_COMP_NOT_DONE)) {
 272                         if (unlikely(rte_get_timer_cycles() >
 273                                      pend_q->time_out)) {
 274                                 plt_err("Request timed out");
 275                                 pend_q->time_out = rte_get_timer_cycles() +
 276                                                    DEFAULT_COMMAND_TIMEOUT *
 277                                                            rte_get_timer_hz();
 278                         }
 279                         break;
 280                 }
 281
 282                 MOD_INC(pend_q->deq_head, qp->lf.nb_desc);
 283
 284                 cop = infl_req->cop;
 285
 286                 ops[i] = cop;
 287
 288                 cn10k_cpt_dequeue_post_process(qp, cop, infl_req);
 289
 290                 if (unlikely(infl_req->op_flags & CPT_OP_FLAGS_METABUF))
 291                         rte_mempool_put(qp->meta_info.pool, infl_req->mdata);
 292         }
 293
 294         pend_q->pending_count -= i;
 295
 296         return i;
 297 }
 298
 299 void
 300 cn10k_cpt_set_enqdeq_fns(struct rte_cryptodev *dev)
 301 {
 302         dev->enqueue_burst = cn10k_cpt_enqueue_burst;
 303         dev->dequeue_burst = cn10k_cpt_dequeue_burst;
 304
 305         rte_mb();
 306 }
 307
 308 static void
 309 cn10k_cpt_dev_info_get(struct rte_cryptodev *dev,
 310                        struct rte_cryptodev_info *info)
 311 {
 312         if (info != NULL) {
 313                 cnxk_cpt_dev_info_get(dev, info);
 314                 info->driver_id = cn10k_cryptodev_driver_id;
 315         }
 316 }
 317
 318 struct rte_cryptodev_ops cn10k_cpt_ops = {
 319         /* Device control ops */
 320         .dev_configure = cnxk_cpt_dev_config,
 321         .dev_start = cnxk_cpt_dev_start,
 322         .dev_stop = cnxk_cpt_dev_stop,
 323         .dev_close = cnxk_cpt_dev_close,
 324         .dev_infos_get = cn10k_cpt_dev_info_get,
 325
 326         .stats_get = NULL,
 327         .stats_reset = NULL,
 328         .queue_pair_setup = cnxk_cpt_queue_pair_setup,
 329         .queue_pair_release = cnxk_cpt_queue_pair_release,
 330
 331         /* Symmetric crypto ops */
 332         .sym_session_get_size = cnxk_cpt_sym_session_get_size,
 333         .sym_session_configure = cnxk_cpt_sym_session_configure,
 334         .sym_session_clear = cnxk_cpt_sym_session_clear,
 335
 336         /* Asymmetric crypto ops */
 337         .asym_session_get_size = NULL,
 338         .asym_session_configure = NULL,
 339         .asym_session_clear = NULL,
 340
 341 };