drivers/crypto/cnxk/cn10k_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #include <rte_cryptodev.h>
   6 #include <rte_cryptodev_pmd.h>
   7 #include <rte_ip.h>
   8
   9 #include "cn10k_cryptodev.h"
  10 #include "cn10k_cryptodev_ops.h"
  11 #include "cn10k_ipsec_la_ops.h"
  12 #include "cn10k_ipsec.h"
  13 #include "cnxk_ae.h"
  14 #include "cnxk_cryptodev.h"
  15 #include "cnxk_cryptodev_ops.h"
  16 #include "cnxk_se.h"
  17
  18 static inline struct cnxk_se_sess *
  19 cn10k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op)
  20 {
  21         const int driver_id = cn10k_cryptodev_driver_id;
  22         struct rte_crypto_sym_op *sym_op = op->sym;
  23         struct rte_cryptodev_sym_session *sess;
  24         struct cnxk_se_sess *priv;
  25         int ret;
  26
  27         /* Create temporary session */
  28         sess = rte_cryptodev_sym_session_create(qp->sess_mp);
  29         if (sess == NULL)
  30                 return NULL;
  31
  32         ret = sym_session_configure(qp->lf.roc_cpt, driver_id, sym_op->xform,
  33                                     sess, qp->sess_mp_priv);
  34         if (ret)
  35                 goto sess_put;
  36
  37         priv = get_sym_session_private_data(sess, driver_id);
  38
  39         sym_op->session = sess;
  40
  41         return priv;
  42
  43 sess_put:
  44         rte_mempool_put(qp->sess_mp, sess);
  45         return NULL;
  46 }
  47
  48 static __rte_always_inline int __rte_hot
  49 cpt_sec_inst_fill(struct rte_crypto_op *op, struct cn10k_sec_session *sess,
  50                   struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst)
  51 {
  52         struct rte_crypto_sym_op *sym_op = op->sym;
  53         union roc_ot_ipsec_sa_word2 *w2;
  54         struct cn10k_ipsec_sa *sa;
  55         int ret;
  56
  57         if (unlikely(sym_op->m_dst && sym_op->m_dst != sym_op->m_src)) {
  58                 plt_dp_err("Out of place is not supported");
  59                 return -ENOTSUP;
  60         }
  61
  62         if (unlikely(!rte_pktmbuf_is_contiguous(sym_op->m_src))) {
  63                 plt_dp_err("Scatter Gather mode is not supported");
  64                 return -ENOTSUP;
  65         }
  66
  67         sa = &sess->sa;
  68         w2 = (union roc_ot_ipsec_sa_word2 *)&sa->in_sa.w2;
  69
  70         if (w2->s.dir == ROC_IE_OT_SA_DIR_OUTBOUND)
  71                 ret = process_outb_sa(op, sa, inst);
  72         else {
  73                 infl_req->op_flags |= CPT_OP_FLAGS_IPSEC_DIR_INBOUND;
  74                 ret = process_inb_sa(op, sa, inst);
  75         }
  76
  77         return ret;
  78 }
  79
  80 static __rte_always_inline int __rte_hot
  81 cpt_sym_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,
  82                   struct cnxk_se_sess *sess, struct cpt_inflight_req *infl_req,
  83                   struct cpt_inst_s *inst)
  84 {
  85         uint64_t cpt_op;
  86         int ret = -1;
  87
  88         cpt_op = sess->cpt_op;
  89
  90         if (cpt_op & ROC_SE_OP_CIPHER_MASK)
  91                 ret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst);
  92         else
  93                 ret = fill_digest_params(op, sess, &qp->meta_info, infl_req,
  94                                          inst);
  95
  96         return ret;
  97 }
  98
  99 static inline int
 100 cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[],
 101                     struct cpt_inst_s inst[], struct cpt_inflight_req *infl_req)
 102 {
 103         struct cn10k_sec_session *sec_sess;
 104         struct rte_crypto_asym_op *asym_op;
 105         struct rte_crypto_sym_op *sym_op;
 106         struct cnxk_ae_sess *ae_sess;
 107         struct cnxk_se_sess *sess;
 108         struct rte_crypto_op *op;
 109         uint64_t w7;
 110         int ret;
 111
 112         op = ops[0];
 113
 114         inst[0].w0.u64 = 0;
 115         inst[0].w2.u64 = 0;
 116         inst[0].w3.u64 = 0;
 117
 118         sym_op = op->sym;
 119
 120         if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 121                 if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 122                         sec_sess = get_sec_session_private_data(
 123                                 sym_op->sec_session);
 124                         ret = cpt_sec_inst_fill(op, sec_sess, infl_req,
 125                                                 &inst[0]);
 126                         if (unlikely(ret))
 127                                 return 0;
 128                         w7 = sec_sess->sa.inst.w7;
 129                 } else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
 130                         sess = get_sym_session_private_data(
 131                                 sym_op->session, cn10k_cryptodev_driver_id);
 132                         ret = cpt_sym_inst_fill(qp, op, sess, infl_req,
 133                                                 &inst[0]);
 134                         if (unlikely(ret))
 135                                 return 0;
 136                         w7 = sess->cpt_inst_w7;
 137                 } else {
 138                         sess = cn10k_cpt_sym_temp_sess_create(qp, op);
 139                         if (unlikely(sess == NULL)) {
 140                                 plt_dp_err("Could not create temp session");
 141                                 return 0;
 142                         }
 143
 144                         ret = cpt_sym_inst_fill(qp, op, sess, infl_req,
 145                                                 &inst[0]);
 146                         if (unlikely(ret)) {
 147                                 sym_session_clear(cn10k_cryptodev_driver_id,
 148                                                   op->sym->session);
 149                                 rte_mempool_put(qp->sess_mp, op->sym->session);
 150                                 return 0;
 151                         }
 152                         w7 = sess->cpt_inst_w7;
 153                 }
 154         } else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 155
 156                 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
 157                         asym_op = op->asym;
 158                         ae_sess = get_asym_session_private_data(
 159                                 asym_op->session, cn10k_cryptodev_driver_id);
 160                         ret = cnxk_ae_enqueue(qp, op, infl_req, &inst[0],
 161                                               ae_sess);
 162                         if (unlikely(ret))
 163                                 return 0;
 164                         w7 = ae_sess->cpt_inst_w7;
 165                 } else {
 166                         plt_dp_err("Not supported Asym op without session");
 167                         return 0;
 168                 }
 169         } else {
 170                 plt_dp_err("Unsupported op type");
 171                 return 0;
 172         }
 173
 174         inst[0].res_addr = (uint64_t)&infl_req->res;
 175         infl_req->res.cn10k.compcode = CPT_COMP_NOT_DONE;
 176         infl_req->cop = op;
 177
 178         inst[0].w7.u64 = w7;
 179
 180         return 1;
 181 }
 182
 183 #define PKTS_PER_LOOP   32
 184 #define PKTS_PER_STEORL 16
 185
 186 static uint16_t
 187 cn10k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 188 {
 189         uint64_t lmt_base, lmt_arg, io_addr;
 190         struct cpt_inflight_req *infl_req;
 191         uint16_t nb_allowed, count = 0;
 192         struct cnxk_cpt_qp *qp = qptr;
 193         struct pending_queue *pend_q;
 194         struct cpt_inst_s *inst;
 195         uint16_t lmt_id;
 196         int ret, i;
 197
 198         pend_q = &qp->pend_q;
 199
 200         nb_allowed = qp->lf.nb_desc - pend_q->pending_count;
 201         nb_ops = RTE_MIN(nb_ops, nb_allowed);
 202
 203         if (unlikely(nb_ops == 0))
 204                 return 0;
 205
 206         lmt_base = qp->lmtline.lmt_base;
 207         io_addr = qp->lmtline.io_addr;
 208
 209         ROC_LMT_BASE_ID_GET(lmt_base, lmt_id);
 210         inst = (struct cpt_inst_s *)lmt_base;
 211
 212 again:
 213         for (i = 0; i < RTE_MIN(PKTS_PER_LOOP, nb_ops); i++) {
 214                 infl_req = &pend_q->req_queue[pend_q->enq_tail];
 215                 infl_req->op_flags = 0;
 216
 217                 ret = cn10k_cpt_fill_inst(qp, ops + i, &inst[2 * i], infl_req);
 218                 if (unlikely(ret != 1)) {
 219                         plt_dp_err("Could not process op: %p", ops + i);
 220                         if (i == 0)
 221                                 goto update_pending;
 222                         break;
 223                 }
 224
 225                 MOD_INC(pend_q->enq_tail, qp->lf.nb_desc);
 226         }
 227
 228         if (i > PKTS_PER_STEORL) {
 229                 lmt_arg = ROC_CN10K_CPT_LMT_ARG | (PKTS_PER_STEORL - 1) << 12 |
 230                           (uint64_t)lmt_id;
 231                 roc_lmt_submit_steorl(lmt_arg, io_addr);
 232                 lmt_arg = ROC_CN10K_CPT_LMT_ARG |
 233                           (i - PKTS_PER_STEORL - 1) << 12 |
 234                           (uint64_t)(lmt_id + PKTS_PER_STEORL);
 235                 roc_lmt_submit_steorl(lmt_arg, io_addr);
 236         } else {
 237                 lmt_arg = ROC_CN10K_CPT_LMT_ARG | (i - 1) << 12 |
 238                           (uint64_t)lmt_id;
 239                 roc_lmt_submit_steorl(lmt_arg, io_addr);
 240         }
 241
 242         rte_io_wmb();
 243
 244         if (nb_ops - i > 0 && i == PKTS_PER_LOOP) {
 245                 nb_ops -= i;
 246                 ops += i;
 247                 count += i;
 248                 goto again;
 249         }
 250
 251 update_pending:
 252         pend_q->pending_count += count + i;
 253
 254         pend_q->time_out = rte_get_timer_cycles() +
 255                            DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 256
 257         return count + i;
 258 }
 259
 260 static inline void
 261 cn10k_cpt_sec_post_process(struct rte_crypto_op *cop,
 262                            struct cpt_inflight_req *infl_req)
 263 {
 264         struct rte_crypto_sym_op *sym_op = cop->sym;
 265         struct rte_mbuf *m = sym_op->m_src;
 266         struct rte_ipv6_hdr *ip6;
 267         struct rte_ipv4_hdr *ip;
 268         uint16_t m_len;
 269
 270         if (infl_req->op_flags & CPT_OP_FLAGS_IPSEC_DIR_INBOUND) {
 271                 ip = (struct rte_ipv4_hdr *)rte_pktmbuf_mtod(m, char *);
 272
 273                 if (((ip->version_ihl & 0xf0) >> RTE_IPV4_IHL_MULTIPLIER) ==
 274                     IPVERSION) {
 275                         m_len = rte_be_to_cpu_16(ip->total_length);
 276                 } else {
 277                         PLT_ASSERT(((ip->version_ihl & 0xf0) >>
 278                                     RTE_IPV4_IHL_MULTIPLIER) == 6);
 279                         ip6 = (struct rte_ipv6_hdr *)ip;
 280                         m_len = rte_be_to_cpu_16(ip6->payload_len) +
 281                                 sizeof(struct rte_ipv6_hdr);
 282                 }
 283                 m->data_len = m_len;
 284                 m->pkt_len = m_len;
 285         }
 286 }
 287
 288 static inline void
 289 cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
 290                                struct rte_crypto_op *cop,
 291                                struct cpt_inflight_req *infl_req)
 292 {
 293         struct cpt_cn10k_res_s *res = (struct cpt_cn10k_res_s *)&infl_req->res;
 294         unsigned int sz;
 295
 296         if (likely(res->compcode == CPT_COMP_GOOD ||
 297                    res->compcode == CPT_COMP_WARN)) {
 298                 if (unlikely(res->uc_compcode)) {
 299                         if (res->uc_compcode == ROC_SE_ERR_GC_ICV_MISCOMPARE)
 300                                 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 301                         else
 302                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 303
 304                         plt_dp_info("Request failed with microcode error");
 305                         plt_dp_info("MC completion code 0x%x",
 306                                     res->uc_compcode);
 307                         goto temp_sess_free;
 308                 }
 309
 310                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 311                 if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 312                         if (cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 313                                 cn10k_cpt_sec_post_process(cop, infl_req);
 314                                 return;
 315                         }
 316
 317                         /* Verify authentication data if required */
 318                         if (unlikely(infl_req->op_flags &
 319                                      CPT_OP_FLAGS_AUTH_VERIFY)) {
 320                                 uintptr_t *rsp = infl_req->mdata;
 321                                 compl_auth_verify(cop, (uint8_t *)rsp[0],
 322                                                   rsp[1]);
 323                         }
 324                 } else if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 325                         struct rte_crypto_asym_op *op = cop->asym;
 326                         uintptr_t *mdata = infl_req->mdata;
 327                         struct cnxk_ae_sess *sess;
 328
 329                         sess = get_asym_session_private_data(
 330                                 op->session, cn10k_cryptodev_driver_id);
 331
 332                         cnxk_ae_post_process(cop, sess, (uint8_t *)mdata[0]);
 333                 }
 334         } else {
 335                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 336                 plt_dp_info("HW completion code 0x%x", res->compcode);
 337
 338                 switch (res->compcode) {
 339                 case CPT_COMP_INSTERR:
 340                         plt_dp_err("Request failed with instruction error");
 341                         break;
 342                 case CPT_COMP_FAULT:
 343                         plt_dp_err("Request failed with DMA fault");
 344                         break;
 345                 case CPT_COMP_HWERR:
 346                         plt_dp_err("Request failed with hardware error");
 347                         break;
 348                 default:
 349                         plt_dp_err(
 350                                 "Request failed with unknown completion code");
 351                 }
 352         }
 353
 354 temp_sess_free:
 355         if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 356                 if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 357                         sym_session_clear(cn10k_cryptodev_driver_id,
 358                                           cop->sym->session);
 359                         sz = rte_cryptodev_sym_get_existing_header_session_size(
 360                                 cop->sym->session);
 361                         memset(cop->sym->session, 0, sz);
 362                         rte_mempool_put(qp->sess_mp, cop->sym->session);
 363                         cop->sym->session = NULL;
 364                 }
 365         }
 366 }
 367
 368 static uint16_t
 369 cn10k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 370 {
 371         struct cpt_inflight_req *infl_req;
 372         struct cnxk_cpt_qp *qp = qptr;
 373         struct pending_queue *pend_q;
 374         struct cpt_cn10k_res_s *res;
 375         struct rte_crypto_op *cop;
 376         int i, nb_pending;
 377
 378         pend_q = &qp->pend_q;
 379
 380         nb_pending = pend_q->pending_count;
 381
 382         if (nb_ops > nb_pending)
 383                 nb_ops = nb_pending;
 384
 385         for (i = 0; i < nb_ops; i++) {
 386                 infl_req = &pend_q->req_queue[pend_q->deq_head];
 387
 388                 res = (struct cpt_cn10k_res_s *)&infl_req->res;
 389
 390                 if (unlikely(res->compcode == CPT_COMP_NOT_DONE)) {
 391                         if (unlikely(rte_get_timer_cycles() >
 392                                      pend_q->time_out)) {
 393                                 plt_err("Request timed out");
 394                                 pend_q->time_out = rte_get_timer_cycles() +
 395                                                    DEFAULT_COMMAND_TIMEOUT *
 396                                                            rte_get_timer_hz();
 397                         }
 398                         break;
 399                 }
 400
 401                 MOD_INC(pend_q->deq_head, qp->lf.nb_desc);
 402
 403                 cop = infl_req->cop;
 404
 405                 ops[i] = cop;
 406
 407                 cn10k_cpt_dequeue_post_process(qp, cop, infl_req);
 408
 409                 if (unlikely(infl_req->op_flags & CPT_OP_FLAGS_METABUF))
 410                         rte_mempool_put(qp->meta_info.pool, infl_req->mdata);
 411         }
 412
 413         pend_q->pending_count -= i;
 414
 415         return i;
 416 }
 417
 418 void
 419 cn10k_cpt_set_enqdeq_fns(struct rte_cryptodev *dev)
 420 {
 421         dev->enqueue_burst = cn10k_cpt_enqueue_burst;
 422         dev->dequeue_burst = cn10k_cpt_dequeue_burst;
 423
 424         rte_mb();
 425 }
 426
 427 static void
 428 cn10k_cpt_dev_info_get(struct rte_cryptodev *dev,
 429                        struct rte_cryptodev_info *info)
 430 {
 431         if (info != NULL) {
 432                 cnxk_cpt_dev_info_get(dev, info);
 433                 info->driver_id = cn10k_cryptodev_driver_id;
 434         }
 435 }
 436
 437 struct rte_cryptodev_ops cn10k_cpt_ops = {
 438         /* Device control ops */
 439         .dev_configure = cnxk_cpt_dev_config,
 440         .dev_start = cnxk_cpt_dev_start,
 441         .dev_stop = cnxk_cpt_dev_stop,
 442         .dev_close = cnxk_cpt_dev_close,
 443         .dev_infos_get = cn10k_cpt_dev_info_get,
 444
 445         .stats_get = NULL,
 446         .stats_reset = NULL,
 447         .queue_pair_setup = cnxk_cpt_queue_pair_setup,
 448         .queue_pair_release = cnxk_cpt_queue_pair_release,
 449
 450         /* Symmetric crypto ops */
 451         .sym_session_get_size = cnxk_cpt_sym_session_get_size,
 452         .sym_session_configure = cnxk_cpt_sym_session_configure,
 453         .sym_session_clear = cnxk_cpt_sym_session_clear,
 454
 455         /* Asymmetric crypto ops */
 456         .asym_session_get_size = cnxk_ae_session_size_get,
 457         .asym_session_configure = cnxk_ae_session_cfg,
 458         .asym_session_clear = cnxk_ae_session_clear,
 459
 460 };