drivers/crypto/cnxk/cn10k_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #include <rte_cryptodev.h>
   6 #include <rte_cryptodev_pmd.h>
   7
   8 #include "cn10k_cryptodev.h"
   9 #include "cn10k_cryptodev_ops.h"
  10 #include "cnxk_cryptodev.h"
  11 #include "cnxk_cryptodev_ops.h"
  12 #include "cnxk_se.h"
  13
  14 static inline struct cnxk_se_sess *
  15 cn10k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op)
  16 {
  17         const int driver_id = cn10k_cryptodev_driver_id;
  18         struct rte_crypto_sym_op *sym_op = op->sym;
  19         struct rte_cryptodev_sym_session *sess;
  20         struct cnxk_se_sess *priv;
  21         int ret;
  22
  23         /* Create temporary session */
  24         sess = rte_cryptodev_sym_session_create(qp->sess_mp);
  25         if (sess == NULL)
  26                 return NULL;
  27
  28         ret = sym_session_configure(qp->lf.roc_cpt, driver_id, sym_op->xform,
  29                                     sess, qp->sess_mp_priv);
  30         if (ret)
  31                 goto sess_put;
  32
  33         priv = get_sym_session_private_data(sess, driver_id);
  34
  35         sym_op->session = sess;
  36
  37         return priv;
  38
  39 sess_put:
  40         rte_mempool_put(qp->sess_mp, sess);
  41         return NULL;
  42 }
  43
  44 static __rte_always_inline int __rte_hot
  45 cpt_sym_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,
  46                   struct cnxk_se_sess *sess, struct cpt_inflight_req *infl_req,
  47                   struct cpt_inst_s *inst)
  48 {
  49         RTE_SET_USED(qp);
  50         RTE_SET_USED(op);
  51         RTE_SET_USED(sess);
  52         RTE_SET_USED(infl_req);
  53         RTE_SET_USED(inst);
  54
  55         return -ENOTSUP;
  56 }
  57
  58 static inline int
  59 cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[],
  60                     struct cpt_inst_s inst[], struct cpt_inflight_req *infl_req)
  61 {
  62         struct rte_crypto_sym_op *sym_op;
  63         struct cnxk_se_sess *sess;
  64         struct rte_crypto_op *op;
  65         uint64_t w7;
  66         int ret;
  67
  68         op = ops[0];
  69
  70         inst[0].w0.u64 = 0;
  71         inst[0].w2.u64 = 0;
  72         inst[0].w3.u64 = 0;
  73
  74         sym_op = op->sym;
  75
  76         if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
  77                 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
  78                         sess = get_sym_session_private_data(
  79                                 sym_op->session, cn10k_cryptodev_driver_id);
  80                         ret = cpt_sym_inst_fill(qp, op, sess, infl_req,
  81                                                 &inst[0]);
  82                         if (unlikely(ret))
  83                                 return 0;
  84                         w7 = sess->cpt_inst_w7;
  85                 } else {
  86                         sess = cn10k_cpt_sym_temp_sess_create(qp, op);
  87                         if (unlikely(sess == NULL)) {
  88                                 plt_dp_err("Could not create temp session");
  89                                 return 0;
  90                         }
  91
  92                         ret = cpt_sym_inst_fill(qp, op, sess, infl_req,
  93                                                 &inst[0]);
  94                         if (unlikely(ret)) {
  95                                 sym_session_clear(cn10k_cryptodev_driver_id,
  96                                                   op->sym->session);
  97                                 rte_mempool_put(qp->sess_mp, op->sym->session);
  98                                 return 0;
  99                         }
 100                         w7 = sess->cpt_inst_w7;
 101                 }
 102         } else {
 103                 plt_dp_err("Unsupported op type");
 104                 return 0;
 105         }
 106
 107         inst[0].res_addr = (uint64_t)&infl_req->res;
 108         infl_req->res.cn10k.compcode = CPT_COMP_NOT_DONE;
 109         infl_req->cop = op;
 110
 111         inst[0].w7.u64 = w7;
 112
 113         return 1;
 114 }
 115
 116 #define PKTS_PER_LOOP   32
 117 #define PKTS_PER_STEORL 16
 118
 119 static uint16_t
 120 cn10k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 121 {
 122         uint64_t lmt_base, lmt_arg, io_addr;
 123         struct cpt_inflight_req *infl_req;
 124         uint16_t nb_allowed, count = 0;
 125         struct cnxk_cpt_qp *qp = qptr;
 126         struct pending_queue *pend_q;
 127         struct cpt_inst_s *inst;
 128         uint16_t lmt_id;
 129         int ret, i;
 130
 131         pend_q = &qp->pend_q;
 132
 133         nb_allowed = qp->lf.nb_desc - pend_q->pending_count;
 134         nb_ops = RTE_MIN(nb_ops, nb_allowed);
 135
 136         if (unlikely(nb_ops == 0))
 137                 return 0;
 138
 139         lmt_base = qp->lmtline.lmt_base;
 140         io_addr = qp->lmtline.io_addr;
 141
 142         ROC_LMT_BASE_ID_GET(lmt_base, lmt_id);
 143         inst = (struct cpt_inst_s *)lmt_base;
 144
 145 again:
 146         for (i = 0; i < RTE_MIN(PKTS_PER_LOOP, nb_ops); i++) {
 147                 infl_req = &pend_q->req_queue[pend_q->enq_tail];
 148                 infl_req->op_flags = 0;
 149
 150                 ret = cn10k_cpt_fill_inst(qp, ops + i, &inst[2 * i], infl_req);
 151                 if (unlikely(ret != 1)) {
 152                         plt_dp_err("Could not process op: %p", ops + i);
 153                         if (i == 0)
 154                                 goto update_pending;
 155                         break;
 156                 }
 157
 158                 MOD_INC(pend_q->enq_tail, qp->lf.nb_desc);
 159         }
 160
 161         if (i > PKTS_PER_STEORL) {
 162                 lmt_arg = ROC_CN10K_CPT_LMT_ARG | (PKTS_PER_STEORL - 1) << 12 |
 163                           (uint64_t)lmt_id;
 164                 roc_lmt_submit_steorl(lmt_arg, io_addr);
 165                 lmt_arg = ROC_CN10K_CPT_LMT_ARG |
 166                           (i - PKTS_PER_STEORL - 1) << 12 |
 167                           (uint64_t)(lmt_id + PKTS_PER_STEORL);
 168                 roc_lmt_submit_steorl(lmt_arg, io_addr);
 169         } else {
 170                 lmt_arg = ROC_CN10K_CPT_LMT_ARG | (i - 1) << 12 |
 171                           (uint64_t)lmt_id;
 172                 roc_lmt_submit_steorl(lmt_arg, io_addr);
 173         }
 174
 175         rte_io_wmb();
 176
 177         if (nb_ops - i > 0 && i == PKTS_PER_LOOP) {
 178                 nb_ops -= i;
 179                 ops += i;
 180                 count += i;
 181                 goto again;
 182         }
 183
 184 update_pending:
 185         pend_q->pending_count += count + i;
 186
 187         pend_q->time_out = rte_get_timer_cycles() +
 188                            DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 189
 190         return count + i;
 191 }
 192
 193 static inline void
 194 cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
 195                                struct rte_crypto_op *cop,
 196                                struct cpt_inflight_req *infl_req)
 197 {
 198         struct cpt_cn10k_res_s *res = (struct cpt_cn10k_res_s *)&infl_req->res;
 199         unsigned int sz;
 200
 201         if (likely(res->compcode == CPT_COMP_GOOD ||
 202                    res->compcode == CPT_COMP_WARN)) {
 203                 if (unlikely(res->uc_compcode)) {
 204                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 205
 206                         plt_dp_info("Request failed with microcode error");
 207                         plt_dp_info("MC completion code 0x%x",
 208                                     res->uc_compcode);
 209                         goto temp_sess_free;
 210                 }
 211
 212                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 213         } else {
 214                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 215                 plt_dp_info("HW completion code 0x%x", res->compcode);
 216
 217                 switch (res->compcode) {
 218                 case CPT_COMP_INSTERR:
 219                         plt_dp_err("Request failed with instruction error");
 220                         break;
 221                 case CPT_COMP_FAULT:
 222                         plt_dp_err("Request failed with DMA fault");
 223                         break;
 224                 case CPT_COMP_HWERR:
 225                         plt_dp_err("Request failed with hardware error");
 226                         break;
 227                 default:
 228                         plt_dp_err(
 229                                 "Request failed with unknown completion code");
 230                 }
 231         }
 232
 233 temp_sess_free:
 234         if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 235                 if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 236                         sym_session_clear(cn10k_cryptodev_driver_id,
 237                                           cop->sym->session);
 238                         sz = rte_cryptodev_sym_get_existing_header_session_size(
 239                                 cop->sym->session);
 240                         memset(cop->sym->session, 0, sz);
 241                         rte_mempool_put(qp->sess_mp, cop->sym->session);
 242                         cop->sym->session = NULL;
 243                 }
 244         }
 245 }
 246
 247 static uint16_t
 248 cn10k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 249 {
 250         struct cpt_inflight_req *infl_req;
 251         struct cnxk_cpt_qp *qp = qptr;
 252         struct pending_queue *pend_q;
 253         struct cpt_cn10k_res_s *res;
 254         struct rte_crypto_op *cop;
 255         int i, nb_pending;
 256
 257         pend_q = &qp->pend_q;
 258
 259         nb_pending = pend_q->pending_count;
 260
 261         if (nb_ops > nb_pending)
 262                 nb_ops = nb_pending;
 263
 264         for (i = 0; i < nb_ops; i++) {
 265                 infl_req = &pend_q->req_queue[pend_q->deq_head];
 266
 267                 res = (struct cpt_cn10k_res_s *)&infl_req->res;
 268
 269                 if (unlikely(res->compcode == CPT_COMP_NOT_DONE)) {
 270                         if (unlikely(rte_get_timer_cycles() >
 271                                      pend_q->time_out)) {
 272                                 plt_err("Request timed out");
 273                                 pend_q->time_out = rte_get_timer_cycles() +
 274                                                    DEFAULT_COMMAND_TIMEOUT *
 275                                                            rte_get_timer_hz();
 276                         }
 277                         break;
 278                 }
 279
 280                 MOD_INC(pend_q->deq_head, qp->lf.nb_desc);
 281
 282                 cop = infl_req->cop;
 283
 284                 ops[i] = cop;
 285
 286                 cn10k_cpt_dequeue_post_process(qp, cop, infl_req);
 287
 288                 if (unlikely(infl_req->op_flags & CPT_OP_FLAGS_METABUF))
 289                         rte_mempool_put(qp->meta_info.pool, infl_req->mdata);
 290         }
 291
 292         pend_q->pending_count -= i;
 293
 294         return i;
 295 }
 296
 297 void
 298 cn10k_cpt_set_enqdeq_fns(struct rte_cryptodev *dev)
 299 {
 300         dev->enqueue_burst = cn10k_cpt_enqueue_burst;
 301         dev->dequeue_burst = cn10k_cpt_dequeue_burst;
 302
 303         rte_mb();
 304 }
 305
 306 static void
 307 cn10k_cpt_dev_info_get(struct rte_cryptodev *dev,
 308                        struct rte_cryptodev_info *info)
 309 {
 310         if (info != NULL) {
 311                 cnxk_cpt_dev_info_get(dev, info);
 312                 info->driver_id = cn10k_cryptodev_driver_id;
 313         }
 314 }
 315
 316 struct rte_cryptodev_ops cn10k_cpt_ops = {
 317         /* Device control ops */
 318         .dev_configure = cnxk_cpt_dev_config,
 319         .dev_start = cnxk_cpt_dev_start,
 320         .dev_stop = cnxk_cpt_dev_stop,
 321         .dev_close = cnxk_cpt_dev_close,
 322         .dev_infos_get = cn10k_cpt_dev_info_get,
 323
 324         .stats_get = NULL,
 325         .stats_reset = NULL,
 326         .queue_pair_setup = cnxk_cpt_queue_pair_setup,
 327         .queue_pair_release = cnxk_cpt_queue_pair_release,
 328
 329         /* Symmetric crypto ops */
 330         .sym_session_get_size = cnxk_cpt_sym_session_get_size,
 331         .sym_session_configure = cnxk_cpt_sym_session_configure,
 332         .sym_session_clear = cnxk_cpt_sym_session_clear,
 333
 334         /* Asymmetric crypto ops */
 335         .asym_session_get_size = NULL,
 336         .asym_session_configure = NULL,
 337         .asym_session_clear = NULL,
 338
 339 };