1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #include <cryptodev_pmd.h>
8 #include <rte_malloc.h>
9 #include <rte_security.h>
10 #include <rte_security_driver.h>
13 #include "cn10k_ipsec.h"
14 #include "cnxk_cryptodev.h"
15 #include "cnxk_cryptodev_ops.h"
16 #include "cnxk_ipsec.h"
17 #include "cnxk_security.h"
22 ipsec_cpt_inst_w7_get(struct roc_cpt *roc_cpt, void *sa)
27 w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_IE];
29 w7.s.cptr = (uint64_t)sa;
36 cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,
37 struct rte_security_ipsec_xform *ipsec_xfrm,
38 struct rte_crypto_sym_xform *crypto_xfrm,
39 struct rte_security_session *sec_sess)
41 union roc_ot_ipsec_outb_param1 param1;
42 struct roc_ot_ipsec_outb_sa *sa_dptr;
43 struct cnxk_ipsec_outb_rlens rlens;
44 struct cn10k_sec_session *sess;
45 struct cn10k_ipsec_sa *sa;
46 union cpt_inst_w4 inst_w4;
50 sess = get_sec_session_private_data(sec_sess);
54 /* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */
55 sa_dptr = plt_zmalloc(sizeof(struct roc_ot_ipsec_outb_sa), 8);
56 if (sa_dptr == NULL) {
57 plt_err("Couldn't allocate memory for SA dptr");
61 /* Translate security parameters to SA */
62 ret = cnxk_ot_ipsec_outb_sa_fill(sa_dptr, ipsec_xfrm, crypto_xfrm);
64 plt_err("Could not fill outbound session parameters");
68 sa->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, out_sa);
71 /* Use IV from application in debug mode */
72 if (ipsec_xfrm->options.iv_gen_disable == 1) {
73 sa_dptr->w2.s.iv_src = ROC_IE_OT_SA_IV_SRC_FROM_SA;
74 if (crypto_xfrm->type == RTE_CRYPTO_SYM_XFORM_AEAD) {
75 sa->iv_offset = crypto_xfrm->aead.iv.offset;
76 sa->iv_length = crypto_xfrm->aead.iv.length;
78 sa->iv_offset = crypto_xfrm->cipher.iv.offset;
79 sa->iv_length = crypto_xfrm->cipher.iv.length;
83 if (ipsec_xfrm->options.iv_gen_disable != 0) {
84 plt_err("Application provided IV not supported");
90 sa->is_outbound = true;
92 /* Get Rlen calculation data */
93 ret = cnxk_ipsec_outb_rlens_get(&rlens, ipsec_xfrm, crypto_xfrm);
97 sa->max_extended_len = rlens.max_extended_len;
99 /* pre-populate CPT INST word 4 */
101 inst_w4.s.opcode_major = ROC_IE_OT_MAJOR_OP_PROCESS_OUTBOUND_IPSEC;
105 param1.s.ttl_or_hop_limit = ipsec_xfrm->options.dec_ttl;
107 /* Disable IP checksum computation by default */
108 param1.s.ip_csum_disable = ROC_IE_OT_SA_INNER_PKT_IP_CSUM_DISABLE;
110 if (ipsec_xfrm->options.ip_csum_enable) {
111 param1.s.ip_csum_disable =
112 ROC_IE_OT_SA_INNER_PKT_IP_CSUM_ENABLE;
115 /* Disable L4 checksum computation by default */
116 param1.s.l4_csum_disable = ROC_IE_OT_SA_INNER_PKT_L4_CSUM_DISABLE;
118 if (ipsec_xfrm->options.l4_csum_enable) {
119 param1.s.l4_csum_disable =
120 ROC_IE_OT_SA_INNER_PKT_L4_CSUM_ENABLE;
123 inst_w4.s.param1 = param1.u16;
125 sa->inst.w4 = inst_w4.u64;
127 if (ipsec_xfrm->options.stats == 1) {
128 /* Enable mib counters */
129 sa_dptr->w0.s.count_mib_bytes = 1;
130 sa_dptr->w0.s.count_mib_pkts = 1;
133 memset(out_sa, 0, sizeof(struct roc_ot_ipsec_outb_sa));
135 /* Copy word0 from sa_dptr to populate ctx_push_sz ctx_size fields */
136 memcpy(out_sa, sa_dptr, 8);
138 plt_atomic_thread_fence(__ATOMIC_SEQ_CST);
140 /* Write session using microcode opcode */
141 ret = roc_cpt_ctx_write(lf, sa_dptr, out_sa,
142 sizeof(struct roc_ot_ipsec_outb_sa));
144 plt_err("Could not write outbound session to hardware");
148 /* Trigger CTX flush so that data is written back to DRAM */
149 roc_cpt_lf_ctx_flush(lf, out_sa, false);
151 plt_atomic_thread_fence(__ATOMIC_SEQ_CST);
160 cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,
161 struct rte_security_ipsec_xform *ipsec_xfrm,
162 struct rte_crypto_sym_xform *crypto_xfrm,
163 struct rte_security_session *sec_sess)
165 union roc_ot_ipsec_inb_param1 param1;
166 struct roc_ot_ipsec_inb_sa *sa_dptr;
167 struct cn10k_sec_session *sess;
168 struct cn10k_ipsec_sa *sa;
169 union cpt_inst_w4 inst_w4;
173 sess = get_sec_session_private_data(sec_sess);
177 /* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */
178 sa_dptr = plt_zmalloc(sizeof(struct roc_ot_ipsec_inb_sa), 8);
179 if (sa_dptr == NULL) {
180 plt_err("Couldn't allocate memory for SA dptr");
184 /* Translate security parameters to SA */
185 ret = cnxk_ot_ipsec_inb_sa_fill(sa_dptr, ipsec_xfrm, crypto_xfrm,
188 plt_err("Could not fill inbound session parameters");
192 sa->is_outbound = false;
193 sa->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, in_sa);
195 /* pre-populate CPT INST word 4 */
197 inst_w4.s.opcode_major = ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC;
201 /* Disable IP checksum verification by default */
202 param1.s.ip_csum_disable = ROC_IE_OT_SA_INNER_PKT_IP_CSUM_DISABLE;
204 if (ipsec_xfrm->options.ip_csum_enable) {
205 param1.s.ip_csum_disable =
206 ROC_IE_OT_SA_INNER_PKT_IP_CSUM_ENABLE;
209 /* Disable L4 checksum verification by default */
210 param1.s.l4_csum_disable = ROC_IE_OT_SA_INNER_PKT_L4_CSUM_DISABLE;
212 if (ipsec_xfrm->options.l4_csum_enable) {
213 param1.s.l4_csum_disable =
214 ROC_IE_OT_SA_INNER_PKT_L4_CSUM_ENABLE;
217 param1.s.esp_trailer_disable = 1;
219 inst_w4.s.param1 = param1.u16;
221 sa->inst.w4 = inst_w4.u64;
223 if (ipsec_xfrm->options.stats == 1) {
224 /* Enable mib counters */
225 sa_dptr->w0.s.count_mib_bytes = 1;
226 sa_dptr->w0.s.count_mib_pkts = 1;
229 memset(in_sa, 0, sizeof(struct roc_ot_ipsec_inb_sa));
231 /* Copy word0 from sa_dptr to populate ctx_push_sz ctx_size fields */
232 memcpy(in_sa, sa_dptr, 8);
234 plt_atomic_thread_fence(__ATOMIC_SEQ_CST);
236 /* Write session using microcode opcode */
237 ret = roc_cpt_ctx_write(lf, sa_dptr, in_sa,
238 sizeof(struct roc_ot_ipsec_inb_sa));
240 plt_err("Could not write inbound session to hardware");
244 /* Trigger CTX flush so that data is written back to DRAM */
245 roc_cpt_lf_ctx_flush(lf, in_sa, true);
247 plt_atomic_thread_fence(__ATOMIC_SEQ_CST);
256 cn10k_ipsec_session_create(void *dev,
257 struct rte_security_ipsec_xform *ipsec_xfrm,
258 struct rte_crypto_sym_xform *crypto_xfrm,
259 struct rte_security_session *sess)
261 struct rte_cryptodev *crypto_dev = dev;
262 struct roc_cpt *roc_cpt;
263 struct cnxk_cpt_vf *vf;
264 struct cnxk_cpt_qp *qp;
267 qp = crypto_dev->data->queue_pairs[0];
269 plt_err("Setup cpt queue pair before creating security session");
273 ret = cnxk_ipsec_xform_verify(ipsec_xfrm, crypto_xfrm);
277 vf = crypto_dev->data->dev_private;
280 if (ipsec_xfrm->direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS)
281 return cn10k_ipsec_inb_sa_create(roc_cpt, &qp->lf, ipsec_xfrm,
284 return cn10k_ipsec_outb_sa_create(roc_cpt, &qp->lf, ipsec_xfrm,
289 cn10k_sec_session_create(void *device, struct rte_security_session_conf *conf,
290 struct rte_security_session *sess,
291 struct rte_mempool *mempool)
293 struct cn10k_sec_session *priv;
296 if (conf->action_type != RTE_SECURITY_ACTION_TYPE_LOOKASIDE_PROTOCOL)
299 if (rte_mempool_get(mempool, (void **)&priv)) {
300 plt_err("Could not allocate security session private data");
304 set_sec_session_private_data(sess, priv);
306 if (conf->protocol != RTE_SECURITY_PROTOCOL_IPSEC) {
310 ret = cn10k_ipsec_session_create(device, &conf->ipsec,
311 conf->crypto_xform, sess);
318 rte_mempool_put(mempool, priv);
319 set_sec_session_private_data(sess, NULL);
324 cn10k_sec_session_destroy(void *dev, struct rte_security_session *sec_sess)
326 struct rte_cryptodev *crypto_dev = dev;
327 union roc_ot_ipsec_sa_word2 *w2;
328 struct cn10k_sec_session *sess;
329 struct rte_mempool *sess_mp;
330 struct cn10k_ipsec_sa *sa;
331 struct cnxk_cpt_qp *qp;
332 struct roc_cpt_lf *lf;
334 sess = get_sec_session_private_data(sec_sess);
338 qp = crypto_dev->data->queue_pairs[0];
346 /* Trigger CTX flush to write dirty data back to DRAM */
347 roc_cpt_lf_ctx_flush(lf, &sa->in_sa, false);
349 /* Wait for 1 ms so that flush is complete */
352 w2 = (union roc_ot_ipsec_sa_word2 *)&sa->in_sa.w2;
355 plt_atomic_thread_fence(__ATOMIC_SEQ_CST);
357 /* Trigger CTX reload to fetch new data from DRAM */
358 roc_cpt_lf_ctx_reload(lf, &sa->in_sa);
360 sess_mp = rte_mempool_from_obj(sess);
362 set_sec_session_private_data(sec_sess, NULL);
363 rte_mempool_put(sess_mp, sess);
369 cn10k_sec_session_get_size(void *device __rte_unused)
371 return sizeof(struct cn10k_sec_session);
375 cn10k_sec_session_stats_get(void *device, struct rte_security_session *sess,
376 struct rte_security_stats *stats)
378 struct rte_cryptodev *crypto_dev = device;
379 struct roc_ot_ipsec_outb_sa *out_sa;
380 struct roc_ot_ipsec_inb_sa *in_sa;
381 union roc_ot_ipsec_sa_word2 *w2;
382 struct cn10k_sec_session *priv;
383 struct cn10k_ipsec_sa *sa;
384 struct cnxk_cpt_qp *qp;
386 priv = get_sec_session_private_data(sess);
390 qp = crypto_dev->data->queue_pairs[0];
395 w2 = (union roc_ot_ipsec_sa_word2 *)&sa->in_sa.w2;
397 stats->protocol = RTE_SECURITY_PROTOCOL_IPSEC;
399 if (w2->s.dir == ROC_IE_SA_DIR_OUTBOUND) {
400 out_sa = &sa->out_sa;
401 roc_cpt_lf_ctx_flush(&qp->lf, out_sa, false);
403 stats->ipsec.opackets = out_sa->ctx.mib_pkts;
404 stats->ipsec.obytes = out_sa->ctx.mib_octs;
407 roc_cpt_lf_ctx_flush(&qp->lf, in_sa, false);
409 stats->ipsec.ipackets = in_sa->ctx.mib_pkts;
410 stats->ipsec.ibytes = in_sa->ctx.mib_octs;
417 cn10k_sec_session_update(void *device, struct rte_security_session *sess,
418 struct rte_security_session_conf *conf)
420 struct rte_cryptodev *crypto_dev = device;
421 struct cn10k_sec_session *priv;
422 struct roc_cpt *roc_cpt;
423 struct cnxk_cpt_qp *qp;
424 struct cnxk_cpt_vf *vf;
427 priv = get_sec_session_private_data(sess);
431 qp = crypto_dev->data->queue_pairs[0];
435 if (conf->ipsec.direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS)
438 ret = cnxk_ipsec_xform_verify(&conf->ipsec, conf->crypto_xform);
442 vf = crypto_dev->data->dev_private;
445 return cn10k_ipsec_outb_sa_create(roc_cpt, &qp->lf, &conf->ipsec,
446 conf->crypto_xform, sess);
449 /* Update platform specific security ops */
451 cn10k_sec_ops_override(void)
453 /* Update platform specific ops */
454 cnxk_sec_ops.session_create = cn10k_sec_session_create;
455 cnxk_sec_ops.session_destroy = cn10k_sec_session_destroy;
456 cnxk_sec_ops.session_get_size = cn10k_sec_session_get_size;
457 cnxk_sec_ops.session_stats_get = cn10k_sec_session_stats_get;
458 cnxk_sec_ops.session_update = cn10k_sec_session_update;