drivers/crypto/cnxk/cnxk_se.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef _CNXK_SE_H_
   6 #define _CNXK_SE_H_
   7 #include <stdbool.h>
   8
   9 #include "cnxk_cryptodev.h"
  10 #include "cnxk_cryptodev_ops.h"
  11
  12 #define SRC_IOV_SIZE                                                           \
  13         (sizeof(struct roc_se_iov_ptr) +                                       \
  14          (sizeof(struct roc_se_buf_ptr) * ROC_SE_MAX_SG_CNT))
  15 #define DST_IOV_SIZE                                                           \
  16         (sizeof(struct roc_se_iov_ptr) +                                       \
  17          (sizeof(struct roc_se_buf_ptr) * ROC_SE_MAX_SG_CNT))
  18
  19 struct cnxk_se_sess {
  20         uint16_t cpt_op : 4;
  21         uint16_t zsk_flag : 4;
  22         uint16_t aes_gcm : 1;
  23         uint16_t aes_ctr : 1;
  24         uint16_t chacha_poly : 1;
  25         uint16_t is_null : 1;
  26         uint16_t is_gmac : 1;
  27         uint16_t rsvd1 : 3;
  28         uint16_t aad_length;
  29         uint8_t mac_len;
  30         uint8_t iv_length;
  31         uint8_t auth_iv_length;
  32         uint16_t iv_offset;
  33         uint16_t auth_iv_offset;
  34         uint32_t salt;
  35         uint64_t cpt_inst_w7;
  36         struct roc_se_ctx roc_se_ctx;
  37 } __rte_cache_aligned;
  38
  39 static __rte_always_inline int
  40 cpt_mac_len_verify(struct rte_crypto_auth_xform *auth)
  41 {
  42         uint16_t mac_len = auth->digest_length;
  43         int ret;
  44
  45         switch (auth->algo) {
  46         case RTE_CRYPTO_AUTH_MD5:
  47         case RTE_CRYPTO_AUTH_MD5_HMAC:
  48                 ret = (mac_len == 16) ? 0 : -1;
  49                 break;
  50         case RTE_CRYPTO_AUTH_SHA1:
  51         case RTE_CRYPTO_AUTH_SHA1_HMAC:
  52                 ret = (mac_len == 20) ? 0 : -1;
  53                 break;
  54         case RTE_CRYPTO_AUTH_SHA224:
  55         case RTE_CRYPTO_AUTH_SHA224_HMAC:
  56                 ret = (mac_len == 28) ? 0 : -1;
  57                 break;
  58         case RTE_CRYPTO_AUTH_SHA256:
  59         case RTE_CRYPTO_AUTH_SHA256_HMAC:
  60                 ret = (mac_len == 32) ? 0 : -1;
  61                 break;
  62         case RTE_CRYPTO_AUTH_SHA384:
  63         case RTE_CRYPTO_AUTH_SHA384_HMAC:
  64                 ret = (mac_len == 48) ? 0 : -1;
  65                 break;
  66         case RTE_CRYPTO_AUTH_SHA512:
  67         case RTE_CRYPTO_AUTH_SHA512_HMAC:
  68                 ret = (mac_len == 64) ? 0 : -1;
  69                 break;
  70         case RTE_CRYPTO_AUTH_NULL:
  71                 ret = 0;
  72                 break;
  73         default:
  74                 ret = -1;
  75         }
  76
  77         return ret;
  78 }
  79
  80 static __rte_always_inline void
  81 cpt_fc_salt_update(struct roc_se_ctx *se_ctx, uint8_t *salt)
  82 {
  83         struct roc_se_context *fctx = &se_ctx->se_ctx.fctx;
  84         memcpy(fctx->enc.encr_iv, salt, 4);
  85 }
  86
  87 static __rte_always_inline uint32_t
  88 fill_sg_comp(struct roc_se_sglist_comp *list, uint32_t i, phys_addr_t dma_addr,
  89              uint32_t size)
  90 {
  91         struct roc_se_sglist_comp *to = &list[i >> 2];
  92
  93         to->u.s.len[i % 4] = rte_cpu_to_be_16(size);
  94         to->ptr[i % 4] = rte_cpu_to_be_64(dma_addr);
  95         i++;
  96         return i;
  97 }
  98
  99 static __rte_always_inline uint32_t
 100 fill_sg_comp_from_buf(struct roc_se_sglist_comp *list, uint32_t i,
 101                       struct roc_se_buf_ptr *from)
 102 {
 103         struct roc_se_sglist_comp *to = &list[i >> 2];
 104
 105         to->u.s.len[i % 4] = rte_cpu_to_be_16(from->size);
 106         to->ptr[i % 4] = rte_cpu_to_be_64((uint64_t)from->vaddr);
 107         i++;
 108         return i;
 109 }
 110
 111 static __rte_always_inline uint32_t
 112 fill_sg_comp_from_buf_min(struct roc_se_sglist_comp *list, uint32_t i,
 113                           struct roc_se_buf_ptr *from, uint32_t *psize)
 114 {
 115         struct roc_se_sglist_comp *to = &list[i >> 2];
 116         uint32_t size = *psize;
 117         uint32_t e_len;
 118
 119         e_len = (size > from->size) ? from->size : size;
 120         to->u.s.len[i % 4] = rte_cpu_to_be_16(e_len);
 121         to->ptr[i % 4] = rte_cpu_to_be_64((uint64_t)from->vaddr);
 122         *psize -= e_len;
 123         i++;
 124         return i;
 125 }
 126
 127 /*
 128  * This fills the MC expected SGIO list
 129  * from IOV given by user.
 130  */
 131 static __rte_always_inline uint32_t
 132 fill_sg_comp_from_iov(struct roc_se_sglist_comp *list, uint32_t i,
 133                       struct roc_se_iov_ptr *from, uint32_t from_offset,
 134                       uint32_t *psize, struct roc_se_buf_ptr *extra_buf,
 135                       uint32_t extra_offset)
 136 {
 137         int32_t j;
 138         uint32_t extra_len = extra_buf ? extra_buf->size : 0;
 139         uint32_t size = *psize;
 140         struct roc_se_buf_ptr *bufs;
 141
 142         bufs = from->bufs;
 143         for (j = 0; (j < from->buf_cnt) && size; j++) {
 144                 uint64_t e_vaddr;
 145                 uint32_t e_len;
 146                 struct roc_se_sglist_comp *to = &list[i >> 2];
 147
 148                 if (unlikely(from_offset)) {
 149                         if (from_offset >= bufs[j].size) {
 150                                 from_offset -= bufs[j].size;
 151                                 continue;
 152                         }
 153                         e_vaddr = (uint64_t)bufs[j].vaddr + from_offset;
 154                         e_len = (size > (bufs[j].size - from_offset)) ?
 155                                         (bufs[j].size - from_offset) :
 156                                         size;
 157                         from_offset = 0;
 158                 } else {
 159                         e_vaddr = (uint64_t)bufs[j].vaddr;
 160                         e_len = (size > bufs[j].size) ? bufs[j].size : size;
 161                 }
 162
 163                 to->u.s.len[i % 4] = rte_cpu_to_be_16(e_len);
 164                 to->ptr[i % 4] = rte_cpu_to_be_64(e_vaddr);
 165
 166                 if (extra_len && (e_len >= extra_offset)) {
 167                         /* Break the data at given offset */
 168                         uint32_t next_len = e_len - extra_offset;
 169                         uint64_t next_vaddr = e_vaddr + extra_offset;
 170
 171                         if (!extra_offset) {
 172                                 i--;
 173                         } else {
 174                                 e_len = extra_offset;
 175                                 size -= e_len;
 176                                 to->u.s.len[i % 4] = rte_cpu_to_be_16(e_len);
 177                         }
 178
 179                         extra_len = RTE_MIN(extra_len, size);
 180                         /* Insert extra data ptr */
 181                         if (extra_len) {
 182                                 i++;
 183                                 to = &list[i >> 2];
 184                                 to->u.s.len[i % 4] =
 185                                         rte_cpu_to_be_16(extra_len);
 186                                 to->ptr[i % 4] = rte_cpu_to_be_64(
 187                                         (uint64_t)extra_buf->vaddr);
 188                                 size -= extra_len;
 189                         }
 190
 191                         next_len = RTE_MIN(next_len, size);
 192                         /* insert the rest of the data */
 193                         if (next_len) {
 194                                 i++;
 195                                 to = &list[i >> 2];
 196                                 to->u.s.len[i % 4] = rte_cpu_to_be_16(next_len);
 197                                 to->ptr[i % 4] = rte_cpu_to_be_64(next_vaddr);
 198                                 size -= next_len;
 199                         }
 200                         extra_len = 0;
 201
 202                 } else {
 203                         size -= e_len;
 204                 }
 205                 if (extra_offset)
 206                         extra_offset -= size;
 207                 i++;
 208         }
 209
 210         *psize = size;
 211         return (uint32_t)i;
 212 }
 213
 214 static __rte_always_inline int
 215 cpt_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,
 216                   struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst)
 217 {
 218         uint32_t iv_offset = 0;
 219         int32_t inputlen, outputlen, enc_dlen, auth_dlen;
 220         struct roc_se_ctx *se_ctx;
 221         uint32_t cipher_type, hash_type;
 222         uint32_t mac_len, size;
 223         uint8_t iv_len = 16;
 224         struct roc_se_buf_ptr *aad_buf = NULL;
 225         uint32_t encr_offset, auth_offset;
 226         uint32_t encr_data_len, auth_data_len, aad_len = 0;
 227         uint32_t passthrough_len = 0;
 228         union cpt_inst_w4 cpt_inst_w4;
 229         void *offset_vaddr;
 230         uint8_t op_minor;
 231
 232         encr_offset = ROC_SE_ENCR_OFFSET(d_offs);
 233         auth_offset = ROC_SE_AUTH_OFFSET(d_offs);
 234         encr_data_len = ROC_SE_ENCR_DLEN(d_lens);
 235         auth_data_len = ROC_SE_AUTH_DLEN(d_lens);
 236         if (unlikely(flags & ROC_SE_VALID_AAD_BUF)) {
 237                 /* We don't support both AAD and auth data separately */
 238                 auth_data_len = 0;
 239                 auth_offset = 0;
 240                 aad_len = fc_params->aad_buf.size;
 241                 aad_buf = &fc_params->aad_buf;
 242         }
 243         se_ctx = fc_params->ctx_buf.vaddr;
 244         cipher_type = se_ctx->enc_cipher;
 245         hash_type = se_ctx->hash_type;
 246         mac_len = se_ctx->mac_len;
 247         op_minor = se_ctx->template_w4.s.opcode_minor;
 248
 249         if (unlikely(!(flags & ROC_SE_VALID_IV_BUF))) {
 250                 iv_len = 0;
 251                 iv_offset = ROC_SE_ENCR_IV_OFFSET(d_offs);
 252         }
 253
 254         if (unlikely(flags & ROC_SE_VALID_AAD_BUF)) {
 255                 /*
 256                  * When AAD is given, data above encr_offset is pass through
 257                  * Since AAD is given as separate pointer and not as offset,
 258                  * this is a special case as we need to fragment input data
 259                  * into passthrough + encr_data and then insert AAD in between.
 260                  */
 261                 if (hash_type != ROC_SE_GMAC_TYPE) {
 262                         passthrough_len = encr_offset;
 263                         auth_offset = passthrough_len + iv_len;
 264                         encr_offset = passthrough_len + aad_len + iv_len;
 265                         auth_data_len = aad_len + encr_data_len;
 266                 } else {
 267                         passthrough_len = 16 + aad_len;
 268                         auth_offset = passthrough_len + iv_len;
 269                         auth_data_len = aad_len;
 270                 }
 271         } else {
 272                 encr_offset += iv_len;
 273                 auth_offset += iv_len;
 274         }
 275
 276         /* Encryption */
 277         cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_FC;
 278         cpt_inst_w4.s.opcode_minor = ROC_SE_FC_MINOR_OP_ENCRYPT;
 279         cpt_inst_w4.s.opcode_minor |= (uint64_t)op_minor;
 280
 281         if (hash_type == ROC_SE_GMAC_TYPE) {
 282                 encr_offset = 0;
 283                 encr_data_len = 0;
 284         }
 285
 286         auth_dlen = auth_offset + auth_data_len;
 287         enc_dlen = encr_data_len + encr_offset;
 288         if (unlikely(encr_data_len & 0xf)) {
 289                 if ((cipher_type == ROC_SE_DES3_CBC) ||
 290                     (cipher_type == ROC_SE_DES3_ECB))
 291                         enc_dlen =
 292                                 RTE_ALIGN_CEIL(encr_data_len, 8) + encr_offset;
 293                 else if (likely((cipher_type == ROC_SE_AES_CBC) ||
 294                                 (cipher_type == ROC_SE_AES_ECB)))
 295                         enc_dlen =
 296                                 RTE_ALIGN_CEIL(encr_data_len, 8) + encr_offset;
 297         }
 298
 299         if (unlikely(auth_dlen > enc_dlen)) {
 300                 inputlen = auth_dlen;
 301                 outputlen = auth_dlen + mac_len;
 302         } else {
 303                 inputlen = enc_dlen;
 304                 outputlen = enc_dlen + mac_len;
 305         }
 306
 307         if (op_minor & ROC_SE_FC_MINOR_OP_HMAC_FIRST)
 308                 outputlen = enc_dlen;
 309
 310         /* GP op header */
 311         cpt_inst_w4.s.param1 = encr_data_len;
 312         cpt_inst_w4.s.param2 = auth_data_len;
 313
 314         /*
 315          * In cn9k, cn10k since we have a limitation of
 316          * IV & Offset control word not part of instruction
 317          * and need to be part of Data Buffer, we check if
 318          * head room is there and then only do the Direct mode processing
 319          */
 320         if (likely((flags & ROC_SE_SINGLE_BUF_INPLACE) &&
 321                    (flags & ROC_SE_SINGLE_BUF_HEADROOM))) {
 322                 void *dm_vaddr = fc_params->bufs[0].vaddr;
 323
 324                 /* Use Direct mode */
 325
 326                 offset_vaddr =
 327                         (uint8_t *)dm_vaddr - ROC_SE_OFF_CTRL_LEN - iv_len;
 328
 329                 /* DPTR */
 330                 inst->dptr = (uint64_t)offset_vaddr;
 331
 332                 /* RPTR should just exclude offset control word */
 333                 inst->rptr = (uint64_t)dm_vaddr - iv_len;
 334
 335                 cpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;
 336
 337                 if (likely(iv_len)) {
 338                         uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +
 339                                                       ROC_SE_OFF_CTRL_LEN);
 340                         uint64_t *src = fc_params->iv_buf;
 341                         dest[0] = src[0];
 342                         dest[1] = src[1];
 343                 }
 344
 345         } else {
 346                 void *m_vaddr = fc_params->meta_buf.vaddr;
 347                 uint32_t i, g_size_bytes, s_size_bytes;
 348                 struct roc_se_sglist_comp *gather_comp;
 349                 struct roc_se_sglist_comp *scatter_comp;
 350                 uint8_t *in_buffer;
 351
 352                 /* This falls under strict SG mode */
 353                 offset_vaddr = m_vaddr;
 354                 size = ROC_SE_OFF_CTRL_LEN + iv_len;
 355
 356                 m_vaddr = (uint8_t *)m_vaddr + size;
 357
 358                 cpt_inst_w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;
 359
 360                 if (likely(iv_len)) {
 361                         uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +
 362                                                       ROC_SE_OFF_CTRL_LEN);
 363                         uint64_t *src = fc_params->iv_buf;
 364                         dest[0] = src[0];
 365                         dest[1] = src[1];
 366                 }
 367
 368                 /* DPTR has SG list */
 369                 in_buffer = m_vaddr;
 370
 371                 ((uint16_t *)in_buffer)[0] = 0;
 372                 ((uint16_t *)in_buffer)[1] = 0;
 373
 374                 /* TODO Add error check if space will be sufficient */
 375                 gather_comp =
 376                         (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);
 377
 378                 /*
 379                  * Input Gather List
 380                  */
 381
 382                 i = 0;
 383
 384                 /* Offset control word that includes iv */
 385                 i = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,
 386                                  ROC_SE_OFF_CTRL_LEN + iv_len);
 387
 388                 /* Add input data */
 389                 size = inputlen - iv_len;
 390                 if (likely(size)) {
 391                         uint32_t aad_offset = aad_len ? passthrough_len : 0;
 392
 393                         if (unlikely(flags & ROC_SE_SINGLE_BUF_INPLACE)) {
 394                                 i = fill_sg_comp_from_buf_min(
 395                                         gather_comp, i, fc_params->bufs, &size);
 396                         } else {
 397                                 i = fill_sg_comp_from_iov(
 398                                         gather_comp, i, fc_params->src_iov, 0,
 399                                         &size, aad_buf, aad_offset);
 400                         }
 401
 402                         if (unlikely(size)) {
 403                                 plt_dp_err("Insufficient buffer space,"
 404                                            " size %d needed",
 405                                            size);
 406                                 return -1;
 407                         }
 408                 }
 409                 ((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);
 410                 g_size_bytes =
 411                         ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);
 412
 413                 /*
 414                  * Output Scatter list
 415                  */
 416                 i = 0;
 417                 scatter_comp =
 418                         (struct roc_se_sglist_comp *)((uint8_t *)gather_comp +
 419                                                       g_size_bytes);
 420
 421                 /* Add IV */
 422                 if (likely(iv_len)) {
 423                         i = fill_sg_comp(scatter_comp, i,
 424                                          (uint64_t)offset_vaddr +
 425                                                  ROC_SE_OFF_CTRL_LEN,
 426                                          iv_len);
 427                 }
 428
 429                 /* output data or output data + digest*/
 430                 if (unlikely(flags & ROC_SE_VALID_MAC_BUF)) {
 431                         size = outputlen - iv_len - mac_len;
 432                         if (size) {
 433                                 uint32_t aad_offset =
 434                                         aad_len ? passthrough_len : 0;
 435
 436                                 if (unlikely(flags &
 437                                              ROC_SE_SINGLE_BUF_INPLACE)) {
 438                                         i = fill_sg_comp_from_buf_min(
 439                                                 scatter_comp, i,
 440                                                 fc_params->bufs, &size);
 441                                 } else {
 442                                         i = fill_sg_comp_from_iov(
 443                                                 scatter_comp, i,
 444                                                 fc_params->dst_iov, 0, &size,
 445                                                 aad_buf, aad_offset);
 446                                 }
 447                                 if (unlikely(size)) {
 448                                         plt_dp_err("Insufficient buffer"
 449                                                    " space, size %d needed",
 450                                                    size);
 451                                         return -1;
 452                                 }
 453                         }
 454                         /* mac_data */
 455                         if (mac_len) {
 456                                 i = fill_sg_comp_from_buf(scatter_comp, i,
 457                                                           &fc_params->mac_buf);
 458                         }
 459                 } else {
 460                         /* Output including mac */
 461                         size = outputlen - iv_len;
 462                         if (likely(size)) {
 463                                 uint32_t aad_offset =
 464                                         aad_len ? passthrough_len : 0;
 465
 466                                 if (unlikely(flags &
 467                                              ROC_SE_SINGLE_BUF_INPLACE)) {
 468                                         i = fill_sg_comp_from_buf_min(
 469                                                 scatter_comp, i,
 470                                                 fc_params->bufs, &size);
 471                                 } else {
 472                                         i = fill_sg_comp_from_iov(
 473                                                 scatter_comp, i,
 474                                                 fc_params->dst_iov, 0, &size,
 475                                                 aad_buf, aad_offset);
 476                                 }
 477                                 if (unlikely(size)) {
 478                                         plt_dp_err("Insufficient buffer"
 479                                                    " space, size %d needed",
 480                                                    size);
 481                                         return -1;
 482                                 }
 483                         }
 484                 }
 485                 ((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);
 486                 s_size_bytes =
 487                         ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);
 488
 489                 size = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;
 490
 491                 /* This is DPTR len in case of SG mode */
 492                 cpt_inst_w4.s.dlen = size;
 493
 494                 inst->dptr = (uint64_t)in_buffer;
 495         }
 496
 497         if (unlikely((encr_offset >> 16) || (iv_offset >> 8) ||
 498                      (auth_offset >> 8))) {
 499                 plt_dp_err("Offset not supported");
 500                 plt_dp_err("enc_offset: %d", encr_offset);
 501                 plt_dp_err("iv_offset : %d", iv_offset);
 502                 plt_dp_err("auth_offset: %d", auth_offset);
 503                 return -1;
 504         }
 505
 506         *(uint64_t *)offset_vaddr = rte_cpu_to_be_64(
 507                 ((uint64_t)encr_offset << 16) | ((uint64_t)iv_offset << 8) |
 508                 ((uint64_t)auth_offset));
 509
 510         inst->w4.u64 = cpt_inst_w4.u64;
 511         return 0;
 512 }
 513
 514 static __rte_always_inline int
 515 cpt_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,
 516                   struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst)
 517 {
 518         uint32_t iv_offset = 0, size;
 519         int32_t inputlen, outputlen, enc_dlen, auth_dlen;
 520         struct roc_se_ctx *se_ctx;
 521         int32_t hash_type, mac_len;
 522         uint8_t iv_len = 16;
 523         struct roc_se_buf_ptr *aad_buf = NULL;
 524         uint32_t encr_offset, auth_offset;
 525         uint32_t encr_data_len, auth_data_len, aad_len = 0;
 526         uint32_t passthrough_len = 0;
 527         union cpt_inst_w4 cpt_inst_w4;
 528         void *offset_vaddr;
 529         uint8_t op_minor;
 530
 531         encr_offset = ROC_SE_ENCR_OFFSET(d_offs);
 532         auth_offset = ROC_SE_AUTH_OFFSET(d_offs);
 533         encr_data_len = ROC_SE_ENCR_DLEN(d_lens);
 534         auth_data_len = ROC_SE_AUTH_DLEN(d_lens);
 535
 536         if (unlikely(flags & ROC_SE_VALID_AAD_BUF)) {
 537                 /* We don't support both AAD and auth data separately */
 538                 auth_data_len = 0;
 539                 auth_offset = 0;
 540                 aad_len = fc_params->aad_buf.size;
 541                 aad_buf = &fc_params->aad_buf;
 542         }
 543
 544         se_ctx = fc_params->ctx_buf.vaddr;
 545         hash_type = se_ctx->hash_type;
 546         mac_len = se_ctx->mac_len;
 547         op_minor = se_ctx->template_w4.s.opcode_minor;
 548
 549         if (unlikely(!(flags & ROC_SE_VALID_IV_BUF))) {
 550                 iv_len = 0;
 551                 iv_offset = ROC_SE_ENCR_IV_OFFSET(d_offs);
 552         }
 553
 554         if (unlikely(flags & ROC_SE_VALID_AAD_BUF)) {
 555                 /*
 556                  * When AAD is given, data above encr_offset is pass through
 557                  * Since AAD is given as separate pointer and not as offset,
 558                  * this is a special case as we need to fragment input data
 559                  * into passthrough + encr_data and then insert AAD in between.
 560                  */
 561                 if (hash_type != ROC_SE_GMAC_TYPE) {
 562                         passthrough_len = encr_offset;
 563                         auth_offset = passthrough_len + iv_len;
 564                         encr_offset = passthrough_len + aad_len + iv_len;
 565                         auth_data_len = aad_len + encr_data_len;
 566                 } else {
 567                         passthrough_len = 16 + aad_len;
 568                         auth_offset = passthrough_len + iv_len;
 569                         auth_data_len = aad_len;
 570                 }
 571         } else {
 572                 encr_offset += iv_len;
 573                 auth_offset += iv_len;
 574         }
 575
 576         /* Decryption */
 577         cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_FC;
 578         cpt_inst_w4.s.opcode_minor = ROC_SE_FC_MINOR_OP_DECRYPT;
 579         cpt_inst_w4.s.opcode_minor |= (uint64_t)op_minor;
 580
 581         if (hash_type == ROC_SE_GMAC_TYPE) {
 582                 encr_offset = 0;
 583                 encr_data_len = 0;
 584         }
 585
 586         enc_dlen = encr_offset + encr_data_len;
 587         auth_dlen = auth_offset + auth_data_len;
 588
 589         if (auth_dlen > enc_dlen) {
 590                 inputlen = auth_dlen + mac_len;
 591                 outputlen = auth_dlen;
 592         } else {
 593                 inputlen = enc_dlen + mac_len;
 594                 outputlen = enc_dlen;
 595         }
 596
 597         if (op_minor & ROC_SE_FC_MINOR_OP_HMAC_FIRST)
 598                 outputlen = inputlen = enc_dlen;
 599
 600         cpt_inst_w4.s.param1 = encr_data_len;
 601         cpt_inst_w4.s.param2 = auth_data_len;
 602
 603         /*
 604          * In cn9k, cn10k since we have a limitation of
 605          * IV & Offset control word not part of instruction
 606          * and need to be part of Data Buffer, we check if
 607          * head room is there and then only do the Direct mode processing
 608          */
 609         if (likely((flags & ROC_SE_SINGLE_BUF_INPLACE) &&
 610                    (flags & ROC_SE_SINGLE_BUF_HEADROOM))) {
 611                 void *dm_vaddr = fc_params->bufs[0].vaddr;
 612
 613                 /* Use Direct mode */
 614
 615                 offset_vaddr =
 616                         (uint8_t *)dm_vaddr - ROC_SE_OFF_CTRL_LEN - iv_len;
 617                 inst->dptr = (uint64_t)offset_vaddr;
 618
 619                 /* RPTR should just exclude offset control word */
 620                 inst->rptr = (uint64_t)dm_vaddr - iv_len;
 621
 622                 cpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;
 623
 624                 if (likely(iv_len)) {
 625                         uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +
 626                                                       ROC_SE_OFF_CTRL_LEN);
 627                         uint64_t *src = fc_params->iv_buf;
 628                         dest[0] = src[0];
 629                         dest[1] = src[1];
 630                 }
 631
 632         } else {
 633                 void *m_vaddr = fc_params->meta_buf.vaddr;
 634                 uint32_t g_size_bytes, s_size_bytes;
 635                 struct roc_se_sglist_comp *gather_comp;
 636                 struct roc_se_sglist_comp *scatter_comp;
 637                 uint8_t *in_buffer;
 638                 uint8_t i = 0;
 639
 640                 /* This falls under strict SG mode */
 641                 offset_vaddr = m_vaddr;
 642                 size = ROC_SE_OFF_CTRL_LEN + iv_len;
 643
 644                 m_vaddr = (uint8_t *)m_vaddr + size;
 645
 646                 cpt_inst_w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;
 647
 648                 if (likely(iv_len)) {
 649                         uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +
 650                                                       ROC_SE_OFF_CTRL_LEN);
 651                         uint64_t *src = fc_params->iv_buf;
 652                         dest[0] = src[0];
 653                         dest[1] = src[1];
 654                 }
 655
 656                 /* DPTR has SG list */
 657                 in_buffer = m_vaddr;
 658
 659                 ((uint16_t *)in_buffer)[0] = 0;
 660                 ((uint16_t *)in_buffer)[1] = 0;
 661
 662                 /* TODO Add error check if space will be sufficient */
 663                 gather_comp =
 664                         (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);
 665
 666                 /*
 667                  * Input Gather List
 668                  */
 669                 i = 0;
 670
 671                 /* Offset control word that includes iv */
 672                 i = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,
 673                                  ROC_SE_OFF_CTRL_LEN + iv_len);
 674
 675                 /* Add input data */
 676                 if (flags & ROC_SE_VALID_MAC_BUF) {
 677                         size = inputlen - iv_len - mac_len;
 678                         if (size) {
 679                                 /* input data only */
 680                                 if (unlikely(flags &
 681                                              ROC_SE_SINGLE_BUF_INPLACE)) {
 682                                         i = fill_sg_comp_from_buf_min(
 683                                                 gather_comp, i, fc_params->bufs,
 684                                                 &size);
 685                                 } else {
 686                                         uint32_t aad_offset =
 687                                                 aad_len ? passthrough_len : 0;
 688
 689                                         i = fill_sg_comp_from_iov(
 690                                                 gather_comp, i,
 691                                                 fc_params->src_iov, 0, &size,
 692                                                 aad_buf, aad_offset);
 693                                 }
 694                                 if (unlikely(size)) {
 695                                         plt_dp_err("Insufficient buffer"
 696                                                    " space, size %d needed",
 697                                                    size);
 698                                         return -1;
 699                                 }
 700                         }
 701
 702                         /* mac data */
 703                         if (mac_len) {
 704                                 i = fill_sg_comp_from_buf(gather_comp, i,
 705                                                           &fc_params->mac_buf);
 706                         }
 707                 } else {
 708                         /* input data + mac */
 709                         size = inputlen - iv_len;
 710                         if (size) {
 711                                 if (unlikely(flags &
 712                                              ROC_SE_SINGLE_BUF_INPLACE)) {
 713                                         i = fill_sg_comp_from_buf_min(
 714                                                 gather_comp, i, fc_params->bufs,
 715                                                 &size);
 716                                 } else {
 717                                         uint32_t aad_offset =
 718                                                 aad_len ? passthrough_len : 0;
 719
 720                                         if (unlikely(!fc_params->src_iov)) {
 721                                                 plt_dp_err("Bad input args");
 722                                                 return -1;
 723                                         }
 724
 725                                         i = fill_sg_comp_from_iov(
 726                                                 gather_comp, i,
 727                                                 fc_params->src_iov, 0, &size,
 728                                                 aad_buf, aad_offset);
 729                                 }
 730
 731                                 if (unlikely(size)) {
 732                                         plt_dp_err("Insufficient buffer"
 733                                                    " space, size %d needed",
 734                                                    size);
 735                                         return -1;
 736                                 }
 737                         }
 738                 }
 739                 ((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);
 740                 g_size_bytes =
 741                         ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);
 742
 743                 /*
 744                  * Output Scatter List
 745                  */
 746
 747                 i = 0;
 748                 scatter_comp =
 749                         (struct roc_se_sglist_comp *)((uint8_t *)gather_comp +
 750                                                       g_size_bytes);
 751
 752                 /* Add iv */
 753                 if (iv_len) {
 754                         i = fill_sg_comp(scatter_comp, i,
 755                                          (uint64_t)offset_vaddr +
 756                                                  ROC_SE_OFF_CTRL_LEN,
 757                                          iv_len);
 758                 }
 759
 760                 /* Add output data */
 761                 size = outputlen - iv_len;
 762                 if (size) {
 763                         if (unlikely(flags & ROC_SE_SINGLE_BUF_INPLACE)) {
 764                                 /* handle single buffer here */
 765                                 i = fill_sg_comp_from_buf_min(scatter_comp, i,
 766                                                               fc_params->bufs,
 767                                                               &size);
 768                         } else {
 769                                 uint32_t aad_offset =
 770                                         aad_len ? passthrough_len : 0;
 771
 772                                 if (unlikely(!fc_params->dst_iov)) {
 773                                         plt_dp_err("Bad input args");
 774                                         return -1;
 775                                 }
 776
 777                                 i = fill_sg_comp_from_iov(
 778                                         scatter_comp, i, fc_params->dst_iov, 0,
 779                                         &size, aad_buf, aad_offset);
 780                         }
 781
 782                         if (unlikely(size)) {
 783                                 plt_dp_err("Insufficient buffer space,"
 784                                            " size %d needed",
 785                                            size);
 786                                 return -1;
 787                         }
 788                 }
 789
 790                 ((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);
 791                 s_size_bytes =
 792                         ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);
 793
 794                 size = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;
 795
 796                 /* This is DPTR len in case of SG mode */
 797                 cpt_inst_w4.s.dlen = size;
 798
 799                 inst->dptr = (uint64_t)in_buffer;
 800         }
 801
 802         if (unlikely((encr_offset >> 16) || (iv_offset >> 8) ||
 803                      (auth_offset >> 8))) {
 804                 plt_dp_err("Offset not supported");
 805                 plt_dp_err("enc_offset: %d", encr_offset);
 806                 plt_dp_err("iv_offset : %d", iv_offset);
 807                 plt_dp_err("auth_offset: %d", auth_offset);
 808                 return -1;
 809         }
 810
 811         *(uint64_t *)offset_vaddr = rte_cpu_to_be_64(
 812                 ((uint64_t)encr_offset << 16) | ((uint64_t)iv_offset << 8) |
 813                 ((uint64_t)auth_offset));
 814
 815         inst->w4.u64 = cpt_inst_w4.u64;
 816         return 0;
 817 }
 818
 819 static __rte_always_inline int
 820 cpt_zuc_snow3g_enc_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,
 821                         struct roc_se_fc_params *params,
 822                         struct cpt_inst_s *inst)
 823 {
 824         uint32_t size;
 825         int32_t inputlen, outputlen;
 826         struct roc_se_ctx *se_ctx;
 827         uint32_t mac_len = 0;
 828         uint8_t pdcp_alg_type, j;
 829         uint32_t encr_offset = 0, auth_offset = 0;
 830         uint32_t encr_data_len = 0, auth_data_len = 0;
 831         int flags, iv_len = 16;
 832         uint64_t offset_ctrl;
 833         uint64_t *offset_vaddr;
 834         uint32_t *iv_s, iv[4];
 835         union cpt_inst_w4 cpt_inst_w4;
 836
 837         se_ctx = params->ctx_buf.vaddr;
 838         flags = se_ctx->zsk_flags;
 839         mac_len = se_ctx->mac_len;
 840         pdcp_alg_type = se_ctx->pdcp_alg_type;
 841
 842         cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_ZUC_SNOW3G;
 843
 844         /* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */
 845
 846         cpt_inst_w4.s.opcode_minor = ((1 << 7) | (pdcp_alg_type << 5) |
 847                                       (0 << 4) | (0 << 3) | (flags & 0x7));
 848
 849         if (flags == 0x1) {
 850                 /*
 851                  * Microcode expects offsets in bytes
 852                  * TODO: Rounding off
 853                  */
 854                 auth_data_len = ROC_SE_AUTH_DLEN(d_lens);
 855
 856                 /* EIA3 or UIA2 */
 857                 auth_offset = ROC_SE_AUTH_OFFSET(d_offs);
 858                 auth_offset = auth_offset / 8;
 859
 860                 /* consider iv len */
 861                 auth_offset += iv_len;
 862
 863                 inputlen = auth_offset + (RTE_ALIGN(auth_data_len, 8) / 8);
 864                 outputlen = mac_len;
 865
 866                 offset_ctrl = rte_cpu_to_be_64((uint64_t)auth_offset);
 867
 868         } else {
 869                 /* EEA3 or UEA2 */
 870                 /*
 871                  * Microcode expects offsets in bytes
 872                  * TODO: Rounding off
 873                  */
 874                 encr_data_len = ROC_SE_ENCR_DLEN(d_lens);
 875
 876                 encr_offset = ROC_SE_ENCR_OFFSET(d_offs);
 877                 encr_offset = encr_offset / 8;
 878                 /* consider iv len */
 879                 encr_offset += iv_len;
 880
 881                 inputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8);
 882                 outputlen = inputlen;
 883
 884                 /* iv offset is 0 */
 885                 offset_ctrl = rte_cpu_to_be_64((uint64_t)encr_offset << 16);
 886         }
 887
 888         if (unlikely((encr_offset >> 16) || (auth_offset >> 8))) {
 889                 plt_dp_err("Offset not supported");
 890                 plt_dp_err("enc_offset: %d", encr_offset);
 891                 plt_dp_err("auth_offset: %d", auth_offset);
 892                 return -1;
 893         }
 894
 895         /* IV */
 896         iv_s = (flags == 0x1) ? params->auth_iv_buf : params->iv_buf;
 897
 898         if (pdcp_alg_type == ROC_SE_PDCP_ALG_TYPE_SNOW3G) {
 899                 /*
 900                  * DPDK seems to provide it in form of IV3 IV2 IV1 IV0
 901                  * and BigEndian, MC needs it as IV0 IV1 IV2 IV3
 902                  */
 903
 904                 for (j = 0; j < 4; j++)
 905                         iv[j] = iv_s[3 - j];
 906         } else {
 907                 /* ZUC doesn't need a swap */
 908                 for (j = 0; j < 4; j++)
 909                         iv[j] = iv_s[j];
 910         }
 911
 912         /*
 913          * GP op header, lengths are expected in bits.
 914          */
 915         cpt_inst_w4.s.param1 = encr_data_len;
 916         cpt_inst_w4.s.param2 = auth_data_len;
 917
 918         /*
 919          * In cn9k, cn10k since we have a limitation of
 920          * IV & Offset control word not part of instruction
 921          * and need to be part of Data Buffer, we check if
 922          * head room is there and then only do the Direct mode processing
 923          */
 924         if (likely((req_flags & ROC_SE_SINGLE_BUF_INPLACE) &&
 925                    (req_flags & ROC_SE_SINGLE_BUF_HEADROOM))) {
 926                 void *dm_vaddr = params->bufs[0].vaddr;
 927
 928                 /* Use Direct mode */
 929
 930                 offset_vaddr = (uint64_t *)((uint8_t *)dm_vaddr -
 931                                             ROC_SE_OFF_CTRL_LEN - iv_len);
 932
 933                 /* DPTR */
 934                 inst->dptr = (uint64_t)offset_vaddr;
 935                 /* RPTR should just exclude offset control word */
 936                 inst->rptr = (uint64_t)dm_vaddr - iv_len;
 937
 938                 cpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;
 939
 940                 if (likely(iv_len)) {
 941                         uint32_t *iv_d = (uint32_t *)((uint8_t *)offset_vaddr +
 942                                                       ROC_SE_OFF_CTRL_LEN);
 943                         memcpy(iv_d, iv, 16);
 944                 }
 945
 946                 *offset_vaddr = offset_ctrl;
 947         } else {
 948                 void *m_vaddr = params->meta_buf.vaddr;
 949                 uint32_t i, g_size_bytes, s_size_bytes;
 950                 struct roc_se_sglist_comp *gather_comp;
 951                 struct roc_se_sglist_comp *scatter_comp;
 952                 uint8_t *in_buffer;
 953                 uint32_t *iv_d;
 954
 955                 /* save space for iv */
 956                 offset_vaddr = m_vaddr;
 957
 958                 m_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + iv_len;
 959
 960                 cpt_inst_w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;
 961
 962                 /* DPTR has SG list */
 963                 in_buffer = m_vaddr;
 964
 965                 ((uint16_t *)in_buffer)[0] = 0;
 966                 ((uint16_t *)in_buffer)[1] = 0;
 967
 968                 /* TODO Add error check if space will be sufficient */
 969                 gather_comp =
 970                         (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);
 971
 972                 /*
 973                  * Input Gather List
 974                  */
 975                 i = 0;
 976
 977                 /* Offset control word followed by iv */
 978
 979                 i = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,
 980                                  ROC_SE_OFF_CTRL_LEN + iv_len);
 981
 982                 /* iv offset is 0 */
 983                 *offset_vaddr = offset_ctrl;
 984
 985                 iv_d = (uint32_t *)((uint8_t *)offset_vaddr +
 986                                     ROC_SE_OFF_CTRL_LEN);
 987                 memcpy(iv_d, iv, 16);
 988
 989                 /* input data */
 990                 size = inputlen - iv_len;
 991                 if (size) {
 992                         i = fill_sg_comp_from_iov(gather_comp, i,
 993                                                   params->src_iov, 0, &size,
 994                                                   NULL, 0);
 995                         if (unlikely(size)) {
 996                                 plt_dp_err("Insufficient buffer space,"
 997                                            " size %d needed",
 998                                            size);
 999                                 return -1;
1000                         }
1001                 }
1002                 ((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);
1003                 g_size_bytes =
1004                         ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);
1005
1006                 /*
1007                  * Output Scatter List
1008                  */
1009
1010                 i = 0;
1011                 scatter_comp =
1012                         (struct roc_se_sglist_comp *)((uint8_t *)gather_comp +
1013                                                       g_size_bytes);
1014
1015                 if (flags == 0x1) {
1016                         /* IV in SLIST only for EEA3 & UEA2 */
1017                         iv_len = 0;
1018                 }
1019
1020                 if (iv_len) {
1021                         i = fill_sg_comp(scatter_comp, i,
1022                                          (uint64_t)offset_vaddr +
1023                                                  ROC_SE_OFF_CTRL_LEN,
1024                                          iv_len);
1025                 }
1026
1027                 /* Add output data */
1028                 if (req_flags & ROC_SE_VALID_MAC_BUF) {
1029                         size = outputlen - iv_len - mac_len;
1030                         if (size) {
1031                                 i = fill_sg_comp_from_iov(scatter_comp, i,
1032                                                           params->dst_iov, 0,
1033                                                           &size, NULL, 0);
1034
1035                                 if (unlikely(size)) {
1036                                         plt_dp_err("Insufficient buffer space,"
1037                                                    " size %d needed",
1038                                                    size);
1039                                         return -1;
1040                                 }
1041                         }
1042
1043                         /* mac data */
1044                         if (mac_len) {
1045                                 i = fill_sg_comp_from_buf(scatter_comp, i,
1046                                                           &params->mac_buf);
1047                         }
1048                 } else {
1049                         /* Output including mac */
1050                         size = outputlen - iv_len;
1051                         if (size) {
1052                                 i = fill_sg_comp_from_iov(scatter_comp, i,
1053                                                           params->dst_iov, 0,
1054                                                           &size, NULL, 0);
1055
1056                                 if (unlikely(size)) {
1057                                         plt_dp_err("Insufficient buffer space,"
1058                                                    " size %d needed",
1059                                                    size);
1060                                         return -1;
1061                                 }
1062                         }
1063                 }
1064                 ((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);
1065                 s_size_bytes =
1066                         ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);
1067
1068                 size = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;
1069
1070                 /* This is DPTR len in case of SG mode */
1071                 cpt_inst_w4.s.dlen = size;
1072
1073                 inst->dptr = (uint64_t)in_buffer;
1074         }
1075
1076         inst->w4.u64 = cpt_inst_w4.u64;
1077
1078         return 0;
1079 }
1080
1081 static __rte_always_inline int
1082 cpt_fc_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,
1083                      struct roc_se_fc_params *fc_params,
1084                      struct cpt_inst_s *inst)
1085 {
1086         struct roc_se_ctx *ctx = fc_params->ctx_buf.vaddr;
1087         uint8_t fc_type;
1088         int ret = -1;
1089
1090         fc_type = ctx->fc_type;
1091
1092         if (likely(fc_type == ROC_SE_FC_GEN))
1093                 ret = cpt_dec_hmac_prep(flags, d_offs, d_lens, fc_params, inst);
1094         return ret;
1095 }
1096
1097 static __rte_always_inline int
1098 cpt_fc_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,
1099                      struct roc_se_fc_params *fc_params,
1100                      struct cpt_inst_s *inst)
1101 {
1102         struct roc_se_ctx *ctx = fc_params->ctx_buf.vaddr;
1103         uint8_t fc_type;
1104         int ret = -1;
1105
1106         fc_type = ctx->fc_type;
1107
1108         if (likely(fc_type == ROC_SE_FC_GEN)) {
1109                 ret = cpt_enc_hmac_prep(flags, d_offs, d_lens, fc_params, inst);
1110         } else if (fc_type == ROC_SE_PDCP) {
1111                 ret = cpt_zuc_snow3g_enc_prep(flags, d_offs, d_lens, fc_params,
1112                                               inst);
1113         }
1114
1115         return ret;
1116 }
1117
1118 static __rte_always_inline int
1119 fill_sess_aead(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess)
1120 {
1121         struct rte_crypto_aead_xform *aead_form;
1122         roc_se_cipher_type enc_type = 0; /* NULL Cipher type */
1123         roc_se_auth_type auth_type = 0;  /* NULL Auth type */
1124         uint32_t cipher_key_len = 0;
1125         uint8_t aes_gcm = 0;
1126         aead_form = &xform->aead;
1127
1128         if (aead_form->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) {
1129                 sess->cpt_op |= ROC_SE_OP_CIPHER_ENCRYPT;
1130                 sess->cpt_op |= ROC_SE_OP_AUTH_GENERATE;
1131         } else if (aead_form->op == RTE_CRYPTO_AEAD_OP_DECRYPT) {
1132                 sess->cpt_op |= ROC_SE_OP_CIPHER_DECRYPT;
1133                 sess->cpt_op |= ROC_SE_OP_AUTH_VERIFY;
1134         } else {
1135                 plt_dp_err("Unknown aead operation\n");
1136                 return -1;
1137         }
1138         switch (aead_form->algo) {
1139         case RTE_CRYPTO_AEAD_AES_GCM:
1140                 enc_type = ROC_SE_AES_GCM;
1141                 cipher_key_len = 16;
1142                 aes_gcm = 1;
1143                 break;
1144         case RTE_CRYPTO_AEAD_AES_CCM:
1145                 plt_dp_err("Crypto: Unsupported cipher algo %u",
1146                            aead_form->algo);
1147                 return -1;
1148         case RTE_CRYPTO_AEAD_CHACHA20_POLY1305:
1149                 enc_type = ROC_SE_CHACHA20;
1150                 auth_type = ROC_SE_POLY1305;
1151                 cipher_key_len = 32;
1152                 sess->chacha_poly = 1;
1153                 break;
1154         default:
1155                 plt_dp_err("Crypto: Undefined cipher algo %u specified",
1156                            aead_form->algo);
1157                 return -1;
1158         }
1159         if (aead_form->key.length < cipher_key_len) {
1160                 plt_dp_err("Invalid cipher params keylen %u",
1161                            aead_form->key.length);
1162                 return -1;
1163         }
1164         sess->zsk_flag = 0;
1165         sess->aes_gcm = aes_gcm;
1166         sess->mac_len = aead_form->digest_length;
1167         sess->iv_offset = aead_form->iv.offset;
1168         sess->iv_length = aead_form->iv.length;
1169         sess->aad_length = aead_form->aad_length;
1170
1171         if (unlikely(roc_se_ciph_key_set(&sess->roc_se_ctx, enc_type,
1172                                          aead_form->key.data,
1173                                          aead_form->key.length, NULL)))
1174                 return -1;
1175
1176         if (unlikely(roc_se_auth_key_set(&sess->roc_se_ctx, auth_type, NULL, 0,
1177                                          aead_form->digest_length)))
1178                 return -1;
1179
1180         return 0;
1181 }
1182
1183 static __rte_always_inline int
1184 fill_sess_cipher(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess)
1185 {
1186         struct rte_crypto_cipher_xform *c_form;
1187         roc_se_cipher_type enc_type = 0; /* NULL Cipher type */
1188         uint32_t cipher_key_len = 0;
1189         uint8_t zsk_flag = 0, aes_ctr = 0, is_null = 0;
1190
1191         c_form = &xform->cipher;
1192
1193         if (c_form->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
1194                 sess->cpt_op |= ROC_SE_OP_CIPHER_ENCRYPT;
1195         else if (c_form->op == RTE_CRYPTO_CIPHER_OP_DECRYPT) {
1196                 sess->cpt_op |= ROC_SE_OP_CIPHER_DECRYPT;
1197                 if (xform->next != NULL &&
1198                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
1199                         /* Perform decryption followed by auth verify */
1200                         sess->roc_se_ctx.template_w4.s.opcode_minor =
1201                                 ROC_SE_FC_MINOR_OP_HMAC_FIRST;
1202                 }
1203         } else {
1204                 plt_dp_err("Unknown cipher operation\n");
1205                 return -1;
1206         }
1207
1208         switch (c_form->algo) {
1209         case RTE_CRYPTO_CIPHER_AES_CBC:
1210                 enc_type = ROC_SE_AES_CBC;
1211                 cipher_key_len = 16;
1212                 break;
1213         case RTE_CRYPTO_CIPHER_3DES_CBC:
1214                 enc_type = ROC_SE_DES3_CBC;
1215                 cipher_key_len = 24;
1216                 break;
1217         case RTE_CRYPTO_CIPHER_DES_CBC:
1218                 /* DES is implemented using 3DES in hardware */
1219                 enc_type = ROC_SE_DES3_CBC;
1220                 cipher_key_len = 8;
1221                 break;
1222         case RTE_CRYPTO_CIPHER_AES_CTR:
1223                 enc_type = ROC_SE_AES_CTR;
1224                 cipher_key_len = 16;
1225                 aes_ctr = 1;
1226                 break;
1227         case RTE_CRYPTO_CIPHER_NULL:
1228                 enc_type = 0;
1229                 is_null = 1;
1230                 break;
1231         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1232                 enc_type = ROC_SE_KASUMI_F8_ECB;
1233                 cipher_key_len = 16;
1234                 zsk_flag = ROC_SE_K_F8;
1235                 break;
1236         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1237                 enc_type = ROC_SE_SNOW3G_UEA2;
1238                 cipher_key_len = 16;
1239                 zsk_flag = ROC_SE_ZS_EA;
1240                 break;
1241         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
1242                 enc_type = ROC_SE_ZUC_EEA3;
1243                 cipher_key_len = 16;
1244                 zsk_flag = ROC_SE_ZS_EA;
1245                 break;
1246         case RTE_CRYPTO_CIPHER_AES_XTS:
1247                 enc_type = ROC_SE_AES_XTS;
1248                 cipher_key_len = 16;
1249                 break;
1250         case RTE_CRYPTO_CIPHER_3DES_ECB:
1251                 enc_type = ROC_SE_DES3_ECB;
1252                 cipher_key_len = 24;
1253                 break;
1254         case RTE_CRYPTO_CIPHER_AES_ECB:
1255                 enc_type = ROC_SE_AES_ECB;
1256                 cipher_key_len = 16;
1257                 break;
1258         case RTE_CRYPTO_CIPHER_3DES_CTR:
1259         case RTE_CRYPTO_CIPHER_AES_F8:
1260         case RTE_CRYPTO_CIPHER_ARC4:
1261                 plt_dp_err("Crypto: Unsupported cipher algo %u", c_form->algo);
1262                 return -1;
1263         default:
1264                 plt_dp_err("Crypto: Undefined cipher algo %u specified",
1265                            c_form->algo);
1266                 return -1;
1267         }
1268
1269         if (c_form->key.length < cipher_key_len) {
1270                 plt_dp_err("Invalid cipher params keylen %u",
1271                            c_form->key.length);
1272                 return -1;
1273         }
1274
1275         sess->zsk_flag = zsk_flag;
1276         sess->aes_gcm = 0;
1277         sess->aes_ctr = aes_ctr;
1278         sess->iv_offset = c_form->iv.offset;
1279         sess->iv_length = c_form->iv.length;
1280         sess->is_null = is_null;
1281
1282         if (unlikely(roc_se_ciph_key_set(&sess->roc_se_ctx, enc_type,
1283                                          c_form->key.data, c_form->key.length,
1284                                          NULL)))
1285                 return -1;
1286
1287         return 0;
1288 }
1289
1290 static __rte_always_inline int
1291 fill_sess_auth(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess)
1292 {
1293         struct rte_crypto_auth_xform *a_form;
1294         roc_se_auth_type auth_type = 0; /* NULL Auth type */
1295         uint8_t zsk_flag = 0, aes_gcm = 0, is_null = 0;
1296
1297         if (xform->next != NULL &&
1298             xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
1299             xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
1300                 /* Perform auth followed by encryption */
1301                 sess->roc_se_ctx.template_w4.s.opcode_minor =
1302                         ROC_SE_FC_MINOR_OP_HMAC_FIRST;
1303         }
1304
1305         a_form = &xform->auth;
1306
1307         if (a_form->op == RTE_CRYPTO_AUTH_OP_VERIFY)
1308                 sess->cpt_op |= ROC_SE_OP_AUTH_VERIFY;
1309         else if (a_form->op == RTE_CRYPTO_AUTH_OP_GENERATE)
1310                 sess->cpt_op |= ROC_SE_OP_AUTH_GENERATE;
1311         else {
1312                 plt_dp_err("Unknown auth operation");
1313                 return -1;
1314         }
1315
1316         switch (a_form->algo) {
1317         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1318                 /* Fall through */
1319         case RTE_CRYPTO_AUTH_SHA1:
1320                 auth_type = ROC_SE_SHA1_TYPE;
1321                 break;
1322         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1323         case RTE_CRYPTO_AUTH_SHA256:
1324                 auth_type = ROC_SE_SHA2_SHA256;
1325                 break;
1326         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1327         case RTE_CRYPTO_AUTH_SHA512:
1328                 auth_type = ROC_SE_SHA2_SHA512;
1329                 break;
1330         case RTE_CRYPTO_AUTH_AES_GMAC:
1331                 auth_type = ROC_SE_GMAC_TYPE;
1332                 aes_gcm = 1;
1333                 break;
1334         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1335         case RTE_CRYPTO_AUTH_SHA224:
1336                 auth_type = ROC_SE_SHA2_SHA224;
1337                 break;
1338         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1339         case RTE_CRYPTO_AUTH_SHA384:
1340                 auth_type = ROC_SE_SHA2_SHA384;
1341                 break;
1342         case RTE_CRYPTO_AUTH_MD5_HMAC:
1343         case RTE_CRYPTO_AUTH_MD5:
1344                 auth_type = ROC_SE_MD5_TYPE;
1345                 break;
1346         case RTE_CRYPTO_AUTH_KASUMI_F9:
1347                 auth_type = ROC_SE_KASUMI_F9_ECB;
1348                 /*
1349                  * Indicate that direction needs to be taken out
1350                  * from end of src
1351                  */
1352                 zsk_flag = ROC_SE_K_F9;
1353                 break;
1354         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1355                 auth_type = ROC_SE_SNOW3G_UIA2;
1356                 zsk_flag = ROC_SE_ZS_IA;
1357                 break;
1358         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1359                 auth_type = ROC_SE_ZUC_EIA3;
1360                 zsk_flag = ROC_SE_ZS_IA;
1361                 break;
1362         case RTE_CRYPTO_AUTH_NULL:
1363                 auth_type = 0;
1364                 is_null = 1;
1365                 break;
1366         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1367         case RTE_CRYPTO_AUTH_AES_CMAC:
1368         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1369                 plt_dp_err("Crypto: Unsupported hash algo %u", a_form->algo);
1370                 return -1;
1371         default:
1372                 plt_dp_err("Crypto: Undefined Hash algo %u specified",
1373                            a_form->algo);
1374                 return -1;
1375         }
1376
1377         sess->zsk_flag = zsk_flag;
1378         sess->aes_gcm = aes_gcm;
1379         sess->mac_len = a_form->digest_length;
1380         sess->is_null = is_null;
1381         if (zsk_flag) {
1382                 sess->auth_iv_offset = a_form->iv.offset;
1383                 sess->auth_iv_length = a_form->iv.length;
1384         }
1385         if (unlikely(roc_se_auth_key_set(&sess->roc_se_ctx, auth_type,
1386                                          a_form->key.data, a_form->key.length,
1387                                          a_form->digest_length)))
1388                 return -1;
1389
1390         return 0;
1391 }
1392
1393 static __rte_always_inline int
1394 fill_sess_gmac(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess)
1395 {
1396         struct rte_crypto_auth_xform *a_form;
1397         roc_se_cipher_type enc_type = 0; /* NULL Cipher type */
1398         roc_se_auth_type auth_type = 0;  /* NULL Auth type */
1399
1400         a_form = &xform->auth;
1401
1402         if (a_form->op == RTE_CRYPTO_AUTH_OP_GENERATE)
1403                 sess->cpt_op |= ROC_SE_OP_ENCODE;
1404         else if (a_form->op == RTE_CRYPTO_AUTH_OP_VERIFY)
1405                 sess->cpt_op |= ROC_SE_OP_DECODE;
1406         else {
1407                 plt_dp_err("Unknown auth operation");
1408                 return -1;
1409         }
1410
1411         switch (a_form->algo) {
1412         case RTE_CRYPTO_AUTH_AES_GMAC:
1413                 enc_type = ROC_SE_AES_GCM;
1414                 auth_type = ROC_SE_GMAC_TYPE;
1415                 break;
1416         default:
1417                 plt_dp_err("Crypto: Undefined cipher algo %u specified",
1418                            a_form->algo);
1419                 return -1;
1420         }
1421
1422         sess->zsk_flag = 0;
1423         sess->aes_gcm = 0;
1424         sess->is_gmac = 1;
1425         sess->iv_offset = a_form->iv.offset;
1426         sess->iv_length = a_form->iv.length;
1427         sess->mac_len = a_form->digest_length;
1428
1429         if (unlikely(roc_se_ciph_key_set(&sess->roc_se_ctx, enc_type,
1430                                          a_form->key.data, a_form->key.length,
1431                                          NULL)))
1432                 return -1;
1433
1434         if (unlikely(roc_se_auth_key_set(&sess->roc_se_ctx, auth_type, NULL, 0,
1435                                          a_form->digest_length)))
1436                 return -1;
1437
1438         return 0;
1439 }
1440
1441 static __rte_always_inline void *
1442 alloc_op_meta(struct roc_se_buf_ptr *buf, int32_t len,
1443               struct rte_mempool *cpt_meta_pool,
1444               struct cpt_inflight_req *infl_req)
1445 {
1446         uint8_t *mdata;
1447
1448         if (unlikely(rte_mempool_get(cpt_meta_pool, (void **)&mdata) < 0))
1449                 return NULL;
1450
1451         buf->vaddr = mdata;
1452         buf->size = len;
1453
1454         infl_req->mdata = mdata;
1455         infl_req->op_flags |= CPT_OP_FLAGS_METABUF;
1456
1457         return mdata;
1458 }
1459
1460 static __rte_always_inline uint32_t
1461 prepare_iov_from_pkt(struct rte_mbuf *pkt, struct roc_se_iov_ptr *iovec,
1462                      uint32_t start_offset)
1463 {
1464         uint16_t index = 0;
1465         void *seg_data = NULL;
1466         int32_t seg_size = 0;
1467
1468         if (!pkt) {
1469                 iovec->buf_cnt = 0;
1470                 return 0;
1471         }
1472
1473         if (!start_offset) {
1474                 seg_data = rte_pktmbuf_mtod(pkt, void *);
1475                 seg_size = pkt->data_len;
1476         } else {
1477                 while (start_offset >= pkt->data_len) {
1478                         start_offset -= pkt->data_len;
1479                         pkt = pkt->next;
1480                 }
1481
1482                 seg_data = rte_pktmbuf_mtod_offset(pkt, void *, start_offset);
1483                 seg_size = pkt->data_len - start_offset;
1484                 if (!seg_size)
1485                         return 1;
1486         }
1487
1488         /* first seg */
1489         iovec->bufs[index].vaddr = seg_data;
1490         iovec->bufs[index].size = seg_size;
1491         index++;
1492         pkt = pkt->next;
1493
1494         while (unlikely(pkt != NULL)) {
1495                 seg_data = rte_pktmbuf_mtod(pkt, void *);
1496                 seg_size = pkt->data_len;
1497                 if (!seg_size)
1498                         break;
1499
1500                 iovec->bufs[index].vaddr = seg_data;
1501                 iovec->bufs[index].size = seg_size;
1502
1503                 index++;
1504
1505                 pkt = pkt->next;
1506         }
1507
1508         iovec->buf_cnt = index;
1509         return 0;
1510 }
1511
1512 static __rte_always_inline uint32_t
1513 prepare_iov_from_pkt_inplace(struct rte_mbuf *pkt,
1514                              struct roc_se_fc_params *param, uint32_t *flags)
1515 {
1516         uint16_t index = 0;
1517         void *seg_data = NULL;
1518         uint32_t seg_size = 0;
1519         struct roc_se_iov_ptr *iovec;
1520
1521         seg_data = rte_pktmbuf_mtod(pkt, void *);
1522         seg_size = pkt->data_len;
1523
1524         /* first seg */
1525         if (likely(!pkt->next)) {
1526                 uint32_t headroom;
1527
1528                 *flags |= ROC_SE_SINGLE_BUF_INPLACE;
1529                 headroom = rte_pktmbuf_headroom(pkt);
1530                 if (likely(headroom >= 24))
1531                         *flags |= ROC_SE_SINGLE_BUF_HEADROOM;
1532
1533                 param->bufs[0].vaddr = seg_data;
1534                 param->bufs[0].size = seg_size;
1535                 return 0;
1536         }
1537         iovec = param->src_iov;
1538         iovec->bufs[index].vaddr = seg_data;
1539         iovec->bufs[index].size = seg_size;
1540         index++;
1541         pkt = pkt->next;
1542
1543         while (unlikely(pkt != NULL)) {
1544                 seg_data = rte_pktmbuf_mtod(pkt, void *);
1545                 seg_size = pkt->data_len;
1546
1547                 if (!seg_size)
1548                         break;
1549
1550                 iovec->bufs[index].vaddr = seg_data;
1551                 iovec->bufs[index].size = seg_size;
1552
1553                 index++;
1554
1555                 pkt = pkt->next;
1556         }
1557
1558         iovec->buf_cnt = index;
1559         return 0;
1560 }
1561
1562 static __rte_always_inline int
1563 fill_fc_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,
1564                struct cpt_qp_meta_info *m_info,
1565                struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst)
1566 {
1567         struct roc_se_ctx *ctx = &sess->roc_se_ctx;
1568         uint8_t op_minor = ctx->template_w4.s.opcode_minor;
1569         struct rte_crypto_sym_op *sym_op = cop->sym;
1570         void *mdata = NULL;
1571         uint32_t mc_hash_off;
1572         uint32_t flags = 0;
1573         uint64_t d_offs, d_lens;
1574         struct rte_mbuf *m_src, *m_dst;
1575         uint8_t cpt_op = sess->cpt_op;
1576 #ifdef CPT_ALWAYS_USE_SG_MODE
1577         uint8_t inplace = 0;
1578 #else
1579         uint8_t inplace = 1;
1580 #endif
1581         struct roc_se_fc_params fc_params;
1582         char src[SRC_IOV_SIZE];
1583         char dst[SRC_IOV_SIZE];
1584         uint32_t iv_buf[4];
1585         int ret;
1586
1587         if (likely(sess->iv_length)) {
1588                 flags |= ROC_SE_VALID_IV_BUF;
1589                 fc_params.iv_buf = rte_crypto_op_ctod_offset(cop, uint8_t *,
1590                                                              sess->iv_offset);
1591                 if (sess->aes_ctr && unlikely(sess->iv_length != 16)) {
1592                         memcpy((uint8_t *)iv_buf,
1593                                rte_crypto_op_ctod_offset(cop, uint8_t *,
1594                                                          sess->iv_offset),
1595                                12);
1596                         iv_buf[3] = rte_cpu_to_be_32(0x1);
1597                         fc_params.iv_buf = iv_buf;
1598                 }
1599         }
1600
1601         if (sess->zsk_flag) {
1602                 fc_params.auth_iv_buf = rte_crypto_op_ctod_offset(
1603                         cop, uint8_t *, sess->auth_iv_offset);
1604                 if (sess->zsk_flag != ROC_SE_ZS_EA)
1605                         inplace = 0;
1606         }
1607         m_src = sym_op->m_src;
1608         m_dst = sym_op->m_dst;
1609
1610         if (sess->aes_gcm || sess->chacha_poly) {
1611                 uint8_t *salt;
1612                 uint8_t *aad_data;
1613                 uint16_t aad_len;
1614
1615                 d_offs = sym_op->aead.data.offset;
1616                 d_lens = sym_op->aead.data.length;
1617                 mc_hash_off =
1618                         sym_op->aead.data.offset + sym_op->aead.data.length;
1619
1620                 aad_data = sym_op->aead.aad.data;
1621                 aad_len = sess->aad_length;
1622                 if (likely((aad_data + aad_len) ==
1623                            rte_pktmbuf_mtod_offset(m_src, uint8_t *,
1624                                                    sym_op->aead.data.offset))) {
1625                         d_offs = (d_offs - aad_len) | (d_offs << 16);
1626                         d_lens = (d_lens + aad_len) | (d_lens << 32);
1627                 } else {
1628                         fc_params.aad_buf.vaddr = sym_op->aead.aad.data;
1629                         fc_params.aad_buf.size = aad_len;
1630                         flags |= ROC_SE_VALID_AAD_BUF;
1631                         inplace = 0;
1632                         d_offs = d_offs << 16;
1633                         d_lens = d_lens << 32;
1634                 }
1635
1636                 salt = fc_params.iv_buf;
1637                 if (unlikely(*(uint32_t *)salt != sess->salt)) {
1638                         cpt_fc_salt_update(&sess->roc_se_ctx, salt);
1639                         sess->salt = *(uint32_t *)salt;
1640                 }
1641                 fc_params.iv_buf = salt + 4;
1642                 if (likely(sess->mac_len)) {
1643                         struct rte_mbuf *m =
1644                                 (cpt_op & ROC_SE_OP_ENCODE) ? m_dst : m_src;
1645
1646                         if (!m)
1647                                 m = m_src;
1648
1649                         /* hmac immediately following data is best case */
1650                         if (unlikely(rte_pktmbuf_mtod(m, uint8_t *) +
1651                                              mc_hash_off !=
1652                                      (uint8_t *)sym_op->aead.digest.data)) {
1653                                 flags |= ROC_SE_VALID_MAC_BUF;
1654                                 fc_params.mac_buf.size = sess->mac_len;
1655                                 fc_params.mac_buf.vaddr =
1656                                         sym_op->aead.digest.data;
1657                                 inplace = 0;
1658                         }
1659                 }
1660         } else {
1661                 d_offs = sym_op->cipher.data.offset;
1662                 d_lens = sym_op->cipher.data.length;
1663                 mc_hash_off =
1664                         sym_op->cipher.data.offset + sym_op->cipher.data.length;
1665                 d_offs = (d_offs << 16) | sym_op->auth.data.offset;
1666                 d_lens = (d_lens << 32) | sym_op->auth.data.length;
1667
1668                 if (mc_hash_off <
1669                     (sym_op->auth.data.offset + sym_op->auth.data.length)) {
1670                         mc_hash_off = (sym_op->auth.data.offset +
1671                                        sym_op->auth.data.length);
1672                 }
1673                 /* for gmac, salt should be updated like in gcm */
1674                 if (unlikely(sess->is_gmac)) {
1675                         uint8_t *salt;
1676                         salt = fc_params.iv_buf;
1677                         if (unlikely(*(uint32_t *)salt != sess->salt)) {
1678                                 cpt_fc_salt_update(&sess->roc_se_ctx, salt);
1679                                 sess->salt = *(uint32_t *)salt;
1680                         }
1681                         fc_params.iv_buf = salt + 4;
1682                 }
1683                 if (likely(sess->mac_len)) {
1684                         struct rte_mbuf *m;
1685
1686                         m = (cpt_op & ROC_SE_OP_ENCODE) ? m_dst : m_src;
1687                         if (!m)
1688                                 m = m_src;
1689
1690                         /* hmac immediately following data is best case */
1691                         if (!(op_minor & ROC_SE_FC_MINOR_OP_HMAC_FIRST) &&
1692                             (unlikely(rte_pktmbuf_mtod(m, uint8_t *) +
1693                                               mc_hash_off !=
1694                                       (uint8_t *)sym_op->auth.digest.data))) {
1695                                 flags |= ROC_SE_VALID_MAC_BUF;
1696                                 fc_params.mac_buf.size = sess->mac_len;
1697                                 fc_params.mac_buf.vaddr =
1698                                         sym_op->auth.digest.data;
1699                                 inplace = 0;
1700                         }
1701                 }
1702         }
1703         fc_params.ctx_buf.vaddr = &sess->roc_se_ctx;
1704
1705         if (!(op_minor & ROC_SE_FC_MINOR_OP_HMAC_FIRST) &&
1706             unlikely(sess->is_null || sess->cpt_op == ROC_SE_OP_DECODE))
1707                 inplace = 0;
1708
1709         if (likely(!m_dst && inplace)) {
1710                 /* Case of single buffer without AAD buf or
1711                  * separate mac buf in place and
1712                  * not air crypto
1713                  */
1714                 fc_params.dst_iov = fc_params.src_iov = (void *)src;
1715
1716                 if (unlikely(prepare_iov_from_pkt_inplace(m_src, &fc_params,
1717                                                           &flags))) {
1718                         plt_dp_err("Prepare inplace src iov failed");
1719                         ret = -EINVAL;
1720                         goto err_exit;
1721                 }
1722
1723         } else {
1724                 /* Out of place processing */
1725                 fc_params.src_iov = (void *)src;
1726                 fc_params.dst_iov = (void *)dst;
1727
1728                 /* Store SG I/O in the api for reuse */
1729                 if (prepare_iov_from_pkt(m_src, fc_params.src_iov, 0)) {
1730                         plt_dp_err("Prepare src iov failed");
1731                         ret = -EINVAL;
1732                         goto err_exit;
1733                 }
1734
1735                 if (unlikely(m_dst != NULL)) {
1736                         uint32_t pkt_len;
1737
1738                         /* Try to make room as much as src has */
1739                         pkt_len = rte_pktmbuf_pkt_len(m_dst);
1740
1741                         if (unlikely(pkt_len < rte_pktmbuf_pkt_len(m_src))) {
1742                                 pkt_len = rte_pktmbuf_pkt_len(m_src) - pkt_len;
1743                                 if (!rte_pktmbuf_append(m_dst, pkt_len)) {
1744                                         plt_dp_err("Not enough space in "
1745                                                    "m_dst %p, need %u"
1746                                                    " more",
1747                                                    m_dst, pkt_len);
1748                                         ret = -EINVAL;
1749                                         goto err_exit;
1750                                 }
1751                         }
1752
1753                         if (prepare_iov_from_pkt(m_dst, fc_params.dst_iov, 0)) {
1754                                 plt_dp_err("Prepare dst iov failed for "
1755                                            "m_dst %p",
1756                                            m_dst);
1757                                 ret = -EINVAL;
1758                                 goto err_exit;
1759                         }
1760                 } else {
1761                         fc_params.dst_iov = (void *)src;
1762                 }
1763         }
1764
1765         if (unlikely(!((flags & ROC_SE_SINGLE_BUF_INPLACE) &&
1766                        (flags & ROC_SE_SINGLE_BUF_HEADROOM) &&
1767                        ((ctx->fc_type == ROC_SE_FC_GEN) ||
1768                         (ctx->fc_type == ROC_SE_PDCP))))) {
1769                 mdata = alloc_op_meta(&fc_params.meta_buf, m_info->mlen,
1770                                       m_info->pool, infl_req);
1771                 if (mdata == NULL) {
1772                         plt_dp_err("Error allocating meta buffer for request");
1773                         return -ENOMEM;
1774                 }
1775         }
1776
1777         /* Finally prepare the instruction */
1778         if (cpt_op & ROC_SE_OP_ENCODE)
1779                 ret = cpt_fc_enc_hmac_prep(flags, d_offs, d_lens, &fc_params,
1780                                            inst);
1781         else
1782                 ret = cpt_fc_dec_hmac_prep(flags, d_offs, d_lens, &fc_params,
1783                                            inst);
1784
1785         if (unlikely(ret)) {
1786                 plt_dp_err("Preparing request failed due to bad input arg");
1787                 goto free_mdata_and_exit;
1788         }
1789
1790         return 0;
1791
1792 free_mdata_and_exit:
1793         if (infl_req->op_flags & CPT_OP_FLAGS_METABUF)
1794                 rte_mempool_put(m_info->pool, infl_req->mdata);
1795 err_exit:
1796         return ret;
1797 }
1798
1799 #endif /*_CNXK_SE_H_ */