4 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
5 * Copyright (c) 2016 NXP. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 #include <rte_cryptodev.h>
39 #include <rte_malloc.h>
40 #include <rte_memcpy.h>
41 #include <rte_string_fns.h>
42 #include <rte_cycles.h>
43 #include <rte_kvargs.h>
45 #include <rte_cryptodev_pmd.h>
46 #include <rte_common.h>
47 #include <rte_fslmc.h>
48 #include <fslmc_vfio.h>
49 #include <dpaa2_hw_pvt.h>
50 #include <dpaa2_hw_dpio.h>
51 #include <dpaa2_hw_mempool.h>
52 #include <fsl_dpseci.h>
53 #include <fsl_mc_sys.h>
55 #include "dpaa2_sec_priv.h"
56 #include "dpaa2_sec_logs.h"
58 /* RTA header files */
59 #include <hw/desc/ipsec.h>
60 #include <hw/desc/algo.h>
62 /* Minimum job descriptor consists of a oneword job descriptor HEADER and
63 * a pointer to the shared descriptor
65 #define MIN_JOB_DESC_SIZE (CAAM_CMD_SZ + CAAM_PTR_SZ)
66 #define FSL_VENDOR_ID 0x1957
67 #define FSL_DEVICE_ID 0x410
68 #define FSL_SUBSYSTEM_SEC 1
69 #define FSL_MC_DPSECI_DEVID 3
72 #define TDES_CBC_IV_LEN 8
73 #define AES_CBC_IV_LEN 16
74 enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;
77 build_authenc_fd(dpaa2_sec_session *sess,
78 struct rte_crypto_op *op,
79 struct qbman_fd *fd, uint16_t bpid)
81 struct rte_crypto_sym_op *sym_op = op->sym;
82 struct ctxt_priv *priv = sess->ctxt;
83 struct qbman_fle *fle, *sge;
84 struct sec_flow_context *flc;
85 uint32_t auth_only_len = sym_op->auth.data.length -
86 sym_op->cipher.data.length;
87 int icv_len = sym_op->auth.digest.length;
89 uint32_t mem_len = (7 * sizeof(struct qbman_fle)) + icv_len;
91 PMD_INIT_FUNC_TRACE();
93 /* we are using the first FLE entry to store Mbuf.
94 * Currently we donot know which FLE has the mbuf stored.
95 * So while retreiving we can go back 1 FLE from the FD -ADDR
96 * to get the MBUF Addr from the previous FLE.
97 * We can have a better approach to use the inline Mbuf
99 fle = rte_zmalloc(NULL, mem_len, RTE_CACHE_LINE_SIZE);
101 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
104 DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
107 if (likely(bpid < MAX_BPID)) {
108 DPAA2_SET_FD_BPID(fd, bpid);
109 DPAA2_SET_FLE_BPID(fle, bpid);
110 DPAA2_SET_FLE_BPID(fle + 1, bpid);
111 DPAA2_SET_FLE_BPID(sge, bpid);
112 DPAA2_SET_FLE_BPID(sge + 1, bpid);
113 DPAA2_SET_FLE_BPID(sge + 2, bpid);
114 DPAA2_SET_FLE_BPID(sge + 3, bpid);
116 DPAA2_SET_FD_IVP(fd);
117 DPAA2_SET_FLE_IVP(fle);
118 DPAA2_SET_FLE_IVP((fle + 1));
119 DPAA2_SET_FLE_IVP(sge);
120 DPAA2_SET_FLE_IVP((sge + 1));
121 DPAA2_SET_FLE_IVP((sge + 2));
122 DPAA2_SET_FLE_IVP((sge + 3));
125 /* Save the shared descriptor */
126 flc = &priv->flc_desc[0].flc;
127 /* Configure FD as a FRAME LIST */
128 DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
129 DPAA2_SET_FD_COMPOUND_FMT(fd);
130 DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
132 PMD_TX_LOG(DEBUG, "auth_off: 0x%x/length %d, digest-len=%d\n"
133 "cipher_off: 0x%x/length %d, iv-len=%d data_off: 0x%x\n",
134 sym_op->auth.data.offset,
135 sym_op->auth.data.length,
136 sym_op->auth.digest.length,
137 sym_op->cipher.data.offset,
138 sym_op->cipher.data.length,
139 sym_op->cipher.iv.length,
140 sym_op->m_src->data_off);
142 /* Configure Output FLE with Scatter/Gather Entry */
143 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
145 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
146 fle->length = (sess->dir == DIR_ENC) ?
147 (sym_op->cipher.data.length + icv_len) :
148 sym_op->cipher.data.length;
150 DPAA2_SET_FLE_SG_EXT(fle);
152 /* Configure Output SGE for Encap/Decap */
153 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
154 DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
155 sym_op->m_src->data_off);
156 sge->length = sym_op->cipher.data.length;
158 if (sess->dir == DIR_ENC) {
160 DPAA2_SET_FLE_ADDR(sge,
161 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
162 sge->length = sym_op->auth.digest.length;
163 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
164 sym_op->cipher.iv.length));
166 DPAA2_SET_FLE_FIN(sge);
171 /* Configure Input FLE with Scatter/Gather Entry */
172 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
173 DPAA2_SET_FLE_SG_EXT(fle);
174 DPAA2_SET_FLE_FIN(fle);
175 fle->length = (sess->dir == DIR_ENC) ?
176 (sym_op->auth.data.length + sym_op->cipher.iv.length) :
177 (sym_op->auth.data.length + sym_op->cipher.iv.length +
178 sym_op->auth.digest.length);
180 /* Configure Input SGE for Encap/Decap */
181 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(sym_op->cipher.iv.data));
182 sge->length = sym_op->cipher.iv.length;
185 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
186 DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
187 sym_op->m_src->data_off);
188 sge->length = sym_op->auth.data.length;
189 if (sess->dir == DIR_DEC) {
191 old_icv = (uint8_t *)(sge + 1);
192 memcpy(old_icv, sym_op->auth.digest.data,
193 sym_op->auth.digest.length);
194 memset(sym_op->auth.digest.data, 0, sym_op->auth.digest.length);
195 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
196 sge->length = sym_op->auth.digest.length;
197 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
198 sym_op->auth.digest.length +
199 sym_op->cipher.iv.length));
201 DPAA2_SET_FLE_FIN(sge);
203 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
204 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
210 build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
211 struct qbman_fd *fd, uint16_t bpid)
213 struct rte_crypto_sym_op *sym_op = op->sym;
214 struct qbman_fle *fle, *sge;
215 uint32_t mem_len = (sess->dir == DIR_ENC) ?
216 (3 * sizeof(struct qbman_fle)) :
217 (5 * sizeof(struct qbman_fle) +
218 sym_op->auth.digest.length);
219 struct sec_flow_context *flc;
220 struct ctxt_priv *priv = sess->ctxt;
223 PMD_INIT_FUNC_TRACE();
225 fle = rte_zmalloc(NULL, mem_len, RTE_CACHE_LINE_SIZE);
227 RTE_LOG(ERR, PMD, "Memory alloc failed for FLE\n");
230 /* TODO we are using the first FLE entry to store Mbuf.
231 * Currently we donot know which FLE has the mbuf stored.
232 * So while retreiving we can go back 1 FLE from the FD -ADDR
233 * to get the MBUF Addr from the previous FLE.
234 * We can have a better approach to use the inline Mbuf
236 DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
239 if (likely(bpid < MAX_BPID)) {
240 DPAA2_SET_FD_BPID(fd, bpid);
241 DPAA2_SET_FLE_BPID(fle, bpid);
242 DPAA2_SET_FLE_BPID(fle + 1, bpid);
244 DPAA2_SET_FD_IVP(fd);
245 DPAA2_SET_FLE_IVP(fle);
246 DPAA2_SET_FLE_IVP((fle + 1));
248 flc = &priv->flc_desc[DESC_INITFINAL].flc;
249 DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
251 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
252 fle->length = sym_op->auth.digest.length;
254 DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
255 DPAA2_SET_FD_COMPOUND_FMT(fd);
258 if (sess->dir == DIR_ENC) {
259 DPAA2_SET_FLE_ADDR(fle,
260 DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
261 DPAA2_SET_FLE_OFFSET(fle, sym_op->auth.data.offset +
262 sym_op->m_src->data_off);
263 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length);
264 fle->length = sym_op->auth.data.length;
267 DPAA2_SET_FLE_SG_EXT(fle);
268 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
270 if (likely(bpid < MAX_BPID)) {
271 DPAA2_SET_FLE_BPID(sge, bpid);
272 DPAA2_SET_FLE_BPID(sge + 1, bpid);
274 DPAA2_SET_FLE_IVP(sge);
275 DPAA2_SET_FLE_IVP((sge + 1));
277 DPAA2_SET_FLE_ADDR(sge,
278 DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
279 DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
280 sym_op->m_src->data_off);
282 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length +
283 sym_op->auth.digest.length);
284 sge->length = sym_op->auth.data.length;
286 old_digest = (uint8_t *)(sge + 1);
287 rte_memcpy(old_digest, sym_op->auth.digest.data,
288 sym_op->auth.digest.length);
289 memset(sym_op->auth.digest.data, 0, sym_op->auth.digest.length);
290 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_digest));
291 sge->length = sym_op->auth.digest.length;
292 fle->length = sym_op->auth.data.length +
293 sym_op->auth.digest.length;
294 DPAA2_SET_FLE_FIN(sge);
296 DPAA2_SET_FLE_FIN(fle);
302 build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
303 struct qbman_fd *fd, uint16_t bpid)
305 struct rte_crypto_sym_op *sym_op = op->sym;
306 struct qbman_fle *fle, *sge;
307 uint32_t mem_len = (5 * sizeof(struct qbman_fle));
308 struct sec_flow_context *flc;
309 struct ctxt_priv *priv = sess->ctxt;
311 PMD_INIT_FUNC_TRACE();
313 /* todo - we can use some mempool to avoid malloc here */
314 fle = rte_zmalloc(NULL, mem_len, RTE_CACHE_LINE_SIZE);
316 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
319 /* TODO we are using the first FLE entry to store Mbuf.
320 * Currently we donot know which FLE has the mbuf stored.
321 * So while retreiving we can go back 1 FLE from the FD -ADDR
322 * to get the MBUF Addr from the previous FLE.
323 * We can have a better approach to use the inline Mbuf
325 DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
329 if (likely(bpid < MAX_BPID)) {
330 DPAA2_SET_FD_BPID(fd, bpid);
331 DPAA2_SET_FLE_BPID(fle, bpid);
332 DPAA2_SET_FLE_BPID(fle + 1, bpid);
333 DPAA2_SET_FLE_BPID(sge, bpid);
334 DPAA2_SET_FLE_BPID(sge + 1, bpid);
336 DPAA2_SET_FD_IVP(fd);
337 DPAA2_SET_FLE_IVP(fle);
338 DPAA2_SET_FLE_IVP((fle + 1));
339 DPAA2_SET_FLE_IVP(sge);
340 DPAA2_SET_FLE_IVP((sge + 1));
343 flc = &priv->flc_desc[0].flc;
344 DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
345 DPAA2_SET_FD_LEN(fd, sym_op->cipher.data.length +
346 sym_op->cipher.iv.length);
347 DPAA2_SET_FD_COMPOUND_FMT(fd);
348 DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
350 PMD_TX_LOG(DEBUG, "cipher_off: 0x%x/length %d,ivlen=%d data_off: 0x%x",
351 sym_op->cipher.data.offset,
352 sym_op->cipher.data.length,
353 sym_op->cipher.iv.length,
354 sym_op->m_src->data_off);
356 DPAA2_SET_FLE_ADDR(fle, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
357 DPAA2_SET_FLE_OFFSET(fle, sym_op->cipher.data.offset +
358 sym_op->m_src->data_off);
360 fle->length = sym_op->cipher.data.length + sym_op->cipher.iv.length;
362 PMD_TX_LOG(DEBUG, "1 - flc = %p, fle = %p FLEaddr = %x-%x, length %d",
363 flc, fle, fle->addr_hi, fle->addr_lo, fle->length);
367 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
368 fle->length = sym_op->cipher.data.length + sym_op->cipher.iv.length;
370 DPAA2_SET_FLE_SG_EXT(fle);
372 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(sym_op->cipher.iv.data));
373 sge->length = sym_op->cipher.iv.length;
376 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
377 DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
378 sym_op->m_src->data_off);
380 sge->length = sym_op->cipher.data.length;
381 DPAA2_SET_FLE_FIN(sge);
382 DPAA2_SET_FLE_FIN(fle);
384 PMD_TX_LOG(DEBUG, "fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
385 (void *)DPAA2_GET_FD_ADDR(fd),
386 DPAA2_GET_FD_BPID(fd),
387 rte_dpaa2_bpid_info[bpid].meta_data_size,
388 DPAA2_GET_FD_OFFSET(fd),
389 DPAA2_GET_FD_LEN(fd));
395 build_sec_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
396 struct qbman_fd *fd, uint16_t bpid)
400 PMD_INIT_FUNC_TRACE();
402 switch (sess->ctxt_type) {
403 case DPAA2_SEC_CIPHER:
404 ret = build_cipher_fd(sess, op, fd, bpid);
407 ret = build_auth_fd(sess, op, fd, bpid);
409 case DPAA2_SEC_CIPHER_HASH:
410 ret = build_authenc_fd(sess, op, fd, bpid);
412 case DPAA2_SEC_HASH_CIPHER:
414 RTE_LOG(ERR, PMD, "error: Unsupported session\n");
420 dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
423 /* Function to transmit the frames to given device and VQ*/
426 struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
427 uint32_t frames_to_send;
428 struct qbman_eq_desc eqdesc;
429 struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
430 struct qbman_swp *swp;
432 /*todo - need to support multiple buffer pools */
434 struct rte_mempool *mb_pool;
435 dpaa2_sec_session *sess;
437 if (unlikely(nb_ops == 0))
440 if (ops[0]->sym->sess_type != RTE_CRYPTO_SYM_OP_WITH_SESSION) {
441 RTE_LOG(ERR, PMD, "sessionless crypto op not supported\n");
444 /*Prepare enqueue descriptor*/
445 qbman_eq_desc_clear(&eqdesc);
446 qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
447 qbman_eq_desc_set_response(&eqdesc, 0, 0);
448 qbman_eq_desc_set_fq(&eqdesc, dpaa2_qp->tx_vq.fqid);
450 if (!DPAA2_PER_LCORE_SEC_DPIO) {
451 ret = dpaa2_affine_qbman_swp_sec();
453 RTE_LOG(ERR, PMD, "Failure in affining portal\n");
457 swp = DPAA2_PER_LCORE_SEC_PORTAL;
460 frames_to_send = (nb_ops >> 3) ? MAX_TX_RING_SLOTS : nb_ops;
462 for (loop = 0; loop < frames_to_send; loop++) {
463 /*Clear the unused FD fields before sending*/
464 memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
465 sess = (dpaa2_sec_session *)
466 (*ops)->sym->session->_private;
467 mb_pool = (*ops)->sym->m_src->pool;
468 bpid = mempool_to_bpid(mb_pool);
469 ret = build_sec_fd(sess, *ops, &fd_arr[loop], bpid);
471 PMD_DRV_LOG(ERR, "error: Improper packet"
472 " contents for crypto operation\n");
478 while (loop < frames_to_send) {
479 loop += qbman_swp_send_multiple(swp, &eqdesc,
481 frames_to_send - loop);
484 num_tx += frames_to_send;
485 nb_ops -= frames_to_send;
488 dpaa2_qp->tx_vq.tx_pkts += num_tx;
489 dpaa2_qp->tx_vq.err_pkts += nb_ops;
493 static inline struct rte_crypto_op *
494 sec_fd_to_mbuf(const struct qbman_fd *fd)
496 struct qbman_fle *fle;
497 struct rte_crypto_op *op;
499 fle = (struct qbman_fle *)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
501 PMD_RX_LOG(DEBUG, "FLE addr = %x - %x, offset = %x",
502 fle->addr_hi, fle->addr_lo, fle->fin_bpid_offset);
504 /* we are using the first FLE entry to store Mbuf.
505 * Currently we donot know which FLE has the mbuf stored.
506 * So while retreiving we can go back 1 FLE from the FD -ADDR
507 * to get the MBUF Addr from the previous FLE.
508 * We can have a better approach to use the inline Mbuf
511 if (unlikely(DPAA2_GET_FD_IVP(fd))) {
512 /* TODO complete it. */
513 RTE_LOG(ERR, PMD, "error: Non inline buffer - WHAT to DO?");
516 op = (struct rte_crypto_op *)DPAA2_IOVA_TO_VADDR(
517 DPAA2_GET_FLE_ADDR((fle - 1)));
520 rte_prefetch0(op->sym->m_src);
522 PMD_RX_LOG(DEBUG, "mbuf %p BMAN buf addr %p",
523 (void *)op->sym->m_src, op->sym->m_src->buf_addr);
525 PMD_RX_LOG(DEBUG, "fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
526 (void *)DPAA2_GET_FD_ADDR(fd),
527 DPAA2_GET_FD_BPID(fd),
528 rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
529 DPAA2_GET_FD_OFFSET(fd),
530 DPAA2_GET_FD_LEN(fd));
532 /* free the fle memory */
539 dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
542 /* Function is responsible to receive frames for a given device and VQ*/
543 struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
544 struct qbman_result *dq_storage;
545 uint32_t fqid = dpaa2_qp->rx_vq.fqid;
547 uint8_t is_last = 0, status;
548 struct qbman_swp *swp;
549 const struct qbman_fd *fd;
550 struct qbman_pull_desc pulldesc;
552 if (!DPAA2_PER_LCORE_SEC_DPIO) {
553 ret = dpaa2_affine_qbman_swp_sec();
555 RTE_LOG(ERR, PMD, "Failure in affining portal\n");
559 swp = DPAA2_PER_LCORE_SEC_PORTAL;
560 dq_storage = dpaa2_qp->rx_vq.q_storage->dq_storage[0];
562 qbman_pull_desc_clear(&pulldesc);
563 qbman_pull_desc_set_numframes(&pulldesc,
564 (nb_ops > DPAA2_DQRR_RING_SIZE) ?
565 DPAA2_DQRR_RING_SIZE : nb_ops);
566 qbman_pull_desc_set_fq(&pulldesc, fqid);
567 qbman_pull_desc_set_storage(&pulldesc, dq_storage,
568 (dma_addr_t)DPAA2_VADDR_TO_IOVA(dq_storage),
571 /*Issue a volatile dequeue command. */
573 if (qbman_swp_pull(swp, &pulldesc)) {
574 RTE_LOG(WARNING, PMD, "SEC VDQ command is not issued."
576 /* Portal was busy, try again */
582 /* Receive the packets till Last Dequeue entry is found with
583 * respect to the above issues PULL command.
586 /* Check if the previous issued command is completed.
587 * Also seems like the SWP is shared between the Ethernet Driver
588 * and the SEC driver.
590 while (!qbman_check_command_complete(swp, dq_storage))
593 /* Loop until the dq_storage is updated with
596 while (!qbman_result_has_new_result(swp, dq_storage))
598 /* Check whether Last Pull command is Expired and
599 * setting Condition for Loop termination
601 if (qbman_result_DQ_is_pull_complete(dq_storage)) {
603 /* Check for valid frame. */
604 status = (uint8_t)qbman_result_DQ_flags(dq_storage);
606 (status & QBMAN_DQ_STAT_VALIDFRAME) == 0)) {
607 PMD_RX_LOG(DEBUG, "No frame is delivered");
612 fd = qbman_result_DQ_fd(dq_storage);
613 ops[num_rx] = sec_fd_to_mbuf(fd);
615 if (unlikely(fd->simple.frc)) {
616 /* TODO Parse SEC errors */
617 RTE_LOG(ERR, PMD, "SEC returned Error - %x\n",
619 ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_ERROR;
621 ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
626 } /* End of Packet Rx loop */
628 dpaa2_qp->rx_vq.rx_pkts += num_rx;
630 PMD_RX_LOG(DEBUG, "SEC Received %d Packets", num_rx);
631 /*Return the total number of packets received to DPAA2 app*/
635 /** Release queue pair */
637 dpaa2_sec_queue_pair_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
639 struct dpaa2_sec_qp *qp =
640 (struct dpaa2_sec_qp *)dev->data->queue_pairs[queue_pair_id];
642 PMD_INIT_FUNC_TRACE();
644 if (qp->rx_vq.q_storage) {
645 dpaa2_free_dq_storage(qp->rx_vq.q_storage);
646 rte_free(qp->rx_vq.q_storage);
650 dev->data->queue_pairs[queue_pair_id] = NULL;
655 /** Setup a queue pair */
657 dpaa2_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
658 __rte_unused const struct rte_cryptodev_qp_conf *qp_conf,
659 __rte_unused int socket_id)
661 struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
662 struct dpaa2_sec_qp *qp;
663 struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
664 struct dpseci_rx_queue_cfg cfg;
667 PMD_INIT_FUNC_TRACE();
669 /* If qp is already in use free ring memory and qp metadata. */
670 if (dev->data->queue_pairs[qp_id] != NULL) {
671 PMD_DRV_LOG(INFO, "QP already setup");
675 PMD_DRV_LOG(DEBUG, "dev =%p, queue =%d, conf =%p",
676 dev, qp_id, qp_conf);
678 memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
680 qp = rte_malloc(NULL, sizeof(struct dpaa2_sec_qp),
681 RTE_CACHE_LINE_SIZE);
683 RTE_LOG(ERR, PMD, "malloc failed for rx/tx queues\n");
689 qp->rx_vq.q_storage = rte_malloc("sec dq storage",
690 sizeof(struct queue_storage_info_t),
691 RTE_CACHE_LINE_SIZE);
692 if (!qp->rx_vq.q_storage) {
693 RTE_LOG(ERR, PMD, "malloc failed for q_storage\n");
696 memset(qp->rx_vq.q_storage, 0, sizeof(struct queue_storage_info_t));
698 if (dpaa2_alloc_dq_storage(qp->rx_vq.q_storage)) {
699 RTE_LOG(ERR, PMD, "dpaa2_alloc_dq_storage failed\n");
703 dev->data->queue_pairs[qp_id] = qp;
705 cfg.options = cfg.options | DPSECI_QUEUE_OPT_USER_CTX;
706 cfg.user_ctx = (uint64_t)(&qp->rx_vq);
707 retcode = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
712 /** Start queue pair */
714 dpaa2_sec_queue_pair_start(__rte_unused struct rte_cryptodev *dev,
715 __rte_unused uint16_t queue_pair_id)
717 PMD_INIT_FUNC_TRACE();
722 /** Stop queue pair */
724 dpaa2_sec_queue_pair_stop(__rte_unused struct rte_cryptodev *dev,
725 __rte_unused uint16_t queue_pair_id)
727 PMD_INIT_FUNC_TRACE();
732 /** Return the number of allocated queue pairs */
734 dpaa2_sec_queue_pair_count(struct rte_cryptodev *dev)
736 PMD_INIT_FUNC_TRACE();
738 return dev->data->nb_queue_pairs;
741 /** Returns the size of the aesni gcm session structure */
743 dpaa2_sec_session_get_size(struct rte_cryptodev *dev __rte_unused)
745 PMD_INIT_FUNC_TRACE();
747 return sizeof(dpaa2_sec_session);
751 dpaa2_sec_session_initialize(struct rte_mempool *mp __rte_unused,
752 void *sess __rte_unused)
754 PMD_INIT_FUNC_TRACE();
758 dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
759 struct rte_crypto_sym_xform *xform,
760 dpaa2_sec_session *session)
762 struct dpaa2_sec_cipher_ctxt *ctxt = &session->ext_params.cipher_ctxt;
763 struct alginfo cipherdata;
765 struct ctxt_priv *priv;
766 struct sec_flow_context *flc;
768 PMD_INIT_FUNC_TRACE();
770 /* For SEC CIPHER only one descriptor is required. */
771 priv = (struct ctxt_priv *)rte_zmalloc(NULL,
772 sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
773 RTE_CACHE_LINE_SIZE);
775 RTE_LOG(ERR, PMD, "No Memory for priv CTXT");
779 flc = &priv->flc_desc[0].flc;
781 session->cipher_key.data = rte_zmalloc(NULL, xform->cipher.key.length,
782 RTE_CACHE_LINE_SIZE);
783 if (session->cipher_key.data == NULL) {
784 RTE_LOG(ERR, PMD, "No Memory for cipher key");
788 session->cipher_key.length = xform->cipher.key.length;
790 memcpy(session->cipher_key.data, xform->cipher.key.data,
791 xform->cipher.key.length);
792 cipherdata.key = (uint64_t)session->cipher_key.data;
793 cipherdata.keylen = session->cipher_key.length;
794 cipherdata.key_enc_flags = 0;
795 cipherdata.key_type = RTA_DATA_IMM;
797 switch (xform->cipher.algo) {
798 case RTE_CRYPTO_CIPHER_AES_CBC:
799 cipherdata.algtype = OP_ALG_ALGSEL_AES;
800 cipherdata.algmode = OP_ALG_AAI_CBC;
801 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
802 ctxt->iv.length = AES_CBC_IV_LEN;
804 case RTE_CRYPTO_CIPHER_3DES_CBC:
805 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
806 cipherdata.algmode = OP_ALG_AAI_CBC;
807 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
808 ctxt->iv.length = TDES_CBC_IV_LEN;
810 case RTE_CRYPTO_CIPHER_AES_CTR:
811 case RTE_CRYPTO_CIPHER_3DES_CTR:
812 case RTE_CRYPTO_CIPHER_AES_GCM:
813 case RTE_CRYPTO_CIPHER_AES_CCM:
814 case RTE_CRYPTO_CIPHER_AES_ECB:
815 case RTE_CRYPTO_CIPHER_3DES_ECB:
816 case RTE_CRYPTO_CIPHER_AES_XTS:
817 case RTE_CRYPTO_CIPHER_AES_F8:
818 case RTE_CRYPTO_CIPHER_ARC4:
819 case RTE_CRYPTO_CIPHER_KASUMI_F8:
820 case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
821 case RTE_CRYPTO_CIPHER_ZUC_EEA3:
822 case RTE_CRYPTO_CIPHER_NULL:
823 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u",
827 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
831 session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
834 bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
835 &cipherdata, NULL, ctxt->iv.length,
838 RTE_LOG(ERR, PMD, "Crypto: Descriptor build failed\n");
843 flc->mode_bits = 0x8000;
845 flc->word1_sdl = (uint8_t)bufsize;
846 flc->word2_rflc_31_0 = lower_32_bits(
847 (uint64_t)&(((struct dpaa2_sec_qp *)
848 dev->data->queue_pairs[0])->rx_vq));
849 flc->word3_rflc_63_32 = upper_32_bits(
850 (uint64_t)&(((struct dpaa2_sec_qp *)
851 dev->data->queue_pairs[0])->rx_vq));
852 session->ctxt = priv;
854 for (i = 0; i < bufsize; i++)
855 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
856 i, priv->flc_desc[0].desc[i]);
861 rte_free(session->cipher_key.data);
867 dpaa2_sec_auth_init(struct rte_cryptodev *dev,
868 struct rte_crypto_sym_xform *xform,
869 dpaa2_sec_session *session)
871 struct dpaa2_sec_auth_ctxt *ctxt = &session->ext_params.auth_ctxt;
872 struct alginfo authdata;
873 unsigned int bufsize;
874 struct ctxt_priv *priv;
875 struct sec_flow_context *flc;
877 PMD_INIT_FUNC_TRACE();
879 /* For SEC AUTH three descriptors are required for various stages */
880 priv = (struct ctxt_priv *)rte_zmalloc(NULL,
881 sizeof(struct ctxt_priv) + 3 *
882 sizeof(struct sec_flc_desc),
883 RTE_CACHE_LINE_SIZE);
885 RTE_LOG(ERR, PMD, "No Memory for priv CTXT");
889 flc = &priv->flc_desc[DESC_INITFINAL].flc;
891 session->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,
892 RTE_CACHE_LINE_SIZE);
893 if (session->auth_key.data == NULL) {
894 RTE_LOG(ERR, PMD, "No Memory for auth key");
898 session->auth_key.length = xform->auth.key.length;
900 memcpy(session->auth_key.data, xform->auth.key.data,
901 xform->auth.key.length);
902 authdata.key = (uint64_t)session->auth_key.data;
903 authdata.keylen = session->auth_key.length;
904 authdata.key_enc_flags = 0;
905 authdata.key_type = RTA_DATA_IMM;
907 switch (xform->auth.algo) {
908 case RTE_CRYPTO_AUTH_SHA1_HMAC:
909 authdata.algtype = OP_ALG_ALGSEL_SHA1;
910 authdata.algmode = OP_ALG_AAI_HMAC;
911 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
913 case RTE_CRYPTO_AUTH_MD5_HMAC:
914 authdata.algtype = OP_ALG_ALGSEL_MD5;
915 authdata.algmode = OP_ALG_AAI_HMAC;
916 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
918 case RTE_CRYPTO_AUTH_SHA256_HMAC:
919 authdata.algtype = OP_ALG_ALGSEL_SHA256;
920 authdata.algmode = OP_ALG_AAI_HMAC;
921 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
923 case RTE_CRYPTO_AUTH_SHA384_HMAC:
924 authdata.algtype = OP_ALG_ALGSEL_SHA384;
925 authdata.algmode = OP_ALG_AAI_HMAC;
926 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
928 case RTE_CRYPTO_AUTH_SHA512_HMAC:
929 authdata.algtype = OP_ALG_ALGSEL_SHA512;
930 authdata.algmode = OP_ALG_AAI_HMAC;
931 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
933 case RTE_CRYPTO_AUTH_SHA224_HMAC:
934 authdata.algtype = OP_ALG_ALGSEL_SHA224;
935 authdata.algmode = OP_ALG_AAI_HMAC;
936 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
938 case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
939 case RTE_CRYPTO_AUTH_AES_GCM:
940 case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
941 case RTE_CRYPTO_AUTH_NULL:
942 case RTE_CRYPTO_AUTH_SHA1:
943 case RTE_CRYPTO_AUTH_SHA256:
944 case RTE_CRYPTO_AUTH_SHA512:
945 case RTE_CRYPTO_AUTH_SHA224:
946 case RTE_CRYPTO_AUTH_SHA384:
947 case RTE_CRYPTO_AUTH_MD5:
948 case RTE_CRYPTO_AUTH_AES_CCM:
949 case RTE_CRYPTO_AUTH_AES_GMAC:
950 case RTE_CRYPTO_AUTH_KASUMI_F9:
951 case RTE_CRYPTO_AUTH_AES_CMAC:
952 case RTE_CRYPTO_AUTH_AES_CBC_MAC:
953 case RTE_CRYPTO_AUTH_ZUC_EIA3:
954 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u",
958 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
962 session->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?
965 bufsize = cnstr_shdsc_hmac(priv->flc_desc[DESC_INITFINAL].desc,
966 1, 0, &authdata, !session->dir,
969 flc->word1_sdl = (uint8_t)bufsize;
970 flc->word2_rflc_31_0 = lower_32_bits(
971 (uint64_t)&(((struct dpaa2_sec_qp *)
972 dev->data->queue_pairs[0])->rx_vq));
973 flc->word3_rflc_63_32 = upper_32_bits(
974 (uint64_t)&(((struct dpaa2_sec_qp *)
975 dev->data->queue_pairs[0])->rx_vq));
976 session->ctxt = priv;
981 rte_free(session->auth_key.data);
987 dpaa2_sec_aead_init(struct rte_cryptodev *dev,
988 struct rte_crypto_sym_xform *xform,
989 dpaa2_sec_session *session)
991 struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
992 struct alginfo authdata, cipherdata;
993 unsigned int bufsize;
994 struct ctxt_priv *priv;
995 struct sec_flow_context *flc;
996 struct rte_crypto_cipher_xform *cipher_xform;
997 struct rte_crypto_auth_xform *auth_xform;
1000 PMD_INIT_FUNC_TRACE();
1002 if (session->ext_params.aead_ctxt.auth_cipher_text) {
1003 cipher_xform = &xform->cipher;
1004 auth_xform = &xform->next->auth;
1005 session->ctxt_type =
1006 (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1007 DPAA2_SEC_CIPHER_HASH : DPAA2_SEC_HASH_CIPHER;
1009 cipher_xform = &xform->next->cipher;
1010 auth_xform = &xform->auth;
1011 session->ctxt_type =
1012 (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1013 DPAA2_SEC_HASH_CIPHER : DPAA2_SEC_CIPHER_HASH;
1015 /* For SEC AEAD only one descriptor is required */
1016 priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1017 sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1018 RTE_CACHE_LINE_SIZE);
1020 RTE_LOG(ERR, PMD, "No Memory for priv CTXT");
1024 flc = &priv->flc_desc[0].flc;
1026 session->cipher_key.data = rte_zmalloc(NULL, cipher_xform->key.length,
1027 RTE_CACHE_LINE_SIZE);
1028 if (session->cipher_key.data == NULL && cipher_xform->key.length > 0) {
1029 RTE_LOG(ERR, PMD, "No Memory for cipher key");
1033 session->cipher_key.length = cipher_xform->key.length;
1034 session->auth_key.data = rte_zmalloc(NULL, auth_xform->key.length,
1035 RTE_CACHE_LINE_SIZE);
1036 if (session->auth_key.data == NULL && auth_xform->key.length > 0) {
1037 RTE_LOG(ERR, PMD, "No Memory for auth key");
1038 rte_free(session->cipher_key.data);
1042 session->auth_key.length = auth_xform->key.length;
1043 memcpy(session->cipher_key.data, cipher_xform->key.data,
1044 cipher_xform->key.length);
1045 memcpy(session->auth_key.data, auth_xform->key.data,
1046 auth_xform->key.length);
1048 ctxt->trunc_len = auth_xform->digest_length;
1049 authdata.key = (uint64_t)session->auth_key.data;
1050 authdata.keylen = session->auth_key.length;
1051 authdata.key_enc_flags = 0;
1052 authdata.key_type = RTA_DATA_IMM;
1054 switch (auth_xform->algo) {
1055 case RTE_CRYPTO_AUTH_SHA1_HMAC:
1056 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1057 authdata.algmode = OP_ALG_AAI_HMAC;
1058 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1060 case RTE_CRYPTO_AUTH_MD5_HMAC:
1061 authdata.algtype = OP_ALG_ALGSEL_MD5;
1062 authdata.algmode = OP_ALG_AAI_HMAC;
1063 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1065 case RTE_CRYPTO_AUTH_SHA224_HMAC:
1066 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1067 authdata.algmode = OP_ALG_AAI_HMAC;
1068 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1070 case RTE_CRYPTO_AUTH_SHA256_HMAC:
1071 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1072 authdata.algmode = OP_ALG_AAI_HMAC;
1073 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1075 case RTE_CRYPTO_AUTH_SHA384_HMAC:
1076 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1077 authdata.algmode = OP_ALG_AAI_HMAC;
1078 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1080 case RTE_CRYPTO_AUTH_SHA512_HMAC:
1081 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1082 authdata.algmode = OP_ALG_AAI_HMAC;
1083 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1085 case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1086 case RTE_CRYPTO_AUTH_AES_GCM:
1087 case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1088 case RTE_CRYPTO_AUTH_NULL:
1089 case RTE_CRYPTO_AUTH_SHA1:
1090 case RTE_CRYPTO_AUTH_SHA256:
1091 case RTE_CRYPTO_AUTH_SHA512:
1092 case RTE_CRYPTO_AUTH_SHA224:
1093 case RTE_CRYPTO_AUTH_SHA384:
1094 case RTE_CRYPTO_AUTH_MD5:
1095 case RTE_CRYPTO_AUTH_AES_CCM:
1096 case RTE_CRYPTO_AUTH_AES_GMAC:
1097 case RTE_CRYPTO_AUTH_KASUMI_F9:
1098 case RTE_CRYPTO_AUTH_AES_CMAC:
1099 case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1100 case RTE_CRYPTO_AUTH_ZUC_EIA3:
1101 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u",
1105 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1109 cipherdata.key = (uint64_t)session->cipher_key.data;
1110 cipherdata.keylen = session->cipher_key.length;
1111 cipherdata.key_enc_flags = 0;
1112 cipherdata.key_type = RTA_DATA_IMM;
1114 switch (cipher_xform->algo) {
1115 case RTE_CRYPTO_CIPHER_AES_CBC:
1116 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1117 cipherdata.algmode = OP_ALG_AAI_CBC;
1118 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
1119 ctxt->iv.length = AES_CBC_IV_LEN;
1121 case RTE_CRYPTO_CIPHER_3DES_CBC:
1122 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
1123 cipherdata.algmode = OP_ALG_AAI_CBC;
1124 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
1125 ctxt->iv.length = TDES_CBC_IV_LEN;
1127 case RTE_CRYPTO_CIPHER_AES_GCM:
1128 case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1129 case RTE_CRYPTO_CIPHER_NULL:
1130 case RTE_CRYPTO_CIPHER_3DES_ECB:
1131 case RTE_CRYPTO_CIPHER_AES_ECB:
1132 case RTE_CRYPTO_CIPHER_AES_CTR:
1133 case RTE_CRYPTO_CIPHER_AES_CCM:
1134 case RTE_CRYPTO_CIPHER_KASUMI_F8:
1135 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u",
1136 cipher_xform->algo);
1139 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
1140 cipher_xform->algo);
1143 session->dir = (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1146 priv->flc_desc[0].desc[0] = cipherdata.keylen;
1147 priv->flc_desc[0].desc[1] = authdata.keylen;
1148 err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
1150 (unsigned int *)priv->flc_desc[0].desc,
1151 &priv->flc_desc[0].desc[2], 2);
1154 PMD_DRV_LOG(ERR, "Crypto: Incorrect key lengths");
1157 if (priv->flc_desc[0].desc[2] & 1) {
1158 cipherdata.key_type = RTA_DATA_IMM;
1160 cipherdata.key = DPAA2_VADDR_TO_IOVA(cipherdata.key);
1161 cipherdata.key_type = RTA_DATA_PTR;
1163 if (priv->flc_desc[0].desc[2] & (1 << 1)) {
1164 authdata.key_type = RTA_DATA_IMM;
1166 authdata.key = DPAA2_VADDR_TO_IOVA(authdata.key);
1167 authdata.key_type = RTA_DATA_PTR;
1169 priv->flc_desc[0].desc[0] = 0;
1170 priv->flc_desc[0].desc[1] = 0;
1171 priv->flc_desc[0].desc[2] = 0;
1173 if (session->ctxt_type == DPAA2_SEC_CIPHER_HASH) {
1174 bufsize = cnstr_shdsc_authenc(priv->flc_desc[0].desc, 1,
1175 0, &cipherdata, &authdata,
1177 ctxt->auth_only_len,
1181 RTE_LOG(ERR, PMD, "Hash before cipher not supported");
1185 flc->word1_sdl = (uint8_t)bufsize;
1186 flc->word2_rflc_31_0 = lower_32_bits(
1187 (uint64_t)&(((struct dpaa2_sec_qp *)
1188 dev->data->queue_pairs[0])->rx_vq));
1189 flc->word3_rflc_63_32 = upper_32_bits(
1190 (uint64_t)&(((struct dpaa2_sec_qp *)
1191 dev->data->queue_pairs[0])->rx_vq));
1192 session->ctxt = priv;
1197 rte_free(session->cipher_key.data);
1198 rte_free(session->auth_key.data);
1204 dpaa2_sec_session_configure(struct rte_cryptodev *dev,
1205 struct rte_crypto_sym_xform *xform, void *sess)
1207 dpaa2_sec_session *session = sess;
1209 PMD_INIT_FUNC_TRACE();
1211 if (unlikely(sess == NULL)) {
1212 RTE_LOG(ERR, PMD, "invalid session struct");
1216 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL) {
1217 session->ctxt_type = DPAA2_SEC_CIPHER;
1218 dpaa2_sec_cipher_init(dev, xform, session);
1220 /* Authentication Only */
1221 } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1222 xform->next == NULL) {
1223 session->ctxt_type = DPAA2_SEC_AUTH;
1224 dpaa2_sec_auth_init(dev, xform, session);
1226 /* Cipher then Authenticate */
1227 } else if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
1228 xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
1229 session->ext_params.aead_ctxt.auth_cipher_text = true;
1230 dpaa2_sec_aead_init(dev, xform, session);
1232 /* Authenticate then Cipher */
1233 } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1234 xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
1235 session->ext_params.aead_ctxt.auth_cipher_text = false;
1236 dpaa2_sec_aead_init(dev, xform, session);
1238 RTE_LOG(ERR, PMD, "Invalid crypto type");
1245 /** Clear the memory of session so it doesn't leave key material behind */
1247 dpaa2_sec_session_clear(struct rte_cryptodev *dev __rte_unused, void *sess)
1249 PMD_INIT_FUNC_TRACE();
1250 dpaa2_sec_session *s = (dpaa2_sec_session *)sess;
1254 rte_free(s->cipher_key.data);
1255 rte_free(s->auth_key.data);
1256 memset(sess, 0, sizeof(dpaa2_sec_session));
1261 dpaa2_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
1262 struct rte_cryptodev_config *config __rte_unused)
1264 PMD_INIT_FUNC_TRACE();
1270 dpaa2_sec_dev_start(struct rte_cryptodev *dev)
1272 struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1273 struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1274 struct dpseci_attr attr;
1275 struct dpaa2_queue *dpaa2_q;
1276 struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1277 dev->data->queue_pairs;
1278 struct dpseci_rx_queue_attr rx_attr;
1279 struct dpseci_tx_queue_attr tx_attr;
1282 PMD_INIT_FUNC_TRACE();
1284 memset(&attr, 0, sizeof(struct dpseci_attr));
1286 ret = dpseci_enable(dpseci, CMD_PRI_LOW, priv->token);
1288 PMD_INIT_LOG(ERR, "DPSECI with HW_ID = %d ENABLE FAILED\n",
1290 goto get_attr_failure;
1292 ret = dpseci_get_attributes(dpseci, CMD_PRI_LOW, priv->token, &attr);
1295 "DPSEC ATTRIBUTE READ FAILED, disabling DPSEC\n");
1296 goto get_attr_failure;
1298 for (i = 0; i < attr.num_rx_queues && qp[i]; i++) {
1299 dpaa2_q = &qp[i]->rx_vq;
1300 dpseci_get_rx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
1302 dpaa2_q->fqid = rx_attr.fqid;
1303 PMD_INIT_LOG(DEBUG, "rx_fqid: %d", dpaa2_q->fqid);
1305 for (i = 0; i < attr.num_tx_queues && qp[i]; i++) {
1306 dpaa2_q = &qp[i]->tx_vq;
1307 dpseci_get_tx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
1309 dpaa2_q->fqid = tx_attr.fqid;
1310 PMD_INIT_LOG(DEBUG, "tx_fqid: %d", dpaa2_q->fqid);
1315 dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
1320 dpaa2_sec_dev_stop(struct rte_cryptodev *dev)
1322 struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1323 struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1326 PMD_INIT_FUNC_TRACE();
1328 ret = dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
1330 PMD_INIT_LOG(ERR, "Failure in disabling dpseci %d device",
1335 ret = dpseci_reset(dpseci, CMD_PRI_LOW, priv->token);
1337 PMD_INIT_LOG(ERR, "SEC Device cannot be reset:Error = %0x\n",
1344 dpaa2_sec_dev_close(struct rte_cryptodev *dev)
1346 struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1347 struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1350 PMD_INIT_FUNC_TRACE();
1352 /* Function is reverse of dpaa2_sec_dev_init.
1353 * It does the following:
1354 * 1. Detach a DPSECI from attached resources i.e. buffer pools, dpbp_id
1355 * 2. Close the DPSECI device
1356 * 3. Free the allocated resources.
1359 /*Close the device at underlying layer*/
1360 ret = dpseci_close(dpseci, CMD_PRI_LOW, priv->token);
1362 PMD_INIT_LOG(ERR, "Failure closing dpseci device with"
1363 " error code %d\n", ret);
1367 /*Free the allocated memory for ethernet private data and dpseci*/
1375 dpaa2_sec_dev_infos_get(struct rte_cryptodev *dev,
1376 struct rte_cryptodev_info *info)
1378 struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
1380 PMD_INIT_FUNC_TRACE();
1382 info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
1383 info->feature_flags = dev->feature_flags;
1384 info->capabilities = dpaa2_sec_capabilities;
1385 info->sym.max_nb_sessions = internals->max_nb_sessions;
1386 info->dev_type = RTE_CRYPTODEV_DPAA2_SEC_PMD;
1391 void dpaa2_sec_stats_get(struct rte_cryptodev *dev,
1392 struct rte_cryptodev_stats *stats)
1394 struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1395 struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1396 struct dpseci_sec_counters counters = {0};
1397 struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1398 dev->data->queue_pairs;
1401 PMD_INIT_FUNC_TRACE();
1402 if (stats == NULL) {
1403 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
1406 for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1407 if (qp[i] == NULL) {
1408 PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1412 stats->enqueued_count += qp[i]->tx_vq.tx_pkts;
1413 stats->dequeued_count += qp[i]->rx_vq.rx_pkts;
1414 stats->enqueue_err_count += qp[i]->tx_vq.err_pkts;
1415 stats->dequeue_err_count += qp[i]->rx_vq.err_pkts;
1418 ret = dpseci_get_sec_counters(dpseci, CMD_PRI_LOW, priv->token,
1421 PMD_DRV_LOG(ERR, "dpseci_get_sec_counters failed\n");
1423 PMD_DRV_LOG(INFO, "dpseci hw stats:"
1424 "\n\tNumber of Requests Dequeued = %lu"
1425 "\n\tNumber of Outbound Encrypt Requests = %lu"
1426 "\n\tNumber of Inbound Decrypt Requests = %lu"
1427 "\n\tNumber of Outbound Bytes Encrypted = %lu"
1428 "\n\tNumber of Outbound Bytes Protected = %lu"
1429 "\n\tNumber of Inbound Bytes Decrypted = %lu"
1430 "\n\tNumber of Inbound Bytes Validated = %lu",
1431 counters.dequeued_requests,
1432 counters.ob_enc_requests,
1433 counters.ib_dec_requests,
1434 counters.ob_enc_bytes,
1435 counters.ob_prot_bytes,
1436 counters.ib_dec_bytes,
1437 counters.ib_valid_bytes);
1442 void dpaa2_sec_stats_reset(struct rte_cryptodev *dev)
1445 struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1446 (dev->data->queue_pairs);
1448 PMD_INIT_FUNC_TRACE();
1450 for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1451 if (qp[i] == NULL) {
1452 PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1455 qp[i]->tx_vq.rx_pkts = 0;
1456 qp[i]->tx_vq.tx_pkts = 0;
1457 qp[i]->tx_vq.err_pkts = 0;
1458 qp[i]->rx_vq.rx_pkts = 0;
1459 qp[i]->rx_vq.tx_pkts = 0;
1460 qp[i]->rx_vq.err_pkts = 0;
1464 static struct rte_cryptodev_ops crypto_ops = {
1465 .dev_configure = dpaa2_sec_dev_configure,
1466 .dev_start = dpaa2_sec_dev_start,
1467 .dev_stop = dpaa2_sec_dev_stop,
1468 .dev_close = dpaa2_sec_dev_close,
1469 .dev_infos_get = dpaa2_sec_dev_infos_get,
1470 .stats_get = dpaa2_sec_stats_get,
1471 .stats_reset = dpaa2_sec_stats_reset,
1472 .queue_pair_setup = dpaa2_sec_queue_pair_setup,
1473 .queue_pair_release = dpaa2_sec_queue_pair_release,
1474 .queue_pair_start = dpaa2_sec_queue_pair_start,
1475 .queue_pair_stop = dpaa2_sec_queue_pair_stop,
1476 .queue_pair_count = dpaa2_sec_queue_pair_count,
1477 .session_get_size = dpaa2_sec_session_get_size,
1478 .session_initialize = dpaa2_sec_session_initialize,
1479 .session_configure = dpaa2_sec_session_configure,
1480 .session_clear = dpaa2_sec_session_clear,
1484 dpaa2_sec_uninit(const struct rte_cryptodev_driver *crypto_drv __rte_unused,
1485 struct rte_cryptodev *dev)
1487 PMD_INIT_LOG(INFO, "Closing DPAA2_SEC device %s on numa socket %u\n",
1488 dev->data->name, rte_socket_id());
1494 dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
1496 struct dpaa2_sec_dev_private *internals;
1497 struct rte_device *dev = cryptodev->device;
1498 struct rte_dpaa2_device *dpaa2_dev;
1499 struct fsl_mc_io *dpseci;
1501 struct dpseci_attr attr;
1504 PMD_INIT_FUNC_TRACE();
1505 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1506 if (dpaa2_dev == NULL) {
1507 PMD_INIT_LOG(ERR, "dpaa2_device not found\n");
1510 hw_id = dpaa2_dev->object_id;
1512 cryptodev->dev_type = RTE_CRYPTODEV_DPAA2_SEC_PMD;
1513 cryptodev->dev_ops = &crypto_ops;
1515 cryptodev->enqueue_burst = dpaa2_sec_enqueue_burst;
1516 cryptodev->dequeue_burst = dpaa2_sec_dequeue_burst;
1517 cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
1518 RTE_CRYPTODEV_FF_HW_ACCELERATED |
1519 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;
1521 internals = cryptodev->data->dev_private;
1522 internals->max_nb_sessions = RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS;
1525 * For secondary processes, we don't initialise any further as primary
1526 * has already done this work. Only check we don't need a different
1529 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1530 PMD_INIT_LOG(DEBUG, "Device already init by primary process");
1533 /*Open the rte device via MC and save the handle for further use*/
1534 dpseci = (struct fsl_mc_io *)rte_calloc(NULL, 1,
1535 sizeof(struct fsl_mc_io), 0);
1538 "Error in allocating the memory for dpsec object");
1541 dpseci->regs = rte_mcp_ptr_list[0];
1543 retcode = dpseci_open(dpseci, CMD_PRI_LOW, hw_id, &token);
1545 PMD_INIT_LOG(ERR, "Cannot open the dpsec device: Error = %x",
1549 retcode = dpseci_get_attributes(dpseci, CMD_PRI_LOW, token, &attr);
1552 "Cannot get dpsec device attributed: Error = %x",
1556 sprintf(cryptodev->data->name, "dpsec-%u", hw_id);
1558 internals->max_nb_queue_pairs = attr.num_tx_queues;
1559 cryptodev->data->nb_queue_pairs = internals->max_nb_queue_pairs;
1560 internals->hw = dpseci;
1561 internals->token = token;
1563 PMD_INIT_LOG(DEBUG, "driver %s: created\n", cryptodev->data->name);
1567 PMD_INIT_LOG(ERR, "driver %s: create failed\n", cryptodev->data->name);
1569 /* dpaa2_sec_uninit(crypto_dev_name); */
1574 cryptodev_dpaa2_sec_probe(struct rte_dpaa2_driver *dpaa2_drv,
1575 struct rte_dpaa2_device *dpaa2_dev)
1577 struct rte_cryptodev *cryptodev;
1578 char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
1582 sprintf(cryptodev_name, "dpsec-%d", dpaa2_dev->object_id);
1584 cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
1585 if (cryptodev == NULL)
1588 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1589 cryptodev->data->dev_private = rte_zmalloc_socket(
1590 "cryptodev private structure",
1591 sizeof(struct dpaa2_sec_dev_private),
1592 RTE_CACHE_LINE_SIZE,
1595 if (cryptodev->data->dev_private == NULL)
1596 rte_panic("Cannot allocate memzone for private "
1600 dpaa2_dev->cryptodev = cryptodev;
1601 cryptodev->device = &dpaa2_dev->device;
1602 cryptodev->driver = (struct rte_cryptodev_driver *)dpaa2_drv;
1604 /* init user callbacks */
1605 TAILQ_INIT(&(cryptodev->link_intr_cbs));
1607 /* Invoke PMD device initialization function */
1608 retval = dpaa2_sec_dev_init(cryptodev);
1612 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1613 rte_free(cryptodev->data->dev_private);
1615 cryptodev->attached = RTE_CRYPTODEV_DETACHED;
1621 cryptodev_dpaa2_sec_remove(struct rte_dpaa2_device *dpaa2_dev)
1623 struct rte_cryptodev *cryptodev;
1626 cryptodev = dpaa2_dev->cryptodev;
1627 if (cryptodev == NULL)
1630 ret = dpaa2_sec_uninit(NULL, cryptodev);
1634 /* free crypto device */
1635 rte_cryptodev_pmd_release_device(cryptodev);
1637 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1638 rte_free(cryptodev->data->dev_private);
1640 cryptodev->device = NULL;
1641 cryptodev->driver = NULL;
1642 cryptodev->data = NULL;
1647 static struct rte_dpaa2_driver rte_dpaa2_sec_driver = {
1648 .drv_type = DPAA2_MC_DPSECI_DEVID,
1650 .name = "DPAA2 SEC PMD"
1652 .probe = cryptodev_dpaa2_sec_probe,
1653 .remove = cryptodev_dpaa2_sec_remove,
1656 RTE_PMD_REGISTER_DPAA2(dpaa2_sec_pmd, rte_dpaa2_sec_driver);