1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
3 * Copyright 2008-2016 Freescale Semiconductor Inc.
4 * Copyright 2016,2019 NXP
7 #ifndef __RTA_MOVE_CMD_H__
8 #define __RTA_MOVE_CMD_H__
10 #define MOVE_SET_AUX_SRC 0x01
11 #define MOVE_SET_AUX_DST 0x02
12 #define MOVE_SET_AUX_LS 0x03
13 #define MOVE_SET_LEN_16b 0x04
15 #define MOVE_SET_AUX_MATH 0x10
16 #define MOVE_SET_AUX_MATH_SRC (MOVE_SET_AUX_SRC | MOVE_SET_AUX_MATH)
17 #define MOVE_SET_AUX_MATH_DST (MOVE_SET_AUX_DST | MOVE_SET_AUX_MATH)
21 /* MOVE command type */
26 extern enum rta_sec_era rta_sec_era;
28 static const uint32_t move_src_table[][2] = {
29 /*1*/ { CONTEXT1, MOVE_SRC_CLASS1CTX },
30 { CONTEXT2, MOVE_SRC_CLASS2CTX },
31 { OFIFO, MOVE_SRC_OUTFIFO },
32 { DESCBUF, MOVE_SRC_DESCBUF },
33 { MATH0, MOVE_SRC_MATH0 },
34 { MATH1, MOVE_SRC_MATH1 },
35 { MATH2, MOVE_SRC_MATH2 },
36 { MATH3, MOVE_SRC_MATH3 },
37 /*9*/ { IFIFOABD, MOVE_SRC_INFIFO },
38 { IFIFOAB1, MOVE_SRC_INFIFO_CL | MOVE_AUX_LS },
39 { IFIFOAB2, MOVE_SRC_INFIFO_CL },
40 /*12*/ { ABD, MOVE_SRC_INFIFO_NO_NFIFO },
41 { AB1, MOVE_SRC_INFIFO_NO_NFIFO | MOVE_AUX_LS },
42 { AB2, MOVE_SRC_INFIFO_NO_NFIFO | MOVE_AUX_MS }
45 /* Allowed MOVE / MOVE_LEN sources for each SEC Era.
46 * Values represent the number of entries from move_src_table[] that are
49 static const unsigned int move_src_table_sz[] = {9, 11, 14, 14, 14, 14, 14, 14,
52 static const uint32_t move_dst_table[][2] = {
53 /*1*/ { CONTEXT1, MOVE_DEST_CLASS1CTX },
54 { CONTEXT2, MOVE_DEST_CLASS2CTX },
55 { OFIFO, MOVE_DEST_OUTFIFO },
56 { DESCBUF, MOVE_DEST_DESCBUF },
57 { MATH0, MOVE_DEST_MATH0 },
58 { MATH1, MOVE_DEST_MATH1 },
59 { MATH2, MOVE_DEST_MATH2 },
60 { MATH3, MOVE_DEST_MATH3 },
61 { IFIFOAB1, MOVE_DEST_CLASS1INFIFO },
62 { IFIFOAB2, MOVE_DEST_CLASS2INFIFO },
63 { PKA, MOVE_DEST_PK_A },
64 { KEY1, MOVE_DEST_CLASS1KEY },
65 { KEY2, MOVE_DEST_CLASS2KEY },
66 /*14*/ { IFIFO, MOVE_DEST_INFIFO },
67 /*15*/ { ALTSOURCE, MOVE_DEST_ALTSOURCE}
70 /* Allowed MOVE / MOVE_LEN destinations for each SEC Era.
71 * Values represent the number of entries from move_dst_table[] that are
75 unsigned int move_dst_table_sz[] = {13, 14, 14, 15, 15, 15, 15, 15, 15, 15};
78 set_move_offset(struct program *program __maybe_unused,
79 uint64_t src, uint16_t src_offset,
80 uint64_t dst, uint16_t dst_offset,
81 uint16_t *offset, uint16_t *opt);
84 math_offset(uint16_t offset);
87 rta_move(struct program *program, int cmd_type, uint64_t src,
88 uint16_t src_offset, uint64_t dst,
89 uint16_t dst_offset, uint32_t length, uint32_t flags)
92 uint16_t offset = 0, opt = 0;
95 bool is_move_len_cmd = false;
96 unsigned int start_pc = program->current_pc;
98 if ((rta_sec_era < RTA_SEC_ERA_7) && (cmd_type != __MOVE)) {
99 pr_err("MOVE: MOVEB / MOVEDW not supported by SEC Era %d. SEC PC: %d; Instr: %d\n",
100 USER_SEC_ERA(rta_sec_era), program->current_pc,
101 program->current_instruction);
105 /* write command type */
106 if (cmd_type == __MOVEB) {
108 } else if (cmd_type == __MOVEDW) {
110 } else if (!(flags & IMMED)) {
111 if (rta_sec_era < RTA_SEC_ERA_3) {
112 pr_err("MOVE: MOVE_LEN not supported by SEC Era %d. SEC PC: %d; Instr: %d\n",
113 USER_SEC_ERA(rta_sec_era), program->current_pc,
114 program->current_instruction);
118 if ((length != MATH0) && (length != MATH1) &&
119 (length != MATH2) && (length != MATH3)) {
120 pr_err("MOVE: MOVE_LEN length must be MATH[0-3]. SEC PC: %d; Instr: %d\n",
122 program->current_instruction);
126 opcode = CMD_MOVE_LEN;
127 is_move_len_cmd = true;
132 /* write offset first, to check for invalid combinations or incorrect
133 * offset values sooner; decide which offset should be here
136 ret = set_move_offset(program, src, src_offset, dst, dst_offset,
141 opcode |= (offset << MOVE_OFFSET_SHIFT) & MOVE_OFFSET_MASK;
143 /* set AUX field if required */
144 if (opt == MOVE_SET_AUX_SRC) {
145 opcode |= ((src_offset / 16) << MOVE_AUX_SHIFT) & MOVE_AUX_MASK;
146 } else if (opt == MOVE_SET_AUX_DST) {
147 opcode |= ((dst_offset / 16) << MOVE_AUX_SHIFT) & MOVE_AUX_MASK;
148 } else if (opt == MOVE_SET_AUX_LS) {
149 opcode |= MOVE_AUX_LS;
150 } else if (opt & MOVE_SET_AUX_MATH) {
151 if (opt & MOVE_SET_AUX_SRC)
156 if (rta_sec_era < RTA_SEC_ERA_6) {
158 pr_debug("MOVE: Offset not supported by SEC Era %d. SEC PC: %d; Instr: %d\n",
159 USER_SEC_ERA(rta_sec_era),
161 program->current_instruction);
162 /* nothing to do for offset = 0 */
164 ret = math_offset(offset);
166 pr_err("MOVE: Invalid offset in MATH register. SEC PC: %d; Instr: %d\n",
168 program->current_instruction);
172 opcode |= (uint32_t)ret;
176 /* write source field */
177 ret = __rta_map_opcode((uint32_t)src, move_src_table,
178 move_src_table_sz[rta_sec_era], &val);
180 pr_err("MOVE: Invalid SRC. SEC PC: %d; Instr: %d\n",
181 program->current_pc, program->current_instruction);
186 /* write destination field */
187 ret = __rta_map_opcode((uint32_t)dst, move_dst_table,
188 move_dst_table_sz[rta_sec_era], &val);
190 pr_err("MOVE: Invalid DST. SEC PC: %d; Instr: %d\n",
191 program->current_pc, program->current_instruction);
197 if (flags & (FLUSH1 | FLUSH2))
198 opcode |= MOVE_AUX_MS;
199 if (flags & (LAST2 | LAST1))
200 opcode |= MOVE_AUX_LS;
201 if (flags & WAITCOMP)
202 opcode |= MOVE_WAITCOMP;
204 if (!is_move_len_cmd) {
206 if (opt == MOVE_SET_LEN_16b)
207 opcode |= (length & (MOVE_OFFSET_MASK | MOVE_LEN_MASK));
209 opcode |= (length & MOVE_LEN_MASK);
215 * opcode |= MOVELEN_MRSEL_MATH0;
216 * MOVELEN_MRSEL_MATH0 is 0
220 opcode |= MOVELEN_MRSEL_MATH1;
223 opcode |= MOVELEN_MRSEL_MATH2;
226 opcode |= MOVELEN_MRSEL_MATH3;
231 if (rta_sec_era >= RTA_SEC_ERA_7) {
232 if (flags & SIZE_WORD)
233 opcode |= MOVELEN_SIZE_WORD;
234 else if (flags & SIZE_BYTE)
235 opcode |= MOVELEN_SIZE_BYTE;
236 else if (flags & SIZE_DWORD)
237 opcode |= MOVELEN_SIZE_DWORD;
241 __rta_out32(program, opcode);
242 program->current_instruction++;
244 return (int)start_pc;
247 program->first_error_pc = start_pc;
248 program->current_instruction++;
253 set_move_offset(struct program *program __maybe_unused,
254 uint64_t src, uint16_t src_offset,
255 uint64_t dst, uint16_t dst_offset,
256 uint16_t *offset, uint16_t *opt)
261 if (dst == DESCBUF) {
262 *opt = MOVE_SET_AUX_SRC;
263 *offset = dst_offset;
264 } else if ((dst == KEY1) || (dst == KEY2)) {
265 if ((src_offset) && (dst_offset)) {
266 pr_err("MOVE: Bad offset. SEC PC: %d; Instr: %d\n",
268 program->current_instruction);
272 *opt = MOVE_SET_AUX_LS;
273 *offset = dst_offset;
275 *offset = src_offset;
278 if ((dst == MATH0) || (dst == MATH1) ||
279 (dst == MATH2) || (dst == MATH3)) {
280 *opt = MOVE_SET_AUX_MATH_DST;
281 } else if (((dst == OFIFO) || (dst == ALTSOURCE)) &&
283 pr_err("MOVE: Bad offset alignment. SEC PC: %d; Instr: %d\n",
285 program->current_instruction);
289 *offset = src_offset;
295 pr_err("MOVE: Invalid DST. SEC PC: %d; Instr: %d\n",
297 program->current_instruction);
300 if (((dst == IFIFOAB1) || (dst == IFIFOAB2) ||
301 (dst == IFIFO) || (dst == PKA)) &&
302 (src_offset || dst_offset)) {
303 pr_err("MOVE: Offset should be zero. SEC PC: %d; Instr: %d\n",
305 program->current_instruction);
308 *offset = dst_offset;
312 if ((dst == CONTEXT1) || (dst == CONTEXT2)) {
313 *opt = MOVE_SET_AUX_DST;
314 } else if ((dst == MATH0) || (dst == MATH1) ||
315 (dst == MATH2) || (dst == MATH3)) {
316 *opt = MOVE_SET_AUX_MATH_DST;
317 } else if (dst == DESCBUF) {
318 pr_err("MOVE: Invalid DST. SEC PC: %d; Instr: %d\n",
320 program->current_instruction);
322 } else if (((dst == OFIFO) || (dst == ALTSOURCE)) &&
324 pr_err("MOVE: Invalid offset alignment. SEC PC: %d; Instr %d\n",
326 program->current_instruction);
330 *offset = src_offset;
337 if ((dst == OFIFO) || (dst == ALTSOURCE)) {
338 if (src_offset % 4) {
339 pr_err("MOVE: Bad offset alignment. SEC PC: %d; Instr: %d\n",
341 program->current_instruction);
344 *offset = src_offset;
345 } else if ((dst == IFIFOAB1) || (dst == IFIFOAB2) ||
346 (dst == IFIFO) || (dst == PKA)) {
347 *offset = src_offset;
349 *offset = dst_offset;
352 * This condition is basically the negation of:
353 * dst in { CONTEXT[1-2], MATH[0-3] }
355 if ((dst != KEY1) && (dst != KEY2))
356 *opt = MOVE_SET_AUX_MATH_SRC;
366 if ((dst == IFIFOAB1) || (dst == IFIFOAB2) ||
367 (dst == IFIFO) || (dst == PKA) || (dst == ALTSOURCE)) {
368 pr_err("MOVE: Bad DST. SEC PC: %d; Instr: %d\n",
370 program->current_instruction);
374 *opt = MOVE_SET_LEN_16b;
376 if (dst_offset % 4) {
377 pr_err("MOVE: Bad offset alignment. SEC PC: %d; Instr: %d\n",
379 program->current_instruction);
382 *offset = dst_offset;
396 math_offset(uint16_t offset)
406 return MOVE_AUX_LS | MOVE_AUX_MS;
412 #endif /* __RTA_MOVE_CMD_H__ */