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41 #ifndef _FSL_DPSECI_CMD_H
42 #define _FSL_DPSECI_CMD_H
45 #define DPSECI_VER_MAJOR 5
46 #define DPSECI_VER_MINOR 0
49 #define DPSECI_CMDID_CLOSE ((0x800 << 4) | (0x1))
50 #define DPSECI_CMDID_OPEN ((0x809 << 4) | (0x1))
51 #define DPSECI_CMDID_CREATE ((0x909 << 4) | (0x1))
52 #define DPSECI_CMDID_DESTROY ((0x989 << 4) | (0x1))
53 #define DPSECI_CMDID_GET_API_VERSION ((0xa09 << 4) | (0x1))
55 #define DPSECI_CMDID_ENABLE ((0x002 << 4) | (0x1))
56 #define DPSECI_CMDID_DISABLE ((0x003 << 4) | (0x1))
57 #define DPSECI_CMDID_GET_ATTR ((0x004 << 4) | (0x1))
58 #define DPSECI_CMDID_RESET ((0x005 << 4) | (0x1))
59 #define DPSECI_CMDID_IS_ENABLED ((0x006 << 4) | (0x1))
61 #define DPSECI_CMDID_SET_IRQ ((0x010 << 4) | (0x1))
62 #define DPSECI_CMDID_GET_IRQ ((0x011 << 4) | (0x1))
63 #define DPSECI_CMDID_SET_IRQ_ENABLE ((0x012 << 4) | (0x1))
64 #define DPSECI_CMDID_GET_IRQ_ENABLE ((0x013 << 4) | (0x1))
65 #define DPSECI_CMDID_SET_IRQ_MASK ((0x014 << 4) | (0x1))
66 #define DPSECI_CMDID_GET_IRQ_MASK ((0x015 << 4) | (0x1))
67 #define DPSECI_CMDID_GET_IRQ_STATUS ((0x016 << 4) | (0x1))
68 #define DPSECI_CMDID_CLEAR_IRQ_STATUS ((0x017 << 4) | (0x1))
70 #define DPSECI_CMDID_SET_RX_QUEUE ((0x194 << 4) | (0x1))
71 #define DPSECI_CMDID_GET_RX_QUEUE ((0x196 << 4) | (0x1))
72 #define DPSECI_CMDID_GET_TX_QUEUE ((0x197 << 4) | (0x1))
73 #define DPSECI_CMDID_GET_SEC_ATTR ((0x198 << 4) | (0x1))
74 #define DPSECI_CMDID_GET_SEC_COUNTERS ((0x199 << 4) | (0x1))
76 /* cmd, param, offset, width, type, arg_name */
77 #define DPSECI_CMD_OPEN(cmd, dpseci_id) \
78 MC_CMD_OP(cmd, 0, 0, 32, int, dpseci_id)
80 /* cmd, param, offset, width, type, arg_name */
81 #define DPSECI_CMD_CREATE(cmd, cfg) \
83 MC_CMD_OP(cmd, 0, 0, 8, uint8_t, cfg->priorities[0]);\
84 MC_CMD_OP(cmd, 0, 8, 8, uint8_t, cfg->priorities[1]);\
85 MC_CMD_OP(cmd, 0, 16, 8, uint8_t, cfg->priorities[2]);\
86 MC_CMD_OP(cmd, 0, 24, 8, uint8_t, cfg->priorities[3]);\
87 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, cfg->priorities[4]);\
88 MC_CMD_OP(cmd, 0, 40, 8, uint8_t, cfg->priorities[5]);\
89 MC_CMD_OP(cmd, 0, 48, 8, uint8_t, cfg->priorities[6]);\
90 MC_CMD_OP(cmd, 0, 56, 8, uint8_t, cfg->priorities[7]);\
91 MC_CMD_OP(cmd, 1, 0, 8, uint8_t, cfg->num_tx_queues);\
92 MC_CMD_OP(cmd, 1, 8, 8, uint8_t, cfg->num_rx_queues);\
95 /* cmd, param, offset, width, type, arg_name */
96 #define DPSECI_RSP_IS_ENABLED(cmd, en) \
97 MC_RSP_OP(cmd, 0, 0, 1, int, en)
99 /* cmd, param, offset, width, type, arg_name */
100 #define DPSECI_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
102 MC_CMD_OP(cmd, 0, 0, 8, uint8_t, irq_index);\
103 MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
104 MC_CMD_OP(cmd, 1, 0, 64, uint64_t, irq_cfg->addr);\
105 MC_CMD_OP(cmd, 2, 0, 32, int, irq_cfg->irq_num); \
108 /* cmd, param, offset, width, type, arg_name */
109 #define DPSECI_CMD_GET_IRQ(cmd, irq_index) \
110 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
112 /* cmd, param, offset, width, type, arg_name */
113 #define DPSECI_RSP_GET_IRQ(cmd, type, irq_cfg) \
115 MC_RSP_OP(cmd, 0, 0, 32, uint32_t, irq_cfg->val); \
116 MC_RSP_OP(cmd, 1, 0, 64, uint64_t, irq_cfg->addr);\
117 MC_RSP_OP(cmd, 2, 0, 32, int, irq_cfg->irq_num); \
118 MC_RSP_OP(cmd, 2, 32, 32, int, type); \
121 /* cmd, param, offset, width, type, arg_name */
122 #define DPSECI_CMD_SET_IRQ_ENABLE(cmd, irq_index, enable_state) \
124 MC_CMD_OP(cmd, 0, 0, 8, uint8_t, enable_state); \
125 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index); \
128 /* cmd, param, offset, width, type, arg_name */
129 #define DPSECI_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
130 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
132 /* cmd, param, offset, width, type, arg_name */
133 #define DPSECI_RSP_GET_IRQ_ENABLE(cmd, enable_state) \
134 MC_RSP_OP(cmd, 0, 0, 8, uint8_t, enable_state)
136 /* cmd, param, offset, width, type, arg_name */
137 #define DPSECI_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
139 MC_CMD_OP(cmd, 0, 0, 32, uint32_t, mask); \
140 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index); \
143 /* cmd, param, offset, width, type, arg_name */
144 #define DPSECI_CMD_GET_IRQ_MASK(cmd, irq_index) \
145 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
147 /* cmd, param, offset, width, type, arg_name */
148 #define DPSECI_RSP_GET_IRQ_MASK(cmd, mask) \
149 MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mask)
151 /* cmd, param, offset, width, type, arg_name */
152 #define DPSECI_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
154 MC_CMD_OP(cmd, 0, 0, 32, uint32_t, status);\
155 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
158 /* cmd, param, offset, width, type, arg_name */
159 #define DPSECI_RSP_GET_IRQ_STATUS(cmd, status) \
160 MC_RSP_OP(cmd, 0, 0, 32, uint32_t, status)
162 /* cmd, param, offset, width, type, arg_name */
163 #define DPSECI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
165 MC_CMD_OP(cmd, 0, 0, 32, uint32_t, status); \
166 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index); \
169 /* cmd, param, offset, width, type, arg_name */
170 #define DPSECI_RSP_GET_ATTR(cmd, attr) \
172 MC_RSP_OP(cmd, 0, 0, 32, int, attr->id); \
173 MC_RSP_OP(cmd, 1, 0, 8, uint8_t, attr->num_tx_queues); \
174 MC_RSP_OP(cmd, 1, 8, 8, uint8_t, attr->num_rx_queues); \
177 /* cmd, param, offset, width, type, arg_name */
178 #define DPSECI_CMD_SET_RX_QUEUE(cmd, queue, cfg) \
180 MC_CMD_OP(cmd, 0, 0, 32, int, cfg->dest_cfg.dest_id); \
181 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, cfg->dest_cfg.priority); \
182 MC_CMD_OP(cmd, 0, 40, 8, uint8_t, queue); \
183 MC_CMD_OP(cmd, 0, 48, 4, enum dpseci_dest, cfg->dest_cfg.dest_type); \
184 MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->user_ctx); \
185 MC_CMD_OP(cmd, 2, 0, 32, uint32_t, cfg->options);\
186 MC_CMD_OP(cmd, 2, 32, 1, int, cfg->order_preservation_en);\
189 /* cmd, param, offset, width, type, arg_name */
190 #define DPSECI_CMD_GET_RX_QUEUE(cmd, queue) \
191 MC_CMD_OP(cmd, 0, 40, 8, uint8_t, queue)
193 /* cmd, param, offset, width, type, arg_name */
194 #define DPSECI_RSP_GET_RX_QUEUE(cmd, attr) \
196 MC_RSP_OP(cmd, 0, 0, 32, int, attr->dest_cfg.dest_id);\
197 MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->dest_cfg.priority);\
198 MC_RSP_OP(cmd, 0, 48, 4, enum dpseci_dest, attr->dest_cfg.dest_type);\
199 MC_RSP_OP(cmd, 1, 0, 8, uint64_t, attr->user_ctx);\
200 MC_RSP_OP(cmd, 2, 0, 32, uint32_t, attr->fqid);\
201 MC_RSP_OP(cmd, 2, 32, 1, int, attr->order_preservation_en);\
204 /* cmd, param, offset, width, type, arg_name */
205 #define DPSECI_CMD_GET_TX_QUEUE(cmd, queue) \
206 MC_CMD_OP(cmd, 0, 40, 8, uint8_t, queue)
208 /* cmd, param, offset, width, type, arg_name */
209 #define DPSECI_RSP_GET_TX_QUEUE(cmd, attr) \
211 MC_RSP_OP(cmd, 0, 32, 32, uint32_t, attr->fqid);\
212 MC_RSP_OP(cmd, 1, 0, 8, uint8_t, attr->priority);\
215 /* cmd, param, offset, width, type, arg_name */
216 #define DPSECI_RSP_GET_SEC_ATTR(cmd, attr) \
218 MC_RSP_OP(cmd, 0, 0, 16, uint16_t, attr->ip_id);\
219 MC_RSP_OP(cmd, 0, 16, 8, uint8_t, attr->major_rev);\
220 MC_RSP_OP(cmd, 0, 24, 8, uint8_t, attr->minor_rev);\
221 MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->era);\
222 MC_RSP_OP(cmd, 1, 0, 8, uint8_t, attr->deco_num);\
223 MC_RSP_OP(cmd, 1, 8, 8, uint8_t, attr->zuc_auth_acc_num);\
224 MC_RSP_OP(cmd, 1, 16, 8, uint8_t, attr->zuc_enc_acc_num);\
225 MC_RSP_OP(cmd, 1, 32, 8, uint8_t, attr->snow_f8_acc_num);\
226 MC_RSP_OP(cmd, 1, 40, 8, uint8_t, attr->snow_f9_acc_num);\
227 MC_RSP_OP(cmd, 1, 48, 8, uint8_t, attr->crc_acc_num);\
228 MC_RSP_OP(cmd, 2, 0, 8, uint8_t, attr->pk_acc_num);\
229 MC_RSP_OP(cmd, 2, 8, 8, uint8_t, attr->kasumi_acc_num);\
230 MC_RSP_OP(cmd, 2, 16, 8, uint8_t, attr->rng_acc_num);\
231 MC_RSP_OP(cmd, 2, 32, 8, uint8_t, attr->md_acc_num);\
232 MC_RSP_OP(cmd, 2, 40, 8, uint8_t, attr->arc4_acc_num);\
233 MC_RSP_OP(cmd, 2, 48, 8, uint8_t, attr->des_acc_num);\
234 MC_RSP_OP(cmd, 2, 56, 8, uint8_t, attr->aes_acc_num);\
237 /* cmd, param, offset, width, type, arg_name */
238 #define DPSECI_RSP_GET_SEC_COUNTERS(cmd, counters) \
240 MC_RSP_OP(cmd, 0, 0, 64, uint64_t, counters->dequeued_requests);\
241 MC_RSP_OP(cmd, 1, 0, 64, uint64_t, counters->ob_enc_requests);\
242 MC_RSP_OP(cmd, 2, 0, 64, uint64_t, counters->ib_dec_requests);\
243 MC_RSP_OP(cmd, 3, 0, 64, uint64_t, counters->ob_enc_bytes);\
244 MC_RSP_OP(cmd, 4, 0, 64, uint64_t, counters->ob_prot_bytes);\
245 MC_RSP_OP(cmd, 5, 0, 64, uint64_t, counters->ib_dec_bytes);\
246 MC_RSP_OP(cmd, 6, 0, 64, uint64_t, counters->ib_valid_bytes);\
249 /* cmd, param, offset, width, type, arg_name */
250 #define DPSECI_RSP_GET_API_VERSION(cmd, major, minor) \
252 MC_RSP_OP(cmd, 0, 0, 16, uint16_t, major);\
253 MC_RSP_OP(cmd, 0, 16, 16, uint16_t, minor);\
256 #endif /* _FSL_DPSECI_CMD_H */