1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Cavium, Inc
6 #include <rte_bus_pci.h>
7 #include <rte_cryptodev.h>
8 #include <rte_cryptodev_pmd.h>
9 #include <rte_malloc.h>
11 #include "cpt_pmd_logs.h"
12 #include "cpt_pmd_ops_helper.h"
14 #include "otx_cryptodev.h"
15 #include "otx_cryptodev_capabilities.h"
16 #include "otx_cryptodev_hw_access.h"
17 #include "otx_cryptodev_ops.h"
19 static int otx_cryptodev_probe_count;
20 static rte_spinlock_t otx_probe_count_lock = RTE_SPINLOCK_INITIALIZER;
22 static struct rte_mempool *otx_cpt_meta_pool;
23 static int otx_cpt_op_mlen;
24 static int otx_cpt_op_sb_mlen;
27 * Initializes global variables used by fast-path code
30 * - 0 on success, errcode on error
33 init_global_resources(void)
35 /* Get meta len for scatter gather mode */
36 otx_cpt_op_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
38 /* Extra 4B saved for future considerations */
39 otx_cpt_op_mlen += 4 * sizeof(uint64_t);
41 otx_cpt_meta_pool = rte_mempool_create("cpt_metabuf-pool", 4096 * 16,
42 otx_cpt_op_mlen, 512, 0,
43 NULL, NULL, NULL, NULL,
45 if (!otx_cpt_meta_pool) {
46 CPT_LOG_ERR("cpt metabuf pool not created");
50 /* Get meta len for direct mode */
51 otx_cpt_op_sb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
53 /* Extra 4B saved for future considerations */
54 otx_cpt_op_sb_mlen += 4 * sizeof(uint64_t);
60 cleanup_global_resources(void)
63 rte_spinlock_lock(&otx_probe_count_lock);
65 /* Decrement the cryptodev count */
66 otx_cryptodev_probe_count--;
69 if (otx_cpt_meta_pool && otx_cryptodev_probe_count == 0)
70 rte_mempool_free(otx_cpt_meta_pool);
73 rte_spinlock_unlock(&otx_probe_count_lock);
79 otx_cpt_alarm_cb(void *arg)
81 struct cpt_vf *cptvf = arg;
82 otx_cpt_poll_misc(cptvf);
83 rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000,
84 otx_cpt_alarm_cb, cptvf);
88 otx_cpt_periodic_alarm_start(void *arg)
90 return rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000,
91 otx_cpt_alarm_cb, arg);
95 otx_cpt_periodic_alarm_stop(void *arg)
97 return rte_eal_alarm_cancel(otx_cpt_alarm_cb, arg);
103 otx_cpt_dev_config(struct rte_cryptodev *dev __rte_unused,
104 struct rte_cryptodev_config *config __rte_unused)
106 CPT_PMD_INIT_FUNC_TRACE();
111 otx_cpt_dev_start(struct rte_cryptodev *c_dev)
113 void *cptvf = c_dev->data->dev_private;
115 CPT_PMD_INIT_FUNC_TRACE();
117 return otx_cpt_start_device(cptvf);
121 otx_cpt_dev_stop(struct rte_cryptodev *c_dev)
123 void *cptvf = c_dev->data->dev_private;
125 CPT_PMD_INIT_FUNC_TRACE();
127 otx_cpt_stop_device(cptvf);
131 otx_cpt_dev_close(struct rte_cryptodev *c_dev)
133 void *cptvf = c_dev->data->dev_private;
135 CPT_PMD_INIT_FUNC_TRACE();
137 otx_cpt_periodic_alarm_stop(cptvf);
138 otx_cpt_deinit_device(cptvf);
144 otx_cpt_dev_info_get(struct rte_cryptodev *dev, struct rte_cryptodev_info *info)
146 CPT_PMD_INIT_FUNC_TRACE();
148 info->max_nb_queue_pairs = CPT_NUM_QS_PER_VF;
149 info->feature_flags = dev->feature_flags;
150 info->capabilities = otx_get_capabilities();
151 info->sym.max_nb_sessions = 0;
152 info->driver_id = otx_cryptodev_driver_id;
153 info->min_mbuf_headroom_req = OTX_CPT_MIN_HEADROOM_REQ;
154 info->min_mbuf_tailroom_req = OTX_CPT_MIN_TAILROOM_REQ;
159 otx_cpt_stats_get(struct rte_cryptodev *dev __rte_unused,
160 struct rte_cryptodev_stats *stats __rte_unused)
162 CPT_PMD_INIT_FUNC_TRACE();
166 otx_cpt_stats_reset(struct rte_cryptodev *dev __rte_unused)
168 CPT_PMD_INIT_FUNC_TRACE();
171 static struct rte_cryptodev_ops cptvf_ops = {
172 /* Device related operations */
173 .dev_configure = otx_cpt_dev_config,
174 .dev_start = otx_cpt_dev_start,
175 .dev_stop = otx_cpt_dev_stop,
176 .dev_close = otx_cpt_dev_close,
177 .dev_infos_get = otx_cpt_dev_info_get,
179 .stats_get = otx_cpt_stats_get,
180 .stats_reset = otx_cpt_stats_reset,
181 .queue_pair_setup = NULL,
182 .queue_pair_release = NULL,
183 .queue_pair_count = NULL,
185 /* Crypto related operations */
186 .sym_session_get_size = NULL,
187 .sym_session_configure = NULL,
188 .sym_session_clear = NULL
192 otx_cpt_common_vars_init(struct cpt_vf *cptvf)
194 cptvf->meta_info.cptvf_meta_pool = otx_cpt_meta_pool;
195 cptvf->meta_info.cptvf_op_mlen = otx_cpt_op_mlen;
196 cptvf->meta_info.cptvf_op_sb_mlen = otx_cpt_op_sb_mlen;
200 otx_cpt_dev_create(struct rte_cryptodev *c_dev)
202 struct rte_pci_device *pdev = RTE_DEV_TO_PCI(c_dev->device);
203 struct cpt_vf *cptvf = NULL;
208 if (pdev->mem_resource[0].phys_addr == 0ULL)
211 /* for secondary processes, we don't initialise any further as primary
212 * has already done this work.
214 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
217 cptvf = rte_zmalloc_socket("otx_cryptodev_private_mem",
218 sizeof(struct cpt_vf), RTE_CACHE_LINE_SIZE,
222 CPT_LOG_ERR("Cannot allocate memory for device private data");
226 snprintf(dev_name, 32, "%02x:%02x.%x",
227 pdev->addr.bus, pdev->addr.devid, pdev->addr.function);
229 reg_base = pdev->mem_resource[0].addr;
231 CPT_LOG_ERR("Failed to map BAR0 of %s", dev_name);
236 ret = otx_cpt_hw_init(cptvf, pdev, reg_base, dev_name);
238 CPT_LOG_ERR("Failed to init cptvf %s", dev_name);
243 /* Start off timer for mailbox interrupts */
244 otx_cpt_periodic_alarm_start(cptvf);
246 rte_spinlock_lock(&otx_probe_count_lock);
247 if (!otx_cryptodev_probe_count) {
248 ret = init_global_resources();
250 rte_spinlock_unlock(&otx_probe_count_lock);
254 otx_cryptodev_probe_count++;
255 rte_spinlock_unlock(&otx_probe_count_lock);
257 /* Initialize data path variables used by common code */
258 otx_cpt_common_vars_init(cptvf);
260 c_dev->dev_ops = &cptvf_ops;
262 c_dev->enqueue_burst = NULL;
263 c_dev->dequeue_burst = NULL;
265 c_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
266 RTE_CRYPTODEV_FF_HW_ACCELERATED |
267 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
268 RTE_CRYPTODEV_FF_IN_PLACE_SGL |
269 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
270 RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT;
272 /* Save dev private data */
273 c_dev->data->dev_private = cptvf;
278 otx_cpt_periodic_alarm_stop(cptvf);
279 otx_cpt_deinit_device(cptvf);
283 /* Free private data allocated */