1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Cavium, Inc
6 #include <rte_bus_pci.h>
7 #include <rte_cryptodev.h>
8 #include <rte_cryptodev_pmd.h>
9 #include <rte_malloc.h>
11 #include "cpt_pmd_logs.h"
12 #include "cpt_pmd_ops_helper.h"
14 #include "otx_cryptodev.h"
15 #include "otx_cryptodev_capabilities.h"
16 #include "otx_cryptodev_hw_access.h"
17 #include "otx_cryptodev_ops.h"
19 static int otx_cryptodev_probe_count;
20 static rte_spinlock_t otx_probe_count_lock = RTE_SPINLOCK_INITIALIZER;
22 static struct rte_mempool *otx_cpt_meta_pool;
23 static int otx_cpt_op_mlen;
24 static int otx_cpt_op_sb_mlen;
26 /* Forward declarations */
29 otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id);
32 * Initializes global variables used by fast-path code
35 * - 0 on success, errcode on error
38 init_global_resources(void)
40 /* Get meta len for scatter gather mode */
41 otx_cpt_op_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
43 /* Extra 4B saved for future considerations */
44 otx_cpt_op_mlen += 4 * sizeof(uint64_t);
46 otx_cpt_meta_pool = rte_mempool_create("cpt_metabuf-pool", 4096 * 16,
47 otx_cpt_op_mlen, 512, 0,
48 NULL, NULL, NULL, NULL,
50 if (!otx_cpt_meta_pool) {
51 CPT_LOG_ERR("cpt metabuf pool not created");
55 /* Get meta len for direct mode */
56 otx_cpt_op_sb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
58 /* Extra 4B saved for future considerations */
59 otx_cpt_op_sb_mlen += 4 * sizeof(uint64_t);
65 cleanup_global_resources(void)
68 rte_spinlock_lock(&otx_probe_count_lock);
70 /* Decrement the cryptodev count */
71 otx_cryptodev_probe_count--;
74 if (otx_cpt_meta_pool && otx_cryptodev_probe_count == 0)
75 rte_mempool_free(otx_cpt_meta_pool);
78 rte_spinlock_unlock(&otx_probe_count_lock);
84 otx_cpt_alarm_cb(void *arg)
86 struct cpt_vf *cptvf = arg;
87 otx_cpt_poll_misc(cptvf);
88 rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000,
89 otx_cpt_alarm_cb, cptvf);
93 otx_cpt_periodic_alarm_start(void *arg)
95 return rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000,
96 otx_cpt_alarm_cb, arg);
100 otx_cpt_periodic_alarm_stop(void *arg)
102 return rte_eal_alarm_cancel(otx_cpt_alarm_cb, arg);
108 otx_cpt_dev_config(struct rte_cryptodev *dev __rte_unused,
109 struct rte_cryptodev_config *config __rte_unused)
111 CPT_PMD_INIT_FUNC_TRACE();
116 otx_cpt_dev_start(struct rte_cryptodev *c_dev)
118 void *cptvf = c_dev->data->dev_private;
120 CPT_PMD_INIT_FUNC_TRACE();
122 return otx_cpt_start_device(cptvf);
126 otx_cpt_dev_stop(struct rte_cryptodev *c_dev)
128 void *cptvf = c_dev->data->dev_private;
130 CPT_PMD_INIT_FUNC_TRACE();
132 otx_cpt_stop_device(cptvf);
136 otx_cpt_dev_close(struct rte_cryptodev *c_dev)
138 void *cptvf = c_dev->data->dev_private;
141 CPT_PMD_INIT_FUNC_TRACE();
143 for (i = 0; i < c_dev->data->nb_queue_pairs; i++) {
144 ret = otx_cpt_que_pair_release(c_dev, i);
149 otx_cpt_periodic_alarm_stop(cptvf);
150 otx_cpt_deinit_device(cptvf);
156 otx_cpt_dev_info_get(struct rte_cryptodev *dev, struct rte_cryptodev_info *info)
158 CPT_PMD_INIT_FUNC_TRACE();
160 info->max_nb_queue_pairs = CPT_NUM_QS_PER_VF;
161 info->feature_flags = dev->feature_flags;
162 info->capabilities = otx_get_capabilities();
163 info->sym.max_nb_sessions = 0;
164 info->driver_id = otx_cryptodev_driver_id;
165 info->min_mbuf_headroom_req = OTX_CPT_MIN_HEADROOM_REQ;
166 info->min_mbuf_tailroom_req = OTX_CPT_MIN_TAILROOM_REQ;
171 otx_cpt_stats_get(struct rte_cryptodev *dev __rte_unused,
172 struct rte_cryptodev_stats *stats __rte_unused)
174 CPT_PMD_INIT_FUNC_TRACE();
178 otx_cpt_stats_reset(struct rte_cryptodev *dev __rte_unused)
180 CPT_PMD_INIT_FUNC_TRACE();
184 otx_cpt_que_pair_setup(struct rte_cryptodev *dev,
185 uint16_t que_pair_id,
186 const struct rte_cryptodev_qp_conf *qp_conf,
187 int socket_id __rte_unused,
188 struct rte_mempool *session_pool __rte_unused)
190 void *cptvf = dev->data->dev_private;
191 struct cpt_instance *instance = NULL;
192 struct rte_pci_device *pci_dev;
195 CPT_PMD_INIT_FUNC_TRACE();
197 if (dev->data->queue_pairs[que_pair_id] != NULL) {
198 ret = otx_cpt_que_pair_release(dev, que_pair_id);
203 if (qp_conf->nb_descriptors > DEFAULT_CMD_QLEN) {
204 CPT_LOG_INFO("Number of descriptors too big %d, using default "
205 "queue length of %d", qp_conf->nb_descriptors,
209 pci_dev = RTE_DEV_TO_PCI(dev->device);
211 if (pci_dev->mem_resource[0].addr == NULL) {
212 CPT_LOG_ERR("PCI mem address null");
216 ret = otx_cpt_get_resource(cptvf, 0, &instance);
218 CPT_LOG_ERR("Error getting instance handle from device %s : "
219 "ret = %d", dev->data->name, ret);
223 instance->queue_id = que_pair_id;
224 dev->data->queue_pairs[que_pair_id] = instance;
230 otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id)
232 struct cpt_instance *instance = dev->data->queue_pairs[que_pair_id];
235 CPT_PMD_INIT_FUNC_TRACE();
237 ret = otx_cpt_put_resource(instance);
239 CPT_LOG_ERR("Error putting instance handle of device %s : "
240 "ret = %d", dev->data->name, ret);
244 dev->data->queue_pairs[que_pair_id] = NULL;
249 static struct rte_cryptodev_ops cptvf_ops = {
250 /* Device related operations */
251 .dev_configure = otx_cpt_dev_config,
252 .dev_start = otx_cpt_dev_start,
253 .dev_stop = otx_cpt_dev_stop,
254 .dev_close = otx_cpt_dev_close,
255 .dev_infos_get = otx_cpt_dev_info_get,
257 .stats_get = otx_cpt_stats_get,
258 .stats_reset = otx_cpt_stats_reset,
259 .queue_pair_setup = otx_cpt_que_pair_setup,
260 .queue_pair_release = otx_cpt_que_pair_release,
261 .queue_pair_count = NULL,
263 /* Crypto related operations */
264 .sym_session_get_size = NULL,
265 .sym_session_configure = NULL,
266 .sym_session_clear = NULL
270 otx_cpt_common_vars_init(struct cpt_vf *cptvf)
272 cptvf->meta_info.cptvf_meta_pool = otx_cpt_meta_pool;
273 cptvf->meta_info.cptvf_op_mlen = otx_cpt_op_mlen;
274 cptvf->meta_info.cptvf_op_sb_mlen = otx_cpt_op_sb_mlen;
278 otx_cpt_dev_create(struct rte_cryptodev *c_dev)
280 struct rte_pci_device *pdev = RTE_DEV_TO_PCI(c_dev->device);
281 struct cpt_vf *cptvf = NULL;
286 if (pdev->mem_resource[0].phys_addr == 0ULL)
289 /* for secondary processes, we don't initialise any further as primary
290 * has already done this work.
292 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
295 cptvf = rte_zmalloc_socket("otx_cryptodev_private_mem",
296 sizeof(struct cpt_vf), RTE_CACHE_LINE_SIZE,
300 CPT_LOG_ERR("Cannot allocate memory for device private data");
304 snprintf(dev_name, 32, "%02x:%02x.%x",
305 pdev->addr.bus, pdev->addr.devid, pdev->addr.function);
307 reg_base = pdev->mem_resource[0].addr;
309 CPT_LOG_ERR("Failed to map BAR0 of %s", dev_name);
314 ret = otx_cpt_hw_init(cptvf, pdev, reg_base, dev_name);
316 CPT_LOG_ERR("Failed to init cptvf %s", dev_name);
321 /* Start off timer for mailbox interrupts */
322 otx_cpt_periodic_alarm_start(cptvf);
324 rte_spinlock_lock(&otx_probe_count_lock);
325 if (!otx_cryptodev_probe_count) {
326 ret = init_global_resources();
328 rte_spinlock_unlock(&otx_probe_count_lock);
332 otx_cryptodev_probe_count++;
333 rte_spinlock_unlock(&otx_probe_count_lock);
335 /* Initialize data path variables used by common code */
336 otx_cpt_common_vars_init(cptvf);
338 c_dev->dev_ops = &cptvf_ops;
340 c_dev->enqueue_burst = NULL;
341 c_dev->dequeue_burst = NULL;
343 c_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
344 RTE_CRYPTODEV_FF_HW_ACCELERATED |
345 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
346 RTE_CRYPTODEV_FF_IN_PLACE_SGL |
347 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
348 RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT;
350 /* Save dev private data */
351 c_dev->data->dev_private = cptvf;
356 otx_cpt_periodic_alarm_stop(cptvf);
357 otx_cpt_deinit_device(cptvf);
361 /* Free private data allocated */