drivers/crypto/octeontx2/otx2_cryptodev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <rte_bus_pci.h>
   6 #include <rte_common.h>
   7 #include <rte_crypto.h>
   8 #include <rte_cryptodev.h>
   9 #include <rte_cryptodev_pmd.h>
  10 #include <rte_dev.h>
  11 #include <rte_errno.h>
  12 #include <rte_mempool.h>
  13 #include <rte_pci.h>
  14
  15 #include "otx2_common.h"
  16 #include "otx2_cryptodev.h"
  17 #include "otx2_cryptodev_mbox.h"
  18 #include "otx2_cryptodev_ops.h"
  19 #include "otx2_dev.h"
  20
  21 /* CPT common headers */
  22 #include "cpt_common.h"
  23 #include "cpt_pmd_logs.h"
  24
  25 int otx2_cpt_logtype;
  26
  27 static struct rte_pci_id pci_id_cpt_table[] = {
  28         {
  29                 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
  30                                PCI_DEVID_OCTEONTX2_RVU_CPT_VF)
  31         },
  32         /* sentinel */
  33         {
  34                 .device_id = 0
  35         },
  36 };
  37
  38 static int
  39 otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
  40                    struct rte_pci_device *pci_dev)
  41 {
  42         struct rte_cryptodev_pmd_init_params init_params = {
  43                 .name = "",
  44                 .socket_id = rte_socket_id(),
  45                 .private_data_size = sizeof(struct otx2_cpt_vf)
  46         };
  47         char name[RTE_CRYPTODEV_NAME_MAX_LEN];
  48         struct rte_cryptodev *dev;
  49         struct otx2_dev *otx2_dev;
  50         struct otx2_cpt_vf *vf;
  51         uint16_t nb_queues;
  52         int ret;
  53
  54         rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
  55
  56         dev = rte_cryptodev_pmd_create(name, &pci_dev->device, &init_params);
  57         if (dev == NULL) {
  58                 ret = -ENODEV;
  59                 goto exit;
  60         }
  61
  62         dev->dev_ops = &otx2_cpt_ops;
  63
  64         dev->driver_id = otx2_cryptodev_driver_id;
  65
  66         /* Get private data space allocated */
  67         vf = dev->data->dev_private;
  68
  69         otx2_dev = &vf->otx2_dev;
  70
  71         /* Initialize the base otx2_dev object */
  72         ret = otx2_dev_init(pci_dev, otx2_dev);
  73         if (ret) {
  74                 CPT_LOG_ERR("Could not initialize otx2_dev");
  75                 goto pmd_destroy;
  76         }
  77
  78         /* Get number of queues available on the device */
  79         ret = otx2_cpt_available_queues_get(dev, &nb_queues);
  80         if (ret) {
  81                 CPT_LOG_ERR("Could not determine the number of queues available");
  82                 goto otx2_dev_fini;
  83         }
  84
  85         /* Don't exceed the limits set per VF */
  86         nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
  87
  88         if (nb_queues == 0) {
  89                 CPT_LOG_ERR("No free queues available on the device");
  90                 goto otx2_dev_fini;
  91         }
  92
  93         vf->max_queues = nb_queues;
  94
  95         CPT_LOG_INFO("Max queues supported by device: %d", vf->max_queues);
  96
  97         dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
  98                              RTE_CRYPTODEV_FF_HW_ACCELERATED |
  99                              RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
 100                              RTE_CRYPTODEV_FF_IN_PLACE_SGL |
 101                              RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
 102                              RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
 103                              RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
 104                              RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT;
 105
 106         return 0;
 107
 108 otx2_dev_fini:
 109         otx2_dev_fini(pci_dev, otx2_dev);
 110 pmd_destroy:
 111         rte_cryptodev_pmd_destroy(dev);
 112 exit:
 113         CPT_LOG_ERR("Could not create device (vendor_id: 0x%x device_id: 0x%x)",
 114                     pci_dev->id.vendor_id, pci_dev->id.device_id);
 115         return ret;
 116 }
 117
 118 static int
 119 otx2_cpt_pci_remove(struct rte_pci_device *pci_dev)
 120 {
 121         char name[RTE_CRYPTODEV_NAME_MAX_LEN];
 122         struct rte_cryptodev *dev;
 123
 124         if (pci_dev == NULL)
 125                 return -EINVAL;
 126
 127         rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
 128
 129         dev = rte_cryptodev_pmd_get_named_dev(name);
 130         if (dev == NULL)
 131                 return -ENODEV;
 132
 133         return rte_cryptodev_pmd_destroy(dev);
 134 }
 135
 136 static struct rte_pci_driver otx2_cryptodev_pmd = {
 137         .id_table = pci_id_cpt_table,
 138         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
 139         .probe = otx2_cpt_pci_probe,
 140         .remove = otx2_cpt_pci_remove,
 141 };
 142
 143 static struct cryptodev_driver otx2_cryptodev_drv;
 144
 145 RTE_INIT(otx2_cpt_init_log);
 146 RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_OCTEONTX2_PMD, otx2_cryptodev_pmd);
 147 RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_OCTEONTX2_PMD, pci_id_cpt_table);
 148 RTE_PMD_REGISTER_CRYPTO_DRIVER(otx2_cryptodev_drv, otx2_cryptodev_pmd.driver,
 149                 otx2_cryptodev_driver_id);
 150
 151 RTE_INIT(otx2_cpt_init_log)
 152 {
 153         /* Bus level logs */
 154         otx2_cpt_logtype = rte_log_register("pmd.crypto.octeontx2");
 155         if (otx2_cpt_logtype >= 0)
 156                 rte_log_set_level(otx2_cpt_logtype, RTE_LOG_NOTICE);
 157 }