1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (C) 2019 Marvell International Ltd.
5 #include <rte_bus_pci.h>
6 #include <rte_common.h>
7 #include <rte_crypto.h>
8 #include <rte_cryptodev.h>
9 #include <rte_cryptodev_pmd.h>
11 #include <rte_errno.h>
12 #include <rte_mempool.h>
15 #include "otx2_common.h"
16 #include "otx2_cryptodev.h"
17 #include "otx2_cryptodev_capabilities.h"
18 #include "otx2_cryptodev_mbox.h"
19 #include "otx2_cryptodev_ops.h"
22 /* CPT common headers */
23 #include "cpt_common.h"
24 #include "cpt_pmd_logs.h"
26 uint8_t otx2_cryptodev_driver_id;
28 static struct rte_pci_id pci_id_cpt_table[] = {
30 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
31 PCI_DEVID_OCTEONTX2_RVU_CPT_VF)
40 otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
41 struct rte_pci_device *pci_dev)
43 struct rte_cryptodev_pmd_init_params init_params = {
45 .socket_id = rte_socket_id(),
46 .private_data_size = sizeof(struct otx2_cpt_vf)
48 char name[RTE_CRYPTODEV_NAME_MAX_LEN];
49 struct rte_cryptodev *dev;
50 struct otx2_dev *otx2_dev;
51 struct otx2_cpt_vf *vf;
55 rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
57 dev = rte_cryptodev_pmd_create(name, &pci_dev->device, &init_params);
63 dev->dev_ops = &otx2_cpt_ops;
65 dev->driver_id = otx2_cryptodev_driver_id;
67 /* Get private data space allocated */
68 vf = dev->data->dev_private;
70 otx2_dev = &vf->otx2_dev;
72 /* Initialize the base otx2_dev object */
73 ret = otx2_dev_init(pci_dev, otx2_dev);
75 CPT_LOG_ERR("Could not initialize otx2_dev");
79 /* Get number of queues available on the device */
80 ret = otx2_cpt_available_queues_get(dev, &nb_queues);
82 CPT_LOG_ERR("Could not determine the number of queues available");
86 /* Don't exceed the limits set per VF */
87 nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
90 CPT_LOG_ERR("No free queues available on the device");
94 vf->max_queues = nb_queues;
96 CPT_LOG_INFO("Max queues supported by device: %d", vf->max_queues);
98 ret = otx2_cpt_hardware_caps_get(dev, vf->hw_caps);
100 CPT_LOG_ERR("Could not determine hardware capabilities");
104 otx2_crypto_capabilities_init(vf->hw_caps);
106 dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
107 RTE_CRYPTODEV_FF_HW_ACCELERATED |
108 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
109 RTE_CRYPTODEV_FF_IN_PLACE_SGL |
110 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
111 RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
112 RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
113 RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
114 RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
119 otx2_dev_fini(pci_dev, otx2_dev);
121 rte_cryptodev_pmd_destroy(dev);
123 CPT_LOG_ERR("Could not create device (vendor_id: 0x%x device_id: 0x%x)",
124 pci_dev->id.vendor_id, pci_dev->id.device_id);
129 otx2_cpt_pci_remove(struct rte_pci_device *pci_dev)
131 char name[RTE_CRYPTODEV_NAME_MAX_LEN];
132 struct rte_cryptodev *dev;
137 rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
139 dev = rte_cryptodev_pmd_get_named_dev(name);
143 return rte_cryptodev_pmd_destroy(dev);
146 static struct rte_pci_driver otx2_cryptodev_pmd = {
147 .id_table = pci_id_cpt_table,
148 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
149 .probe = otx2_cpt_pci_probe,
150 .remove = otx2_cpt_pci_remove,
153 static struct cryptodev_driver otx2_cryptodev_drv;
155 RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_OCTEONTX2_PMD, otx2_cryptodev_pmd);
156 RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_OCTEONTX2_PMD, pci_id_cpt_table);
157 RTE_PMD_REGISTER_KMOD_DEP(CRYPTODEV_NAME_OCTEONTX2_PMD, "vfio-pci");
158 RTE_PMD_REGISTER_CRYPTO_DRIVER(otx2_cryptodev_drv, otx2_cryptodev_pmd.driver,
159 otx2_cryptodev_driver_id);
160 RTE_LOG_REGISTER(otx2_cpt_logtype, pmd.crypto.octeontx2, NOTICE);