drivers/crypto/octeontx2/otx2_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <unistd.h>
   6
   7 #include <rte_cryptodev_pmd.h>
   8 #include <rte_errno.h>
   9 #include <rte_ethdev.h>
  10 #include <rte_event_crypto_adapter.h>
  11
  12 #include "otx2_cryptodev.h"
  13 #include "otx2_cryptodev_capabilities.h"
  14 #include "otx2_cryptodev_hw_access.h"
  15 #include "otx2_cryptodev_mbox.h"
  16 #include "otx2_cryptodev_ops.h"
  17 #include "otx2_cryptodev_ops_helper.h"
  18 #include "otx2_ipsec_anti_replay.h"
  19 #include "otx2_ipsec_po_ops.h"
  20 #include "otx2_mbox.h"
  21 #include "otx2_sec_idev.h"
  22 #include "otx2_security.h"
  23
  24 #include "cpt_hw_types.h"
  25 #include "cpt_pmd_logs.h"
  26 #include "cpt_pmd_ops_helper.h"
  27 #include "cpt_ucode.h"
  28 #include "cpt_ucode_asym.h"
  29
  30 #define METABUF_POOL_CACHE_SIZE 512
  31
  32 static uint64_t otx2_fpm_iova[CPT_EC_ID_PMAX];
  33
  34 /* Forward declarations */
  35
  36 static int
  37 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
  38
  39 static void
  40 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
  41 {
  42         snprintf(name, size, "otx2_cpt_lf_mem_%u:%u", dev_id, qp_id);
  43 }
  44
  45 static int
  46 otx2_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
  47                                 struct otx2_cpt_qp *qp, uint8_t qp_id,
  48                                 int nb_elements)
  49 {
  50         char mempool_name[RTE_MEMPOOL_NAMESIZE];
  51         struct cpt_qp_meta_info *meta_info;
  52         struct rte_mempool *pool;
  53         int ret, max_mlen;
  54         int asym_mlen = 0;
  55         int lb_mlen = 0;
  56         int sg_mlen = 0;
  57
  58         if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
  59
  60                 /* Get meta len for scatter gather mode */
  61                 sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
  62
  63                 /* Extra 32B saved for future considerations */
  64                 sg_mlen += 4 * sizeof(uint64_t);
  65
  66                 /* Get meta len for linear buffer (direct) mode */
  67                 lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
  68
  69                 /* Extra 32B saved for future considerations */
  70                 lb_mlen += 4 * sizeof(uint64_t);
  71         }
  72
  73         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
  74
  75                 /* Get meta len required for asymmetric operations */
  76                 asym_mlen = cpt_pmd_ops_helper_asym_get_mlen();
  77         }
  78
  79         /*
  80          * Check max requirement for meta buffer to
  81          * support crypto op of any type (sym/asym).
  82          */
  83         max_mlen = RTE_MAX(RTE_MAX(lb_mlen, sg_mlen), asym_mlen);
  84
  85         /* Allocate mempool */
  86
  87         snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "otx2_cpt_mb_%u:%u",
  88                  dev->data->dev_id, qp_id);
  89
  90         pool = rte_mempool_create_empty(mempool_name, nb_elements, max_mlen,
  91                                         METABUF_POOL_CACHE_SIZE, 0,
  92                                         rte_socket_id(), 0);
  93
  94         if (pool == NULL) {
  95                 CPT_LOG_ERR("Could not create mempool for metabuf");
  96                 return rte_errno;
  97         }
  98
  99         ret = rte_mempool_set_ops_byname(pool, RTE_MBUF_DEFAULT_MEMPOOL_OPS,
 100                                          NULL);
 101         if (ret) {
 102                 CPT_LOG_ERR("Could not set mempool ops");
 103                 goto mempool_free;
 104         }
 105
 106         ret = rte_mempool_populate_default(pool);
 107         if (ret <= 0) {
 108                 CPT_LOG_ERR("Could not populate metabuf pool");
 109                 goto mempool_free;
 110         }
 111
 112         meta_info = &qp->meta_info;
 113
 114         meta_info->pool = pool;
 115         meta_info->lb_mlen = lb_mlen;
 116         meta_info->sg_mlen = sg_mlen;
 117
 118         return 0;
 119
 120 mempool_free:
 121         rte_mempool_free(pool);
 122         return ret;
 123 }
 124
 125 static void
 126 otx2_cpt_metabuf_mempool_destroy(struct otx2_cpt_qp *qp)
 127 {
 128         struct cpt_qp_meta_info *meta_info = &qp->meta_info;
 129
 130         rte_mempool_free(meta_info->pool);
 131
 132         meta_info->pool = NULL;
 133         meta_info->lb_mlen = 0;
 134         meta_info->sg_mlen = 0;
 135 }
 136
 137 static int
 138 otx2_cpt_qp_inline_cfg(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 139 {
 140         static rte_atomic16_t port_offset = RTE_ATOMIC16_INIT(-1);
 141         uint16_t port_id, nb_ethport = rte_eth_dev_count_avail();
 142         int i, ret;
 143
 144         for (i = 0; i < nb_ethport; i++) {
 145                 port_id = rte_atomic16_add_return(&port_offset, 1) % nb_ethport;
 146                 if (otx2_eth_dev_is_sec_capable(&rte_eth_devices[port_id]))
 147                         break;
 148         }
 149
 150         if (i >= nb_ethport)
 151                 return 0;
 152
 153         ret = otx2_cpt_qp_ethdev_bind(dev, qp, port_id);
 154         if (ret)
 155                 return ret;
 156
 157         /* Publish inline Tx QP to eth dev security */
 158         ret = otx2_sec_idev_tx_cpt_qp_add(port_id, qp);
 159         if (ret)
 160                 return ret;
 161
 162         return 0;
 163 }
 164
 165 static struct otx2_cpt_qp *
 166 otx2_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
 167                    uint8_t group)
 168 {
 169         struct otx2_cpt_vf *vf = dev->data->dev_private;
 170         uint64_t pg_sz = sysconf(_SC_PAGESIZE);
 171         const struct rte_memzone *lf_mem;
 172         uint32_t len, iq_len, size_div40;
 173         char name[RTE_MEMZONE_NAMESIZE];
 174         uint64_t used_len, iova;
 175         struct otx2_cpt_qp *qp;
 176         uint64_t lmtline;
 177         uint8_t *va;
 178         int ret;
 179
 180         /* Allocate queue pair */
 181         qp = rte_zmalloc_socket("OCTEON TX2 Crypto PMD Queue Pair", sizeof(*qp),
 182                                 OTX2_ALIGN, 0);
 183         if (qp == NULL) {
 184                 CPT_LOG_ERR("Could not allocate queue pair");
 185                 return NULL;
 186         }
 187
 188         iq_len = OTX2_CPT_IQ_LEN;
 189
 190         /*
 191          * Queue size must be a multiple of 40 and effective queue size to
 192          * software is (size_div40 - 1) * 40
 193          */
 194         size_div40 = (iq_len + 40 - 1) / 40 + 1;
 195
 196         /* For pending queue */
 197         len = iq_len * sizeof(uintptr_t);
 198
 199         /* Space for instruction group memory */
 200         len += size_div40 * 16;
 201
 202         /* So that instruction queues start as pg size aligned */
 203         len = RTE_ALIGN(len, pg_sz);
 204
 205         /* For instruction queues */
 206         len += OTX2_CPT_IQ_LEN * sizeof(union cpt_inst_s);
 207
 208         /* Wastage after instruction queues */
 209         len = RTE_ALIGN(len, pg_sz);
 210
 211         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 212                             qp_id);
 213
 214         lf_mem = rte_memzone_reserve_aligned(name, len, vf->otx2_dev.node,
 215                         RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
 216                         RTE_CACHE_LINE_SIZE);
 217         if (lf_mem == NULL) {
 218                 CPT_LOG_ERR("Could not allocate reserved memzone");
 219                 goto qp_free;
 220         }
 221
 222         va = lf_mem->addr;
 223         iova = lf_mem->iova;
 224
 225         memset(va, 0, len);
 226
 227         ret = otx2_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
 228         if (ret) {
 229                 CPT_LOG_ERR("Could not create mempool for metabuf");
 230                 goto lf_mem_free;
 231         }
 232
 233         /* Initialize pending queue */
 234         qp->pend_q.req_queue = (uintptr_t *)va;
 235         qp->pend_q.enq_tail = 0;
 236         qp->pend_q.deq_head = 0;
 237         qp->pend_q.pending_count = 0;
 238
 239         used_len = iq_len * sizeof(uintptr_t);
 240         used_len += size_div40 * 16;
 241         used_len = RTE_ALIGN(used_len, pg_sz);
 242         iova += used_len;
 243
 244         qp->iq_dma_addr = iova;
 245         qp->id = qp_id;
 246         qp->blkaddr = vf->lf_blkaddr[qp_id];
 247         qp->base = OTX2_CPT_LF_BAR2(vf, qp->blkaddr, qp_id);
 248
 249         lmtline = vf->otx2_dev.bar2 +
 250                   (RVU_BLOCK_ADDR_LMT << 20 | qp_id << 12) +
 251                   OTX2_LMT_LF_LMTLINE(0);
 252
 253         qp->lmtline = (void *)lmtline;
 254
 255         qp->lf_nq_reg = qp->base + OTX2_CPT_LF_NQ(0);
 256
 257         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 258         if (ret && (ret != -ENOENT)) {
 259                 CPT_LOG_ERR("Could not delete inline configuration");
 260                 goto mempool_destroy;
 261         }
 262
 263         otx2_cpt_iq_disable(qp);
 264
 265         ret = otx2_cpt_qp_inline_cfg(dev, qp);
 266         if (ret) {
 267                 CPT_LOG_ERR("Could not configure queue for inline IPsec");
 268                 goto mempool_destroy;
 269         }
 270
 271         ret = otx2_cpt_iq_enable(dev, qp, group, OTX2_CPT_QUEUE_HI_PRIO,
 272                                  size_div40);
 273         if (ret) {
 274                 CPT_LOG_ERR("Could not enable instruction queue");
 275                 goto mempool_destroy;
 276         }
 277
 278         return qp;
 279
 280 mempool_destroy:
 281         otx2_cpt_metabuf_mempool_destroy(qp);
 282 lf_mem_free:
 283         rte_memzone_free(lf_mem);
 284 qp_free:
 285         rte_free(qp);
 286         return NULL;
 287 }
 288
 289 static int
 290 otx2_cpt_qp_destroy(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 291 {
 292         const struct rte_memzone *lf_mem;
 293         char name[RTE_MEMZONE_NAMESIZE];
 294         int ret;
 295
 296         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 297         if (ret && (ret != -ENOENT)) {
 298                 CPT_LOG_ERR("Could not delete inline configuration");
 299                 return ret;
 300         }
 301
 302         otx2_cpt_iq_disable(qp);
 303
 304         otx2_cpt_metabuf_mempool_destroy(qp);
 305
 306         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 307                             qp->id);
 308
 309         lf_mem = rte_memzone_lookup(name);
 310
 311         ret = rte_memzone_free(lf_mem);
 312         if (ret)
 313                 return ret;
 314
 315         rte_free(qp);
 316
 317         return 0;
 318 }
 319
 320 static int
 321 sym_xform_verify(struct rte_crypto_sym_xform *xform)
 322 {
 323         if (xform->next) {
 324                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 325                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 326                     xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT &&
 327                     (xform->auth.algo != RTE_CRYPTO_AUTH_SHA1_HMAC ||
 328                      xform->next->cipher.algo != RTE_CRYPTO_CIPHER_AES_CBC))
 329                         return -ENOTSUP;
 330
 331                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 332                     xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT &&
 333                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 334                     (xform->cipher.algo != RTE_CRYPTO_CIPHER_AES_CBC ||
 335                      xform->next->auth.algo != RTE_CRYPTO_AUTH_SHA1_HMAC))
 336                         return -ENOTSUP;
 337
 338                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 339                     xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
 340                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 341                     xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)
 342                         return -ENOTSUP;
 343
 344                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 345                     xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&
 346                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 347                     xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)
 348                         return -ENOTSUP;
 349
 350         } else {
 351                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 352                     xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&
 353                     xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
 354                         return -ENOTSUP;
 355         }
 356         return 0;
 357 }
 358
 359 static int
 360 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 361                       struct rte_cryptodev_sym_session *sess,
 362                       struct rte_mempool *pool)
 363 {
 364         struct rte_crypto_sym_xform *temp_xform = xform;
 365         struct cpt_sess_misc *misc;
 366         vq_cmd_word3_t vq_cmd_w3;
 367         void *priv;
 368         int ret;
 369
 370         ret = sym_xform_verify(xform);
 371         if (unlikely(ret))
 372                 return ret;
 373
 374         if (unlikely(rte_mempool_get(pool, &priv))) {
 375                 CPT_LOG_ERR("Could not allocate session private data");
 376                 return -ENOMEM;
 377         }
 378
 379         memset(priv, 0, sizeof(struct cpt_sess_misc) +
 380                         offsetof(struct cpt_ctx, mc_ctx));
 381
 382         misc = priv;
 383
 384         for ( ; xform != NULL; xform = xform->next) {
 385                 switch (xform->type) {
 386                 case RTE_CRYPTO_SYM_XFORM_AEAD:
 387                         ret = fill_sess_aead(xform, misc);
 388                         break;
 389                 case RTE_CRYPTO_SYM_XFORM_CIPHER:
 390                         ret = fill_sess_cipher(xform, misc);
 391                         break;
 392                 case RTE_CRYPTO_SYM_XFORM_AUTH:
 393                         if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
 394                                 ret = fill_sess_gmac(xform, misc);
 395                         else
 396                                 ret = fill_sess_auth(xform, misc);
 397                         break;
 398                 default:
 399                         ret = -1;
 400                 }
 401
 402                 if (ret)
 403                         goto priv_put;
 404         }
 405
 406         if ((GET_SESS_FC_TYPE(misc) == HASH_HMAC) &&
 407                         cpt_mac_len_verify(&temp_xform->auth)) {
 408                 CPT_LOG_ERR("MAC length is not supported");
 409                 ret = -ENOTSUP;
 410                 goto priv_put;
 411         }
 412
 413         set_sym_session_private_data(sess, driver_id, misc);
 414
 415         misc->ctx_dma_addr = rte_mempool_virt2iova(misc) +
 416                              sizeof(struct cpt_sess_misc);
 417
 418         vq_cmd_w3.u64 = 0;
 419         vq_cmd_w3.s.cptr = misc->ctx_dma_addr + offsetof(struct cpt_ctx,
 420                                                          mc_ctx);
 421
 422         /*
 423          * IE engines support IPsec operations
 424          * SE engines support IPsec operations, Chacha-Poly and
 425          * Air-Crypto operations
 426          */
 427         if (misc->zsk_flag || misc->chacha_poly)
 428                 vq_cmd_w3.s.grp = OTX2_CPT_EGRP_SE;
 429         else
 430                 vq_cmd_w3.s.grp = OTX2_CPT_EGRP_SE_IE;
 431
 432         misc->cpt_inst_w7 = vq_cmd_w3.u64;
 433
 434         return 0;
 435
 436 priv_put:
 437         rte_mempool_put(pool, priv);
 438
 439         return -ENOTSUP;
 440 }
 441
 442 static __rte_always_inline int32_t __rte_hot
 443 otx2_ca_enqueue_req(const struct otx2_cpt_qp *qp,
 444                     struct cpt_request_info *req,
 445                     void *lmtline,
 446                     struct rte_crypto_op *op,
 447                     uint64_t cpt_inst_w7)
 448 {
 449         union rte_event_crypto_metadata *m_data;
 450         union cpt_inst_s inst;
 451         uint64_t lmt_status;
 452
 453         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
 454                 m_data = rte_cryptodev_sym_session_get_user_data(
 455                                                 op->sym->session);
 456                 if (m_data == NULL) {
 457                         rte_pktmbuf_free(op->sym->m_src);
 458                         rte_crypto_op_free(op);
 459                         rte_errno = EINVAL;
 460                         return -EINVAL;
 461                 }
 462         } else if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS &&
 463                    op->private_data_offset) {
 464                 m_data = (union rte_event_crypto_metadata *)
 465                          ((uint8_t *)op +
 466                           op->private_data_offset);
 467         } else {
 468                 return -EINVAL;
 469         }
 470
 471         inst.u[0] = 0;
 472         inst.s9x.res_addr = req->comp_baddr;
 473         inst.u[2] = 0;
 474         inst.u[3] = 0;
 475
 476         inst.s9x.ei0 = req->ist.ei0;
 477         inst.s9x.ei1 = req->ist.ei1;
 478         inst.s9x.ei2 = req->ist.ei2;
 479         inst.s9x.ei3 = cpt_inst_w7;
 480
 481         inst.u[2] = (((RTE_EVENT_TYPE_CRYPTODEV << 28) |
 482                       m_data->response_info.flow_id) |
 483                      ((uint64_t)m_data->response_info.sched_type << 32) |
 484                      ((uint64_t)m_data->response_info.queue_id << 34));
 485         inst.u[3] = 1 | (((uint64_t)req >> 3) << 3);
 486         req->qp = qp;
 487
 488         do {
 489                 /* Copy CPT command to LMTLINE */
 490                 memcpy(lmtline, &inst, sizeof(inst));
 491
 492                 /*
 493                  * Make sure compiler does not reorder memcpy and ldeor.
 494                  * LMTST transactions are always flushed from the write
 495                  * buffer immediately, a DMB is not required to push out
 496                  * LMTSTs.
 497                  */
 498                 rte_io_wmb();
 499                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 500         } while (lmt_status == 0);
 501
 502         return 0;
 503 }
 504
 505 static __rte_always_inline int32_t __rte_hot
 506 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 507                      struct pending_queue *pend_q,
 508                      struct cpt_request_info *req,
 509                      struct rte_crypto_op *op,
 510                      uint64_t cpt_inst_w7)
 511 {
 512         void *lmtline = qp->lmtline;
 513         union cpt_inst_s inst;
 514         uint64_t lmt_status;
 515
 516         if (qp->ca_enable)
 517                 return otx2_ca_enqueue_req(qp, req, lmtline, op, cpt_inst_w7);
 518
 519         if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 520                 return -EAGAIN;
 521
 522         inst.u[0] = 0;
 523         inst.s9x.res_addr = req->comp_baddr;
 524         inst.u[2] = 0;
 525         inst.u[3] = 0;
 526
 527         inst.s9x.ei0 = req->ist.ei0;
 528         inst.s9x.ei1 = req->ist.ei1;
 529         inst.s9x.ei2 = req->ist.ei2;
 530         inst.s9x.ei3 = cpt_inst_w7;
 531
 532         req->time_out = rte_get_timer_cycles() +
 533                         DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 534
 535         do {
 536                 /* Copy CPT command to LMTLINE */
 537                 memcpy(lmtline, &inst, sizeof(inst));
 538
 539                 /*
 540                  * Make sure compiler does not reorder memcpy and ldeor.
 541                  * LMTST transactions are always flushed from the write
 542                  * buffer immediately, a DMB is not required to push out
 543                  * LMTSTs.
 544                  */
 545                 rte_io_wmb();
 546                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 547         } while (lmt_status == 0);
 548
 549         pend_q->req_queue[pend_q->enq_tail] = (uintptr_t)req;
 550
 551         /* We will use soft queue length here to limit requests */
 552         MOD_INC(pend_q->enq_tail, OTX2_CPT_DEFAULT_CMD_QLEN);
 553         pend_q->pending_count += 1;
 554
 555         return 0;
 556 }
 557
 558 static __rte_always_inline int32_t __rte_hot
 559 otx2_cpt_enqueue_asym(struct otx2_cpt_qp *qp,
 560                       struct rte_crypto_op *op,
 561                       struct pending_queue *pend_q)
 562 {
 563         struct cpt_qp_meta_info *minfo = &qp->meta_info;
 564         struct rte_crypto_asym_op *asym_op = op->asym;
 565         struct asym_op_params params = {0};
 566         struct cpt_asym_sess_misc *sess;
 567         uintptr_t *cop;
 568         void *mdata;
 569         int ret;
 570
 571         if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) {
 572                 CPT_LOG_ERR("Could not allocate meta buffer for request");
 573                 return -ENOMEM;
 574         }
 575
 576         sess = get_asym_session_private_data(asym_op->session,
 577                                              otx2_cryptodev_driver_id);
 578
 579         /* Store IO address of the mdata to meta_buf */
 580         params.meta_buf = rte_mempool_virt2iova(mdata);
 581
 582         cop = mdata;
 583         cop[0] = (uintptr_t)mdata;
 584         cop[1] = (uintptr_t)op;
 585         cop[2] = cop[3] = 0ULL;
 586
 587         params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t));
 588         params.req->op = cop;
 589
 590         /* Adjust meta_buf to point to end of cpt_request_info structure */
 591         params.meta_buf += (4 * sizeof(uintptr_t)) +
 592                             sizeof(struct cpt_request_info);
 593         switch (sess->xfrm_type) {
 594         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 595                 ret = cpt_modex_prep(&params, &sess->mod_ctx);
 596                 if (unlikely(ret))
 597                         goto req_fail;
 598                 break;
 599         case RTE_CRYPTO_ASYM_XFORM_RSA:
 600                 ret = cpt_enqueue_rsa_op(op, &params, sess);
 601                 if (unlikely(ret))
 602                         goto req_fail;
 603                 break;
 604         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 605                 ret = cpt_enqueue_ecdsa_op(op, &params, sess, otx2_fpm_iova);
 606                 if (unlikely(ret))
 607                         goto req_fail;
 608                 break;
 609         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 610                 ret = cpt_ecpm_prep(&asym_op->ecpm, &params,
 611                                     sess->ec_ctx.curveid);
 612                 if (unlikely(ret))
 613                         goto req_fail;
 614                 break;
 615         default:
 616                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 617                 ret = -EINVAL;
 618                 goto req_fail;
 619         }
 620
 621         ret = otx2_cpt_enqueue_req(qp, pend_q, params.req, op,
 622                                    sess->cpt_inst_w7);
 623
 624         if (unlikely(ret)) {
 625                 CPT_LOG_DP_ERR("Could not enqueue crypto req");
 626                 goto req_fail;
 627         }
 628
 629         return 0;
 630
 631 req_fail:
 632         free_op_meta(mdata, minfo->pool);
 633
 634         return ret;
 635 }
 636
 637 static __rte_always_inline int __rte_hot
 638 otx2_cpt_enqueue_sym(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 639                      struct pending_queue *pend_q)
 640 {
 641         struct rte_crypto_sym_op *sym_op = op->sym;
 642         struct cpt_request_info *req;
 643         struct cpt_sess_misc *sess;
 644         uint64_t cpt_op;
 645         void *mdata;
 646         int ret;
 647
 648         sess = get_sym_session_private_data(sym_op->session,
 649                                             otx2_cryptodev_driver_id);
 650
 651         cpt_op = sess->cpt_op;
 652
 653         if (cpt_op & CPT_OP_CIPHER_MASK)
 654                 ret = fill_fc_params(op, sess, &qp->meta_info, &mdata,
 655                                      (void **)&req);
 656         else
 657                 ret = fill_digest_params(op, sess, &qp->meta_info, &mdata,
 658                                          (void **)&req);
 659
 660         if (unlikely(ret)) {
 661                 CPT_LOG_DP_ERR("Crypto req : op %p, cpt_op 0x%x ret 0x%x",
 662                                 op, (unsigned int)cpt_op, ret);
 663                 return ret;
 664         }
 665
 666         ret = otx2_cpt_enqueue_req(qp, pend_q, req, op, sess->cpt_inst_w7);
 667
 668         if (unlikely(ret)) {
 669                 /* Free buffer allocated by fill params routines */
 670                 free_op_meta(mdata, qp->meta_info.pool);
 671         }
 672
 673         return ret;
 674 }
 675
 676 static __rte_always_inline int __rte_hot
 677 otx2_cpt_enqueue_sec(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 678                      struct pending_queue *pend_q)
 679 {
 680         uint32_t winsz, esn_low = 0, esn_hi = 0, seql = 0, seqh = 0;
 681         struct rte_mbuf *m_src = op->sym->m_src;
 682         struct otx2_sec_session_ipsec_lp *sess;
 683         struct otx2_ipsec_po_sa_ctl *ctl_wrd;
 684         struct otx2_ipsec_po_in_sa *sa;
 685         struct otx2_sec_session *priv;
 686         struct cpt_request_info *req;
 687         uint64_t seq_in_sa, seq = 0;
 688         uint8_t esn;
 689         int ret;
 690
 691         priv = get_sec_session_private_data(op->sym->sec_session);
 692         sess = &priv->ipsec.lp;
 693         sa = &sess->in_sa;
 694
 695         ctl_wrd = &sa->ctl;
 696         esn = ctl_wrd->esn_en;
 697         winsz = sa->replay_win_sz;
 698
 699         if (ctl_wrd->direction == OTX2_IPSEC_PO_SA_DIRECTION_OUTBOUND)
 700                 ret = process_outb_sa(op, sess, &qp->meta_info, (void **)&req);
 701         else {
 702                 if (winsz) {
 703                         esn_low = rte_be_to_cpu_32(sa->esn_low);
 704                         esn_hi = rte_be_to_cpu_32(sa->esn_hi);
 705                         seql = *rte_pktmbuf_mtod_offset(m_src, uint32_t *,
 706                                 sizeof(struct rte_ipv4_hdr) + 4);
 707                         seql = rte_be_to_cpu_32(seql);
 708
 709                         if (!esn)
 710                                 seq = (uint64_t)seql;
 711                         else {
 712                                 seqh = anti_replay_get_seqh(winsz, seql, esn_hi,
 713                                                 esn_low);
 714                                 seq = ((uint64_t)seqh << 32) | seql;
 715                         }
 716
 717                         if (unlikely(seq == 0))
 718                                 return IPSEC_ANTI_REPLAY_FAILED;
 719
 720                         ret = anti_replay_check(sa->replay, seq, winsz);
 721                         if (unlikely(ret)) {
 722                                 otx2_err("Anti replay check failed");
 723                                 return IPSEC_ANTI_REPLAY_FAILED;
 724                         }
 725                 }
 726
 727                 ret = process_inb_sa(op, sess, &qp->meta_info, (void **)&req);
 728         }
 729
 730         if (unlikely(ret)) {
 731                 otx2_err("Crypto req : op %p, ret 0x%x", op, ret);
 732                 return ret;
 733         }
 734
 735         ret = otx2_cpt_enqueue_req(qp, pend_q, req, op, sess->cpt_inst_w7);
 736
 737         if (winsz && esn) {
 738                 seq_in_sa = ((uint64_t)esn_hi << 32) | esn_low;
 739                 if (seq > seq_in_sa) {
 740                         sa->esn_low = rte_cpu_to_be_32(seql);
 741                         sa->esn_hi = rte_cpu_to_be_32(seqh);
 742                 }
 743         }
 744
 745         return ret;
 746 }
 747
 748 static __rte_always_inline int __rte_hot
 749 otx2_cpt_enqueue_sym_sessless(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 750                               struct pending_queue *pend_q)
 751 {
 752         const int driver_id = otx2_cryptodev_driver_id;
 753         struct rte_crypto_sym_op *sym_op = op->sym;
 754         struct rte_cryptodev_sym_session *sess;
 755         int ret;
 756
 757         /* Create temporary session */
 758         sess = rte_cryptodev_sym_session_create(qp->sess_mp);
 759         if (sess == NULL)
 760                 return -ENOMEM;
 761
 762         ret = sym_session_configure(driver_id, sym_op->xform, sess,
 763                                     qp->sess_mp_priv);
 764         if (ret)
 765                 goto sess_put;
 766
 767         sym_op->session = sess;
 768
 769         ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 770
 771         if (unlikely(ret))
 772                 goto priv_put;
 773
 774         return 0;
 775
 776 priv_put:
 777         sym_session_clear(driver_id, sess);
 778 sess_put:
 779         rte_mempool_put(qp->sess_mp, sess);
 780         return ret;
 781 }
 782
 783 static uint16_t
 784 otx2_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 785 {
 786         uint16_t nb_allowed, count = 0;
 787         struct otx2_cpt_qp *qp = qptr;
 788         struct pending_queue *pend_q;
 789         struct rte_crypto_op *op;
 790         int ret;
 791
 792         pend_q = &qp->pend_q;
 793
 794         nb_allowed = OTX2_CPT_DEFAULT_CMD_QLEN - pend_q->pending_count;
 795         if (nb_ops > nb_allowed)
 796                 nb_ops = nb_allowed;
 797
 798         for (count = 0; count < nb_ops; count++) {
 799                 op = ops[count];
 800                 if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 801                         if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)
 802                                 ret = otx2_cpt_enqueue_sec(qp, op, pend_q);
 803                         else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 804                                 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 805                         else
 806                                 ret = otx2_cpt_enqueue_sym_sessless(qp, op,
 807                                                                     pend_q);
 808                 } else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 809                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 810                                 ret = otx2_cpt_enqueue_asym(qp, op, pend_q);
 811                         else
 812                                 break;
 813                 } else
 814                         break;
 815
 816                 if (unlikely(ret))
 817                         break;
 818         }
 819
 820         return count;
 821 }
 822
 823 static __rte_always_inline void
 824 otx2_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req,
 825                      struct rte_crypto_rsa_xform *rsa_ctx)
 826 {
 827         struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa;
 828
 829         switch (rsa->op_type) {
 830         case RTE_CRYPTO_ASYM_OP_ENCRYPT:
 831                 rsa->cipher.length = rsa_ctx->n.length;
 832                 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length);
 833                 break;
 834         case RTE_CRYPTO_ASYM_OP_DECRYPT:
 835                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 836                         rsa->message.length = rsa_ctx->n.length;
 837                         memcpy(rsa->message.data, req->rptr,
 838                                rsa->message.length);
 839                 } else {
 840                         /* Get length of decrypted output */
 841                         rsa->message.length = rte_cpu_to_be_16
 842                                              (*((uint16_t *)req->rptr));
 843                         /*
 844                          * Offset output data pointer by length field
 845                          * (2 bytes) and copy decrypted data.
 846                          */
 847                         memcpy(rsa->message.data, req->rptr + 2,
 848                                rsa->message.length);
 849                 }
 850                 break;
 851         case RTE_CRYPTO_ASYM_OP_SIGN:
 852                 rsa->sign.length = rsa_ctx->n.length;
 853                 memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 854                 break;
 855         case RTE_CRYPTO_ASYM_OP_VERIFY:
 856                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 857                         rsa->sign.length = rsa_ctx->n.length;
 858                         memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 859                 } else {
 860                         /* Get length of signed output */
 861                         rsa->sign.length = rte_cpu_to_be_16
 862                                           (*((uint16_t *)req->rptr));
 863                         /*
 864                          * Offset output data pointer by length field
 865                          * (2 bytes) and copy signed data.
 866                          */
 867                         memcpy(rsa->sign.data, req->rptr + 2,
 868                                rsa->sign.length);
 869                 }
 870                 if (memcmp(rsa->sign.data, rsa->message.data,
 871                            rsa->message.length)) {
 872                         CPT_LOG_DP_ERR("RSA verification failed");
 873                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 874                 }
 875                 break;
 876         default:
 877                 CPT_LOG_DP_DEBUG("Invalid RSA operation type");
 878                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 879                 break;
 880         }
 881 }
 882
 883 static __rte_always_inline void
 884 otx2_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa,
 885                                struct cpt_request_info *req,
 886                                struct cpt_asym_ec_ctx *ec)
 887 {
 888         int prime_len = ec_grp[ec->curveid].prime.length;
 889
 890         if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)
 891                 return;
 892
 893         /* Separate out sign r and s components */
 894         memcpy(ecdsa->r.data, req->rptr, prime_len);
 895         memcpy(ecdsa->s.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8),
 896                prime_len);
 897         ecdsa->r.length = prime_len;
 898         ecdsa->s.length = prime_len;
 899 }
 900
 901 static __rte_always_inline void
 902 otx2_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm,
 903                              struct cpt_request_info *req,
 904                              struct cpt_asym_ec_ctx *ec)
 905 {
 906         int prime_len = ec_grp[ec->curveid].prime.length;
 907
 908         memcpy(ecpm->r.x.data, req->rptr, prime_len);
 909         memcpy(ecpm->r.y.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8),
 910                prime_len);
 911         ecpm->r.x.length = prime_len;
 912         ecpm->r.y.length = prime_len;
 913 }
 914
 915 static void
 916 otx2_cpt_asym_post_process(struct rte_crypto_op *cop,
 917                            struct cpt_request_info *req)
 918 {
 919         struct rte_crypto_asym_op *op = cop->asym;
 920         struct cpt_asym_sess_misc *sess;
 921
 922         sess = get_asym_session_private_data(op->session,
 923                                              otx2_cryptodev_driver_id);
 924
 925         switch (sess->xfrm_type) {
 926         case RTE_CRYPTO_ASYM_XFORM_RSA:
 927                 otx2_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx);
 928                 break;
 929         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 930                 op->modex.result.length = sess->mod_ctx.modulus.length;
 931                 memcpy(op->modex.result.data, req->rptr,
 932                        op->modex.result.length);
 933                 break;
 934         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 935                 otx2_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx);
 936                 break;
 937         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 938                 otx2_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx);
 939                 break;
 940         default:
 941                 CPT_LOG_DP_DEBUG("Invalid crypto xform type");
 942                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 943                 break;
 944         }
 945 }
 946
 947 static void
 948 otx2_cpt_sec_post_process(struct rte_crypto_op *cop, uintptr_t *rsp)
 949 {
 950         struct cpt_request_info *req = (struct cpt_request_info *)rsp[2];
 951         vq_cmd_word0_t *word0 = (vq_cmd_word0_t *)&req->ist.ei0;
 952         struct rte_crypto_sym_op *sym_op = cop->sym;
 953         struct rte_mbuf *m = sym_op->m_src;
 954         struct rte_ipv6_hdr *ip6;
 955         struct rte_ipv4_hdr *ip;
 956         uint16_t m_len = 0;
 957         int mdata_len;
 958         char *data;
 959
 960         mdata_len = (int)rsp[3];
 961         rte_pktmbuf_trim(m, mdata_len);
 962
 963         if (word0->s.opcode.major == OTX2_IPSEC_PO_PROCESS_IPSEC_INB) {
 964                 data = rte_pktmbuf_mtod(m, char *);
 965
 966                 if (rsp[4] == OTX2_IPSEC_PO_TRANSPORT ||
 967                     rsp[4] == OTX2_IPSEC_PO_TUNNEL_IPV4) {
 968                         ip = (struct rte_ipv4_hdr *)(data +
 969                                 OTX2_IPSEC_PO_INB_RPTR_HDR);
 970                         m_len = rte_be_to_cpu_16(ip->total_length);
 971                 } else if (rsp[4] == OTX2_IPSEC_PO_TUNNEL_IPV6) {
 972                         ip6 = (struct rte_ipv6_hdr *)(data +
 973                                 OTX2_IPSEC_PO_INB_RPTR_HDR);
 974                         m_len = rte_be_to_cpu_16(ip6->payload_len) +
 975                                 sizeof(struct rte_ipv6_hdr);
 976                 }
 977
 978                 m->data_len = m_len;
 979                 m->pkt_len = m_len;
 980                 m->data_off += OTX2_IPSEC_PO_INB_RPTR_HDR;
 981         }
 982 }
 983
 984 static inline void
 985 otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 986                               uintptr_t *rsp, uint8_t cc)
 987 {
 988         unsigned int sz;
 989
 990         if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 991                 if (cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 992                         if (likely(cc == OTX2_IPSEC_PO_CC_SUCCESS)) {
 993                                 otx2_cpt_sec_post_process(cop, rsp);
 994                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 995                         } else
 996                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 997
 998                         return;
 999                 }
1000
1001                 if (likely(cc == NO_ERR)) {
1002                         /* Verify authentication data if required */
1003                         if (unlikely(rsp[2]))
1004                                 compl_auth_verify(cop, (uint8_t *)rsp[2],
1005                                                  rsp[3]);
1006                         else
1007                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
1008                 } else {
1009                         if (cc == ERR_GC_ICV_MISCOMPARE)
1010                                 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
1011                         else
1012                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
1013                 }
1014
1015                 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
1016                         sym_session_clear(otx2_cryptodev_driver_id,
1017                                           cop->sym->session);
1018                         sz = rte_cryptodev_sym_get_existing_header_session_size(
1019                                         cop->sym->session);
1020                         memset(cop->sym->session, 0, sz);
1021                         rte_mempool_put(qp->sess_mp, cop->sym->session);
1022                         cop->sym->session = NULL;
1023                 }
1024         }
1025
1026         if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
1027                 if (likely(cc == NO_ERR)) {
1028                         cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
1029                         /*
1030                          * Pass cpt_req_info stored in metabuf during
1031                          * enqueue.
1032                          */
1033                         rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t));
1034                         otx2_cpt_asym_post_process(cop,
1035                                         (struct cpt_request_info *)rsp);
1036                 } else
1037                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
1038         }
1039 }
1040
1041 static uint16_t
1042 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
1043 {
1044         int i, nb_pending, nb_completed;
1045         struct otx2_cpt_qp *qp = qptr;
1046         struct pending_queue *pend_q;
1047         struct cpt_request_info *req;
1048         struct rte_crypto_op *cop;
1049         uint8_t cc[nb_ops];
1050         uintptr_t *rsp;
1051         void *metabuf;
1052
1053         pend_q = &qp->pend_q;
1054
1055         nb_pending = pend_q->pending_count;
1056
1057         if (nb_ops > nb_pending)
1058                 nb_ops = nb_pending;
1059
1060         for (i = 0; i < nb_ops; i++) {
1061                 req = (struct cpt_request_info *)
1062                                 pend_q->req_queue[pend_q->deq_head];
1063
1064                 cc[i] = otx2_cpt_compcode_get(req);
1065
1066                 if (unlikely(cc[i] == ERR_REQ_PENDING))
1067                         break;
1068
1069                 ops[i] = req->op;
1070
1071                 MOD_INC(pend_q->deq_head, OTX2_CPT_DEFAULT_CMD_QLEN);
1072                 pend_q->pending_count -= 1;
1073         }
1074
1075         nb_completed = i;
1076
1077         for (i = 0; i < nb_completed; i++) {
1078                 rsp = (void *)ops[i];
1079
1080                 metabuf = (void *)rsp[0];
1081                 cop = (void *)rsp[1];
1082
1083                 ops[i] = cop;
1084
1085                 otx2_cpt_dequeue_post_process(qp, cop, rsp, cc[i]);
1086
1087                 free_op_meta(metabuf, qp->meta_info.pool);
1088         }
1089
1090         return nb_completed;
1091 }
1092
1093 void
1094 otx2_cpt_set_enqdeq_fns(struct rte_cryptodev *dev)
1095 {
1096         dev->enqueue_burst = otx2_cpt_enqueue_burst;
1097         dev->dequeue_burst = otx2_cpt_dequeue_burst;
1098
1099         rte_mb();
1100 }
1101
1102 /* PMD ops */
1103
1104 static int
1105 otx2_cpt_dev_config(struct rte_cryptodev *dev,
1106                     struct rte_cryptodev_config *conf)
1107 {
1108         struct otx2_cpt_vf *vf = dev->data->dev_private;
1109         int ret;
1110
1111         if (conf->nb_queue_pairs > vf->max_queues) {
1112                 CPT_LOG_ERR("Invalid number of queue pairs requested");
1113                 return -EINVAL;
1114         }
1115
1116         dev->feature_flags &= ~conf->ff_disable;
1117
1118         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
1119                 /* Initialize shared FPM table */
1120                 ret = cpt_fpm_init(otx2_fpm_iova);
1121                 if (ret)
1122                         return ret;
1123         }
1124
1125         /* Unregister error interrupts */
1126         if (vf->err_intr_registered)
1127                 otx2_cpt_err_intr_unregister(dev);
1128
1129         /* Detach queues */
1130         if (vf->nb_queues) {
1131                 ret = otx2_cpt_queues_detach(dev);
1132                 if (ret) {
1133                         CPT_LOG_ERR("Could not detach CPT queues");
1134                         return ret;
1135                 }
1136         }
1137
1138         /* Attach queues */
1139         ret = otx2_cpt_queues_attach(dev, conf->nb_queue_pairs);
1140         if (ret) {
1141                 CPT_LOG_ERR("Could not attach CPT queues");
1142                 return -ENODEV;
1143         }
1144
1145         ret = otx2_cpt_msix_offsets_get(dev);
1146         if (ret) {
1147                 CPT_LOG_ERR("Could not get MSI-X offsets");
1148                 goto queues_detach;
1149         }
1150
1151         /* Register error interrupts */
1152         ret = otx2_cpt_err_intr_register(dev);
1153         if (ret) {
1154                 CPT_LOG_ERR("Could not register error interrupts");
1155                 goto queues_detach;
1156         }
1157
1158         ret = otx2_cpt_inline_init(dev);
1159         if (ret) {
1160                 CPT_LOG_ERR("Could not enable inline IPsec");
1161                 goto intr_unregister;
1162         }
1163
1164         otx2_cpt_set_enqdeq_fns(dev);
1165
1166         return 0;
1167
1168 intr_unregister:
1169         otx2_cpt_err_intr_unregister(dev);
1170 queues_detach:
1171         otx2_cpt_queues_detach(dev);
1172         return ret;
1173 }
1174
1175 static int
1176 otx2_cpt_dev_start(struct rte_cryptodev *dev)
1177 {
1178         RTE_SET_USED(dev);
1179
1180         CPT_PMD_INIT_FUNC_TRACE();
1181
1182         return 0;
1183 }
1184
1185 static void
1186 otx2_cpt_dev_stop(struct rte_cryptodev *dev)
1187 {
1188         CPT_PMD_INIT_FUNC_TRACE();
1189
1190         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)
1191                 cpt_fpm_clear();
1192 }
1193
1194 static int
1195 otx2_cpt_dev_close(struct rte_cryptodev *dev)
1196 {
1197         struct otx2_cpt_vf *vf = dev->data->dev_private;
1198         int i, ret = 0;
1199
1200         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1201                 ret = otx2_cpt_queue_pair_release(dev, i);
1202                 if (ret)
1203                         return ret;
1204         }
1205
1206         /* Unregister error interrupts */
1207         if (vf->err_intr_registered)
1208                 otx2_cpt_err_intr_unregister(dev);
1209
1210         /* Detach queues */
1211         if (vf->nb_queues) {
1212                 ret = otx2_cpt_queues_detach(dev);
1213                 if (ret)
1214                         CPT_LOG_ERR("Could not detach CPT queues");
1215         }
1216
1217         return ret;
1218 }
1219
1220 static void
1221 otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
1222                       struct rte_cryptodev_info *info)
1223 {
1224         struct otx2_cpt_vf *vf = dev->data->dev_private;
1225
1226         if (info != NULL) {
1227                 info->max_nb_queue_pairs = vf->max_queues;
1228                 info->feature_flags = dev->feature_flags;
1229                 info->capabilities = otx2_cpt_capabilities_get();
1230                 info->sym.max_nb_sessions = 0;
1231                 info->driver_id = otx2_cryptodev_driver_id;
1232                 info->min_mbuf_headroom_req = OTX2_CPT_MIN_HEADROOM_REQ;
1233                 info->min_mbuf_tailroom_req = OTX2_CPT_MIN_TAILROOM_REQ;
1234         }
1235 }
1236
1237 static int
1238 otx2_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1239                           const struct rte_cryptodev_qp_conf *conf,
1240                           int socket_id __rte_unused)
1241 {
1242         uint8_t grp_mask = OTX2_CPT_ENG_GRPS_MASK;
1243         struct rte_pci_device *pci_dev;
1244         struct otx2_cpt_qp *qp;
1245
1246         CPT_PMD_INIT_FUNC_TRACE();
1247
1248         if (dev->data->queue_pairs[qp_id] != NULL)
1249                 otx2_cpt_queue_pair_release(dev, qp_id);
1250
1251         if (conf->nb_descriptors > OTX2_CPT_DEFAULT_CMD_QLEN) {
1252                 CPT_LOG_ERR("Could not setup queue pair for %u descriptors",
1253                             conf->nb_descriptors);
1254                 return -EINVAL;
1255         }
1256
1257         pci_dev = RTE_DEV_TO_PCI(dev->device);
1258
1259         if (pci_dev->mem_resource[2].addr == NULL) {
1260                 CPT_LOG_ERR("Invalid PCI mem address");
1261                 return -EIO;
1262         }
1263
1264         qp = otx2_cpt_qp_create(dev, qp_id, grp_mask);
1265         if (qp == NULL) {
1266                 CPT_LOG_ERR("Could not create queue pair %d", qp_id);
1267                 return -ENOMEM;
1268         }
1269
1270         qp->sess_mp = conf->mp_session;
1271         qp->sess_mp_priv = conf->mp_session_private;
1272         dev->data->queue_pairs[qp_id] = qp;
1273
1274         return 0;
1275 }
1276
1277 static int
1278 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
1279 {
1280         struct otx2_cpt_qp *qp = dev->data->queue_pairs[qp_id];
1281         int ret;
1282
1283         CPT_PMD_INIT_FUNC_TRACE();
1284
1285         if (qp == NULL)
1286                 return -EINVAL;
1287
1288         CPT_LOG_INFO("Releasing queue pair %d", qp_id);
1289
1290         ret = otx2_cpt_qp_destroy(dev, qp);
1291         if (ret) {
1292                 CPT_LOG_ERR("Could not destroy queue pair %d", qp_id);
1293                 return ret;
1294         }
1295
1296         dev->data->queue_pairs[qp_id] = NULL;
1297
1298         return 0;
1299 }
1300
1301 static unsigned int
1302 otx2_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1303 {
1304         return cpt_get_session_size();
1305 }
1306
1307 static int
1308 otx2_cpt_sym_session_configure(struct rte_cryptodev *dev,
1309                                struct rte_crypto_sym_xform *xform,
1310                                struct rte_cryptodev_sym_session *sess,
1311                                struct rte_mempool *pool)
1312 {
1313         CPT_PMD_INIT_FUNC_TRACE();
1314
1315         return sym_session_configure(dev->driver_id, xform, sess, pool);
1316 }
1317
1318 static void
1319 otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
1320                            struct rte_cryptodev_sym_session *sess)
1321 {
1322         CPT_PMD_INIT_FUNC_TRACE();
1323
1324         return sym_session_clear(dev->driver_id, sess);
1325 }
1326
1327 static unsigned int
1328 otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
1329 {
1330         return sizeof(struct cpt_asym_sess_misc);
1331 }
1332
1333 static int
1334 otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
1335                           struct rte_crypto_asym_xform *xform,
1336                           struct rte_cryptodev_asym_session *sess,
1337                           struct rte_mempool *pool)
1338 {
1339         struct cpt_asym_sess_misc *priv;
1340         vq_cmd_word3_t vq_cmd_w3;
1341         int ret;
1342
1343         CPT_PMD_INIT_FUNC_TRACE();
1344
1345         if (rte_mempool_get(pool, (void **)&priv)) {
1346                 CPT_LOG_ERR("Could not allocate session_private_data");
1347                 return -ENOMEM;
1348         }
1349
1350         memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
1351
1352         ret = cpt_fill_asym_session_parameters(priv, xform);
1353         if (ret) {
1354                 CPT_LOG_ERR("Could not configure session parameters");
1355
1356                 /* Return session to mempool */
1357                 rte_mempool_put(pool, priv);
1358                 return ret;
1359         }
1360
1361         vq_cmd_w3.u64 = 0;
1362         vq_cmd_w3.s.grp = OTX2_CPT_EGRP_AE;
1363         priv->cpt_inst_w7 = vq_cmd_w3.u64;
1364
1365         set_asym_session_private_data(sess, dev->driver_id, priv);
1366
1367         return 0;
1368 }
1369
1370 static void
1371 otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
1372                             struct rte_cryptodev_asym_session *sess)
1373 {
1374         struct cpt_asym_sess_misc *priv;
1375         struct rte_mempool *sess_mp;
1376
1377         CPT_PMD_INIT_FUNC_TRACE();
1378
1379         priv = get_asym_session_private_data(sess, dev->driver_id);
1380         if (priv == NULL)
1381                 return;
1382
1383         /* Free resources allocated in session_cfg */
1384         cpt_free_asym_session_parameters(priv);
1385
1386         /* Reset and free object back to pool */
1387         memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
1388         sess_mp = rte_mempool_from_obj(priv);
1389         set_asym_session_private_data(sess, dev->driver_id, NULL);
1390         rte_mempool_put(sess_mp, priv);
1391 }
1392
1393 struct rte_cryptodev_ops otx2_cpt_ops = {
1394         /* Device control ops */
1395         .dev_configure = otx2_cpt_dev_config,
1396         .dev_start = otx2_cpt_dev_start,
1397         .dev_stop = otx2_cpt_dev_stop,
1398         .dev_close = otx2_cpt_dev_close,
1399         .dev_infos_get = otx2_cpt_dev_info_get,
1400
1401         .stats_get = NULL,
1402         .stats_reset = NULL,
1403         .queue_pair_setup = otx2_cpt_queue_pair_setup,
1404         .queue_pair_release = otx2_cpt_queue_pair_release,
1405
1406         /* Symmetric crypto ops */
1407         .sym_session_get_size = otx2_cpt_sym_session_get_size,
1408         .sym_session_configure = otx2_cpt_sym_session_configure,
1409         .sym_session_clear = otx2_cpt_sym_session_clear,
1410
1411         /* Asymmetric crypto ops */
1412         .asym_session_get_size = otx2_cpt_asym_session_size_get,
1413         .asym_session_configure = otx2_cpt_asym_session_cfg,
1414         .asym_session_clear = otx2_cpt_asym_session_clear,
1415
1416 };