drivers/crypto/octeontx2/otx2_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <unistd.h>
   6
   7 #include <rte_cryptodev_pmd.h>
   8 #include <rte_errno.h>
   9 #include <rte_ethdev.h>
  10
  11 #include "otx2_cryptodev.h"
  12 #include "otx2_cryptodev_capabilities.h"
  13 #include "otx2_cryptodev_hw_access.h"
  14 #include "otx2_cryptodev_mbox.h"
  15 #include "otx2_cryptodev_ops.h"
  16 #include "otx2_ipsec_po_ops.h"
  17 #include "otx2_mbox.h"
  18 #include "otx2_sec_idev.h"
  19 #include "otx2_security.h"
  20
  21 #include "cpt_hw_types.h"
  22 #include "cpt_pmd_logs.h"
  23 #include "cpt_pmd_ops_helper.h"
  24 #include "cpt_ucode.h"
  25 #include "cpt_ucode_asym.h"
  26
  27 #define METABUF_POOL_CACHE_SIZE 512
  28
  29 static uint64_t otx2_fpm_iova[CPT_EC_ID_PMAX];
  30
  31 /* Forward declarations */
  32
  33 static int
  34 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
  35
  36 static void
  37 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
  38 {
  39         snprintf(name, size, "otx2_cpt_lf_mem_%u:%u", dev_id, qp_id);
  40 }
  41
  42 static int
  43 otx2_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
  44                                 struct otx2_cpt_qp *qp, uint8_t qp_id,
  45                                 int nb_elements)
  46 {
  47         char mempool_name[RTE_MEMPOOL_NAMESIZE];
  48         struct cpt_qp_meta_info *meta_info;
  49         struct rte_mempool *pool;
  50         int ret, max_mlen;
  51         int asym_mlen = 0;
  52         int lb_mlen = 0;
  53         int sg_mlen = 0;
  54
  55         if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
  56
  57                 /* Get meta len for scatter gather mode */
  58                 sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
  59
  60                 /* Extra 32B saved for future considerations */
  61                 sg_mlen += 4 * sizeof(uint64_t);
  62
  63                 /* Get meta len for linear buffer (direct) mode */
  64                 lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
  65
  66                 /* Extra 32B saved for future considerations */
  67                 lb_mlen += 4 * sizeof(uint64_t);
  68         }
  69
  70         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
  71
  72                 /* Get meta len required for asymmetric operations */
  73                 asym_mlen = cpt_pmd_ops_helper_asym_get_mlen();
  74         }
  75
  76         /*
  77          * Check max requirement for meta buffer to
  78          * support crypto op of any type (sym/asym).
  79          */
  80         max_mlen = RTE_MAX(RTE_MAX(lb_mlen, sg_mlen), asym_mlen);
  81
  82         /* Allocate mempool */
  83
  84         snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "otx2_cpt_mb_%u:%u",
  85                  dev->data->dev_id, qp_id);
  86
  87         pool = rte_mempool_create_empty(mempool_name, nb_elements, max_mlen,
  88                                         METABUF_POOL_CACHE_SIZE, 0,
  89                                         rte_socket_id(), 0);
  90
  91         if (pool == NULL) {
  92                 CPT_LOG_ERR("Could not create mempool for metabuf");
  93                 return rte_errno;
  94         }
  95
  96         ret = rte_mempool_set_ops_byname(pool, RTE_MBUF_DEFAULT_MEMPOOL_OPS,
  97                                          NULL);
  98         if (ret) {
  99                 CPT_LOG_ERR("Could not set mempool ops");
 100                 goto mempool_free;
 101         }
 102
 103         ret = rte_mempool_populate_default(pool);
 104         if (ret <= 0) {
 105                 CPT_LOG_ERR("Could not populate metabuf pool");
 106                 goto mempool_free;
 107         }
 108
 109         meta_info = &qp->meta_info;
 110
 111         meta_info->pool = pool;
 112         meta_info->lb_mlen = lb_mlen;
 113         meta_info->sg_mlen = sg_mlen;
 114
 115         return 0;
 116
 117 mempool_free:
 118         rte_mempool_free(pool);
 119         return ret;
 120 }
 121
 122 static void
 123 otx2_cpt_metabuf_mempool_destroy(struct otx2_cpt_qp *qp)
 124 {
 125         struct cpt_qp_meta_info *meta_info = &qp->meta_info;
 126
 127         rte_mempool_free(meta_info->pool);
 128
 129         meta_info->pool = NULL;
 130         meta_info->lb_mlen = 0;
 131         meta_info->sg_mlen = 0;
 132 }
 133
 134 static int
 135 otx2_cpt_qp_inline_cfg(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 136 {
 137         static rte_atomic16_t port_offset = RTE_ATOMIC16_INIT(-1);
 138         uint16_t port_id, nb_ethport = rte_eth_dev_count_avail();
 139         int i, ret;
 140
 141         for (i = 0; i < nb_ethport; i++) {
 142                 port_id = rte_atomic16_add_return(&port_offset, 1) % nb_ethport;
 143                 if (otx2_eth_dev_is_sec_capable(&rte_eth_devices[port_id]))
 144                         break;
 145         }
 146
 147         if (i >= nb_ethport)
 148                 return 0;
 149
 150         ret = otx2_cpt_qp_ethdev_bind(dev, qp, port_id);
 151         if (ret)
 152                 return ret;
 153
 154         /* Publish inline Tx QP to eth dev security */
 155         ret = otx2_sec_idev_tx_cpt_qp_add(port_id, qp);
 156         if (ret)
 157                 return ret;
 158
 159         return 0;
 160 }
 161
 162 static struct otx2_cpt_qp *
 163 otx2_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
 164                    uint8_t group)
 165 {
 166         struct otx2_cpt_vf *vf = dev->data->dev_private;
 167         uint64_t pg_sz = sysconf(_SC_PAGESIZE);
 168         const struct rte_memzone *lf_mem;
 169         uint32_t len, iq_len, size_div40;
 170         char name[RTE_MEMZONE_NAMESIZE];
 171         uint64_t used_len, iova;
 172         struct otx2_cpt_qp *qp;
 173         uint64_t lmtline;
 174         uint8_t *va;
 175         int ret;
 176
 177         /* Allocate queue pair */
 178         qp = rte_zmalloc_socket("OCTEON TX2 Crypto PMD Queue Pair", sizeof(*qp),
 179                                 OTX2_ALIGN, 0);
 180         if (qp == NULL) {
 181                 CPT_LOG_ERR("Could not allocate queue pair");
 182                 return NULL;
 183         }
 184
 185         iq_len = OTX2_CPT_IQ_LEN;
 186
 187         /*
 188          * Queue size must be a multiple of 40 and effective queue size to
 189          * software is (size_div40 - 1) * 40
 190          */
 191         size_div40 = (iq_len + 40 - 1) / 40 + 1;
 192
 193         /* For pending queue */
 194         len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 195
 196         /* Space for instruction group memory */
 197         len += size_div40 * 16;
 198
 199         /* So that instruction queues start as pg size aligned */
 200         len = RTE_ALIGN(len, pg_sz);
 201
 202         /* For instruction queues */
 203         len += OTX2_CPT_IQ_LEN * sizeof(union cpt_inst_s);
 204
 205         /* Wastage after instruction queues */
 206         len = RTE_ALIGN(len, pg_sz);
 207
 208         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 209                             qp_id);
 210
 211         lf_mem = rte_memzone_reserve_aligned(name, len, vf->otx2_dev.node,
 212                         RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
 213                         RTE_CACHE_LINE_SIZE);
 214         if (lf_mem == NULL) {
 215                 CPT_LOG_ERR("Could not allocate reserved memzone");
 216                 goto qp_free;
 217         }
 218
 219         va = lf_mem->addr;
 220         iova = lf_mem->iova;
 221
 222         memset(va, 0, len);
 223
 224         ret = otx2_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
 225         if (ret) {
 226                 CPT_LOG_ERR("Could not create mempool for metabuf");
 227                 goto lf_mem_free;
 228         }
 229
 230         /* Initialize pending queue */
 231         qp->pend_q.rid_queue = (struct rid *)va;
 232         qp->pend_q.enq_tail = 0;
 233         qp->pend_q.deq_head = 0;
 234         qp->pend_q.pending_count = 0;
 235
 236         used_len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 237         used_len += size_div40 * 16;
 238         used_len = RTE_ALIGN(used_len, pg_sz);
 239         iova += used_len;
 240
 241         qp->iq_dma_addr = iova;
 242         qp->id = qp_id;
 243         qp->base = OTX2_CPT_LF_BAR2(vf, qp_id);
 244
 245         lmtline = vf->otx2_dev.bar2 +
 246                   (RVU_BLOCK_ADDR_LMT << 20 | qp_id << 12) +
 247                   OTX2_LMT_LF_LMTLINE(0);
 248
 249         qp->lmtline = (void *)lmtline;
 250
 251         qp->lf_nq_reg = qp->base + OTX2_CPT_LF_NQ(0);
 252
 253         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 254         if (ret && (ret != -ENOENT)) {
 255                 CPT_LOG_ERR("Could not delete inline configuration");
 256                 goto mempool_destroy;
 257         }
 258
 259         otx2_cpt_iq_disable(qp);
 260
 261         ret = otx2_cpt_qp_inline_cfg(dev, qp);
 262         if (ret) {
 263                 CPT_LOG_ERR("Could not configure queue for inline IPsec");
 264                 goto mempool_destroy;
 265         }
 266
 267         ret = otx2_cpt_iq_enable(dev, qp, group, OTX2_CPT_QUEUE_HI_PRIO,
 268                                  size_div40);
 269         if (ret) {
 270                 CPT_LOG_ERR("Could not enable instruction queue");
 271                 goto mempool_destroy;
 272         }
 273
 274         return qp;
 275
 276 mempool_destroy:
 277         otx2_cpt_metabuf_mempool_destroy(qp);
 278 lf_mem_free:
 279         rte_memzone_free(lf_mem);
 280 qp_free:
 281         rte_free(qp);
 282         return NULL;
 283 }
 284
 285 static int
 286 otx2_cpt_qp_destroy(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 287 {
 288         const struct rte_memzone *lf_mem;
 289         char name[RTE_MEMZONE_NAMESIZE];
 290         int ret;
 291
 292         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 293         if (ret && (ret != -ENOENT)) {
 294                 CPT_LOG_ERR("Could not delete inline configuration");
 295                 return ret;
 296         }
 297
 298         otx2_cpt_iq_disable(qp);
 299
 300         otx2_cpt_metabuf_mempool_destroy(qp);
 301
 302         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 303                             qp->id);
 304
 305         lf_mem = rte_memzone_lookup(name);
 306
 307         ret = rte_memzone_free(lf_mem);
 308         if (ret)
 309                 return ret;
 310
 311         rte_free(qp);
 312
 313         return 0;
 314 }
 315
 316 static int
 317 sym_xform_verify(struct rte_crypto_sym_xform *xform)
 318 {
 319         if (xform->next) {
 320                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 321                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 322                     xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 323                         return -ENOTSUP;
 324
 325                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 326                     xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT &&
 327                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 328                         return -ENOTSUP;
 329
 330                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 331                     xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
 332                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 333                     xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)
 334                         return -ENOTSUP;
 335
 336                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 337                     xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&
 338                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 339                     xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)
 340                         return -ENOTSUP;
 341
 342         } else {
 343                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 344                     xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&
 345                     xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
 346                         return -ENOTSUP;
 347         }
 348         return 0;
 349 }
 350
 351 static int
 352 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 353                       struct rte_cryptodev_sym_session *sess,
 354                       struct rte_mempool *pool)
 355 {
 356         struct rte_crypto_sym_xform *temp_xform = xform;
 357         struct cpt_sess_misc *misc;
 358         void *priv;
 359         int ret;
 360
 361         ret = sym_xform_verify(xform);
 362         if (unlikely(ret))
 363                 return ret;
 364
 365         if (unlikely(rte_mempool_get(pool, &priv))) {
 366                 CPT_LOG_ERR("Could not allocate session private data");
 367                 return -ENOMEM;
 368         }
 369
 370         memset(priv, 0, sizeof(struct cpt_sess_misc) +
 371                         offsetof(struct cpt_ctx, fctx));
 372
 373         misc = priv;
 374
 375         for ( ; xform != NULL; xform = xform->next) {
 376                 switch (xform->type) {
 377                 case RTE_CRYPTO_SYM_XFORM_AEAD:
 378                         ret = fill_sess_aead(xform, misc);
 379                         break;
 380                 case RTE_CRYPTO_SYM_XFORM_CIPHER:
 381                         ret = fill_sess_cipher(xform, misc);
 382                         break;
 383                 case RTE_CRYPTO_SYM_XFORM_AUTH:
 384                         if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
 385                                 ret = fill_sess_gmac(xform, misc);
 386                         else
 387                                 ret = fill_sess_auth(xform, misc);
 388                         break;
 389                 default:
 390                         ret = -1;
 391                 }
 392
 393                 if (ret)
 394                         goto priv_put;
 395         }
 396
 397         if ((GET_SESS_FC_TYPE(misc) == HASH_HMAC) &&
 398                         cpt_mac_len_verify(&temp_xform->auth)) {
 399                 CPT_LOG_ERR("MAC length is not supported");
 400                 ret = -ENOTSUP;
 401                 goto priv_put;
 402         }
 403
 404         set_sym_session_private_data(sess, driver_id, misc);
 405
 406         misc->ctx_dma_addr = rte_mempool_virt2iova(misc) +
 407                              sizeof(struct cpt_sess_misc);
 408
 409         /*
 410          * IE engines support IPsec operations
 411          * SE engines support IPsec operations, Chacha-Poly and
 412          * Air-Crypto operations
 413          */
 414         if (misc->zsk_flag || misc->chacha_poly)
 415                 misc->egrp = OTX2_CPT_EGRP_SE;
 416         else
 417                 misc->egrp = OTX2_CPT_EGRP_SE_IE;
 418
 419         return 0;
 420
 421 priv_put:
 422         rte_mempool_put(pool, priv);
 423
 424         return -ENOTSUP;
 425 }
 426
 427 static void
 428 sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
 429 {
 430         void *priv = get_sym_session_private_data(sess, driver_id);
 431         struct rte_mempool *pool;
 432
 433         if (priv == NULL)
 434                 return;
 435
 436         memset(priv, 0, cpt_get_session_size());
 437
 438         pool = rte_mempool_from_obj(priv);
 439
 440         set_sym_session_private_data(sess, driver_id, NULL);
 441
 442         rte_mempool_put(pool, priv);
 443 }
 444
 445 static __rte_always_inline int32_t __rte_hot
 446 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 447                      struct pending_queue *pend_q,
 448                      struct cpt_request_info *req)
 449 {
 450         void *lmtline = qp->lmtline;
 451         union cpt_inst_s inst;
 452         uint64_t lmt_status;
 453
 454         if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 455                 return -EAGAIN;
 456
 457         inst.u[0] = 0;
 458         inst.s9x.res_addr = req->comp_baddr;
 459         inst.u[2] = 0;
 460         inst.u[3] = 0;
 461
 462         inst.s9x.ei0 = req->ist.ei0;
 463         inst.s9x.ei1 = req->ist.ei1;
 464         inst.s9x.ei2 = req->ist.ei2;
 465         inst.s9x.ei3 = req->ist.ei3;
 466
 467         req->time_out = rte_get_timer_cycles() +
 468                         DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 469
 470         do {
 471                 /* Copy CPT command to LMTLINE */
 472                 memcpy(lmtline, &inst, sizeof(inst));
 473
 474                 /*
 475                  * Make sure compiler does not reorder memcpy and ldeor.
 476                  * LMTST transactions are always flushed from the write
 477                  * buffer immediately, a DMB is not required to push out
 478                  * LMTSTs.
 479                  */
 480                 rte_io_wmb();
 481                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 482         } while (lmt_status == 0);
 483
 484         pend_q->rid_queue[pend_q->enq_tail].rid = (uintptr_t)req;
 485
 486         /* We will use soft queue length here to limit requests */
 487         MOD_INC(pend_q->enq_tail, OTX2_CPT_DEFAULT_CMD_QLEN);
 488         pend_q->pending_count += 1;
 489
 490         return 0;
 491 }
 492
 493 static __rte_always_inline int32_t __rte_hot
 494 otx2_cpt_enqueue_asym(struct otx2_cpt_qp *qp,
 495                       struct rte_crypto_op *op,
 496                       struct pending_queue *pend_q)
 497 {
 498         struct cpt_qp_meta_info *minfo = &qp->meta_info;
 499         struct rte_crypto_asym_op *asym_op = op->asym;
 500         struct asym_op_params params = {0};
 501         struct cpt_asym_sess_misc *sess;
 502         vq_cmd_word3_t *w3;
 503         uintptr_t *cop;
 504         void *mdata;
 505         int ret;
 506
 507         if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) {
 508                 CPT_LOG_ERR("Could not allocate meta buffer for request");
 509                 return -ENOMEM;
 510         }
 511
 512         sess = get_asym_session_private_data(asym_op->session,
 513                                              otx2_cryptodev_driver_id);
 514
 515         /* Store IO address of the mdata to meta_buf */
 516         params.meta_buf = rte_mempool_virt2iova(mdata);
 517
 518         cop = mdata;
 519         cop[0] = (uintptr_t)mdata;
 520         cop[1] = (uintptr_t)op;
 521         cop[2] = cop[3] = 0ULL;
 522
 523         params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t));
 524         params.req->op = cop;
 525
 526         /* Adjust meta_buf to point to end of cpt_request_info structure */
 527         params.meta_buf += (4 * sizeof(uintptr_t)) +
 528                             sizeof(struct cpt_request_info);
 529         switch (sess->xfrm_type) {
 530         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 531                 ret = cpt_modex_prep(&params, &sess->mod_ctx);
 532                 if (unlikely(ret))
 533                         goto req_fail;
 534                 break;
 535         case RTE_CRYPTO_ASYM_XFORM_RSA:
 536                 ret = cpt_enqueue_rsa_op(op, &params, sess);
 537                 if (unlikely(ret))
 538                         goto req_fail;
 539                 break;
 540         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 541                 ret = cpt_enqueue_ecdsa_op(op, &params, sess, otx2_fpm_iova);
 542                 if (unlikely(ret))
 543                         goto req_fail;
 544                 break;
 545         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 546                 ret = cpt_ecpm_prep(&asym_op->ecpm, &params,
 547                                     sess->ec_ctx.curveid);
 548                 if (unlikely(ret))
 549                         goto req_fail;
 550                 break;
 551         default:
 552                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 553                 ret = -EINVAL;
 554                 goto req_fail;
 555         }
 556
 557         /* Set engine group of AE */
 558         w3 = (vq_cmd_word3_t *)&params.req->ist.ei3;
 559         w3->s.grp = OTX2_CPT_EGRP_AE;
 560
 561         ret = otx2_cpt_enqueue_req(qp, pend_q, params.req);
 562
 563         if (unlikely(ret)) {
 564                 CPT_LOG_DP_ERR("Could not enqueue crypto req");
 565                 goto req_fail;
 566         }
 567
 568         return 0;
 569
 570 req_fail:
 571         free_op_meta(mdata, minfo->pool);
 572
 573         return ret;
 574 }
 575
 576 static __rte_always_inline int __rte_hot
 577 otx2_cpt_enqueue_sym(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 578                      struct pending_queue *pend_q)
 579 {
 580         struct rte_crypto_sym_op *sym_op = op->sym;
 581         struct cpt_request_info *req;
 582         struct cpt_sess_misc *sess;
 583         vq_cmd_word3_t *w3;
 584         uint64_t cpt_op;
 585         void *mdata;
 586         int ret;
 587
 588         sess = get_sym_session_private_data(sym_op->session,
 589                                             otx2_cryptodev_driver_id);
 590
 591         cpt_op = sess->cpt_op;
 592
 593         if (cpt_op & CPT_OP_CIPHER_MASK)
 594                 ret = fill_fc_params(op, sess, &qp->meta_info, &mdata,
 595                                      (void **)&req);
 596         else
 597                 ret = fill_digest_params(op, sess, &qp->meta_info, &mdata,
 598                                          (void **)&req);
 599
 600         if (unlikely(ret)) {
 601                 CPT_LOG_DP_ERR("Crypto req : op %p, cpt_op 0x%x ret 0x%x",
 602                                 op, (unsigned int)cpt_op, ret);
 603                 return ret;
 604         }
 605
 606         w3 = ((vq_cmd_word3_t *)(&req->ist.ei3));
 607         w3->s.grp = sess->egrp;
 608
 609         ret = otx2_cpt_enqueue_req(qp, pend_q, req);
 610
 611         if (unlikely(ret)) {
 612                 /* Free buffer allocated by fill params routines */
 613                 free_op_meta(mdata, qp->meta_info.pool);
 614         }
 615
 616         return ret;
 617 }
 618
 619 static __rte_always_inline int __rte_hot
 620 otx2_cpt_enqueue_sec(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 621                      struct pending_queue *pend_q)
 622 {
 623         struct otx2_sec_session_ipsec_lp *sess;
 624         struct otx2_ipsec_po_sa_ctl *ctl_wrd;
 625         struct otx2_sec_session *priv;
 626         struct cpt_request_info *req;
 627         int ret;
 628
 629         priv = get_sec_session_private_data(op->sym->sec_session);
 630         sess = &priv->ipsec.lp;
 631
 632         ctl_wrd = &sess->in_sa.ctl;
 633
 634         if (ctl_wrd->direction == OTX2_IPSEC_PO_SA_DIRECTION_OUTBOUND)
 635                 ret = process_outb_sa(op, sess, &qp->meta_info, (void **)&req);
 636         else
 637                 ret = process_inb_sa(op, sess, &qp->meta_info, (void **)&req);
 638
 639         if (unlikely(ret)) {
 640                 otx2_err("Crypto req : op %p, ret 0x%x", op, ret);
 641                 return ret;
 642         }
 643
 644         ret = otx2_cpt_enqueue_req(qp, pend_q, req);
 645
 646         return ret;
 647 }
 648
 649 static __rte_always_inline int __rte_hot
 650 otx2_cpt_enqueue_sym_sessless(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 651                               struct pending_queue *pend_q)
 652 {
 653         const int driver_id = otx2_cryptodev_driver_id;
 654         struct rte_crypto_sym_op *sym_op = op->sym;
 655         struct rte_cryptodev_sym_session *sess;
 656         int ret;
 657
 658         /* Create temporary session */
 659         sess = rte_cryptodev_sym_session_create(qp->sess_mp);
 660         if (sess == NULL)
 661                 return -ENOMEM;
 662
 663         ret = sym_session_configure(driver_id, sym_op->xform, sess,
 664                                     qp->sess_mp_priv);
 665         if (ret)
 666                 goto sess_put;
 667
 668         sym_op->session = sess;
 669
 670         ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 671
 672         if (unlikely(ret))
 673                 goto priv_put;
 674
 675         return 0;
 676
 677 priv_put:
 678         sym_session_clear(driver_id, sess);
 679 sess_put:
 680         rte_mempool_put(qp->sess_mp, sess);
 681         return ret;
 682 }
 683
 684 static uint16_t
 685 otx2_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 686 {
 687         uint16_t nb_allowed, count = 0;
 688         struct otx2_cpt_qp *qp = qptr;
 689         struct pending_queue *pend_q;
 690         struct rte_crypto_op *op;
 691         int ret;
 692
 693         pend_q = &qp->pend_q;
 694
 695         nb_allowed = OTX2_CPT_DEFAULT_CMD_QLEN - pend_q->pending_count;
 696         if (nb_ops > nb_allowed)
 697                 nb_ops = nb_allowed;
 698
 699         for (count = 0; count < nb_ops; count++) {
 700                 op = ops[count];
 701                 if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 702                         if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)
 703                                 ret = otx2_cpt_enqueue_sec(qp, op, pend_q);
 704                         else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 705                                 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 706                         else
 707                                 ret = otx2_cpt_enqueue_sym_sessless(qp, op,
 708                                                                     pend_q);
 709                 } else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 710                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 711                                 ret = otx2_cpt_enqueue_asym(qp, op, pend_q);
 712                         else
 713                                 break;
 714                 } else
 715                         break;
 716
 717                 if (unlikely(ret))
 718                         break;
 719         }
 720
 721         return count;
 722 }
 723
 724 static __rte_always_inline void
 725 otx2_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req,
 726                      struct rte_crypto_rsa_xform *rsa_ctx)
 727 {
 728         struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa;
 729
 730         switch (rsa->op_type) {
 731         case RTE_CRYPTO_ASYM_OP_ENCRYPT:
 732                 rsa->cipher.length = rsa_ctx->n.length;
 733                 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length);
 734                 break;
 735         case RTE_CRYPTO_ASYM_OP_DECRYPT:
 736                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 737                         rsa->message.length = rsa_ctx->n.length;
 738                         memcpy(rsa->message.data, req->rptr,
 739                                rsa->message.length);
 740                 } else {
 741                         /* Get length of decrypted output */
 742                         rsa->message.length = rte_cpu_to_be_16
 743                                              (*((uint16_t *)req->rptr));
 744                         /*
 745                          * Offset output data pointer by length field
 746                          * (2 bytes) and copy decrypted data.
 747                          */
 748                         memcpy(rsa->message.data, req->rptr + 2,
 749                                rsa->message.length);
 750                 }
 751                 break;
 752         case RTE_CRYPTO_ASYM_OP_SIGN:
 753                 rsa->sign.length = rsa_ctx->n.length;
 754                 memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 755                 break;
 756         case RTE_CRYPTO_ASYM_OP_VERIFY:
 757                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 758                         rsa->sign.length = rsa_ctx->n.length;
 759                         memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 760                 } else {
 761                         /* Get length of signed output */
 762                         rsa->sign.length = rte_cpu_to_be_16
 763                                           (*((uint16_t *)req->rptr));
 764                         /*
 765                          * Offset output data pointer by length field
 766                          * (2 bytes) and copy signed data.
 767                          */
 768                         memcpy(rsa->sign.data, req->rptr + 2,
 769                                rsa->sign.length);
 770                 }
 771                 if (memcmp(rsa->sign.data, rsa->message.data,
 772                            rsa->message.length)) {
 773                         CPT_LOG_DP_ERR("RSA verification failed");
 774                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 775                 }
 776                 break;
 777         default:
 778                 CPT_LOG_DP_DEBUG("Invalid RSA operation type");
 779                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 780                 break;
 781         }
 782 }
 783
 784 static __rte_always_inline void
 785 otx2_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa,
 786                                struct cpt_request_info *req,
 787                                struct cpt_asym_ec_ctx *ec)
 788 {
 789         int prime_len = ec_grp[ec->curveid].prime.length;
 790
 791         if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)
 792                 return;
 793
 794         /* Separate out sign r and s components */
 795         memcpy(ecdsa->r.data, req->rptr, prime_len);
 796         memcpy(ecdsa->s.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 797         ecdsa->r.length = prime_len;
 798         ecdsa->s.length = prime_len;
 799 }
 800
 801 static __rte_always_inline void
 802 otx2_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm,
 803                              struct cpt_request_info *req,
 804                              struct cpt_asym_ec_ctx *ec)
 805 {
 806         int prime_len = ec_grp[ec->curveid].prime.length;
 807
 808         memcpy(ecpm->r.x.data, req->rptr, prime_len);
 809         memcpy(ecpm->r.y.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 810         ecpm->r.x.length = prime_len;
 811         ecpm->r.y.length = prime_len;
 812 }
 813
 814 static void
 815 otx2_cpt_asym_post_process(struct rte_crypto_op *cop,
 816                            struct cpt_request_info *req)
 817 {
 818         struct rte_crypto_asym_op *op = cop->asym;
 819         struct cpt_asym_sess_misc *sess;
 820
 821         sess = get_asym_session_private_data(op->session,
 822                                              otx2_cryptodev_driver_id);
 823
 824         switch (sess->xfrm_type) {
 825         case RTE_CRYPTO_ASYM_XFORM_RSA:
 826                 otx2_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx);
 827                 break;
 828         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 829                 op->modex.result.length = sess->mod_ctx.modulus.length;
 830                 memcpy(op->modex.result.data, req->rptr,
 831                        op->modex.result.length);
 832                 break;
 833         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 834                 otx2_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx);
 835                 break;
 836         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 837                 otx2_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx);
 838                 break;
 839         default:
 840                 CPT_LOG_DP_DEBUG("Invalid crypto xform type");
 841                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 842                 break;
 843         }
 844 }
 845
 846 static void
 847 otx2_cpt_sec_post_process(struct rte_crypto_op *cop, uintptr_t *rsp)
 848 {
 849         struct cpt_request_info *req = (struct cpt_request_info *)rsp[2];
 850         vq_cmd_word0_t *word0 = (vq_cmd_word0_t *)&req->ist.ei0;
 851         struct rte_crypto_sym_op *sym_op = cop->sym;
 852         struct rte_mbuf *m = sym_op->m_src;
 853         struct rte_ipv6_hdr *ip6;
 854         struct rte_ipv4_hdr *ip;
 855         uint16_t m_len;
 856         int mdata_len;
 857         char *data;
 858
 859         mdata_len = (int)rsp[3];
 860         rte_pktmbuf_trim(m, mdata_len);
 861
 862         if ((word0->s.opcode & 0xff) == OTX2_IPSEC_PO_PROCESS_IPSEC_INB) {
 863                 data = rte_pktmbuf_mtod(m, char *);
 864
 865                 if (rsp[4] == RTE_SECURITY_IPSEC_TUNNEL_IPV4) {
 866                         ip = (struct rte_ipv4_hdr *)(data +
 867                                 OTX2_IPSEC_PO_INB_RPTR_HDR);
 868                         m_len = rte_be_to_cpu_16(ip->total_length);
 869                 } else {
 870                         ip6 = (struct rte_ipv6_hdr *)(data +
 871                                 OTX2_IPSEC_PO_INB_RPTR_HDR);
 872                         m_len = rte_be_to_cpu_16(ip6->payload_len) +
 873                                 sizeof(struct rte_ipv6_hdr);
 874                 }
 875
 876                 m->data_len = m_len;
 877                 m->pkt_len = m_len;
 878                 m->data_off += OTX2_IPSEC_PO_INB_RPTR_HDR;
 879         }
 880 }
 881
 882 static inline void
 883 otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 884                               uintptr_t *rsp, uint8_t cc)
 885 {
 886         unsigned int sz;
 887
 888         if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 889                 if (cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 890                         if (likely(cc == OTX2_IPSEC_PO_CC_SUCCESS)) {
 891                                 otx2_cpt_sec_post_process(cop, rsp);
 892                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 893                         } else
 894                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 895
 896                         return;
 897                 }
 898
 899                 if (likely(cc == NO_ERR)) {
 900                         /* Verify authentication data if required */
 901                         if (unlikely(rsp[2]))
 902                                 compl_auth_verify(cop, (uint8_t *)rsp[2],
 903                                                  rsp[3]);
 904                         else
 905                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 906                 } else {
 907                         if (cc == ERR_GC_ICV_MISCOMPARE)
 908                                 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 909                         else
 910                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 911                 }
 912
 913                 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 914                         sym_session_clear(otx2_cryptodev_driver_id,
 915                                           cop->sym->session);
 916                         sz = rte_cryptodev_sym_get_existing_header_session_size(
 917                                         cop->sym->session);
 918                         memset(cop->sym->session, 0, sz);
 919                         rte_mempool_put(qp->sess_mp, cop->sym->session);
 920                         cop->sym->session = NULL;
 921                 }
 922         }
 923
 924         if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 925                 if (likely(cc == NO_ERR)) {
 926                         cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 927                         /*
 928                          * Pass cpt_req_info stored in metabuf during
 929                          * enqueue.
 930                          */
 931                         rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t));
 932                         otx2_cpt_asym_post_process(cop,
 933                                         (struct cpt_request_info *)rsp);
 934                 } else
 935                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 936         }
 937 }
 938
 939 static __rte_always_inline uint8_t
 940 otx2_cpt_compcode_get(struct cpt_request_info *req)
 941 {
 942         volatile struct cpt_res_s_9s *res;
 943         uint8_t ret;
 944
 945         res = (volatile struct cpt_res_s_9s *)req->completion_addr;
 946
 947         if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
 948                 if (rte_get_timer_cycles() < req->time_out)
 949                         return ERR_REQ_PENDING;
 950
 951                 CPT_LOG_DP_ERR("Request timed out");
 952                 return ERR_REQ_TIMEOUT;
 953         }
 954
 955         if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
 956                 ret = NO_ERR;
 957                 if (unlikely(res->uc_compcode)) {
 958                         ret = res->uc_compcode;
 959                         CPT_LOG_DP_DEBUG("Request failed with microcode error");
 960                         CPT_LOG_DP_DEBUG("MC completion code 0x%x",
 961                                          res->uc_compcode);
 962                 }
 963         } else {
 964                 CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
 965
 966                 ret = res->compcode;
 967                 switch (res->compcode) {
 968                 case CPT_9X_COMP_E_INSTERR:
 969                         CPT_LOG_DP_ERR("Request failed with instruction error");
 970                         break;
 971                 case CPT_9X_COMP_E_FAULT:
 972                         CPT_LOG_DP_ERR("Request failed with DMA fault");
 973                         break;
 974                 case CPT_9X_COMP_E_HWERR:
 975                         CPT_LOG_DP_ERR("Request failed with hardware error");
 976                         break;
 977                 default:
 978                         CPT_LOG_DP_ERR("Request failed with unknown completion code");
 979                 }
 980         }
 981
 982         return ret;
 983 }
 984
 985 static uint16_t
 986 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 987 {
 988         int i, nb_pending, nb_completed;
 989         struct otx2_cpt_qp *qp = qptr;
 990         struct pending_queue *pend_q;
 991         struct cpt_request_info *req;
 992         struct rte_crypto_op *cop;
 993         uint8_t cc[nb_ops];
 994         struct rid *rid;
 995         uintptr_t *rsp;
 996         void *metabuf;
 997
 998         pend_q = &qp->pend_q;
 999
1000         nb_pending = pend_q->pending_count;
1001
1002         if (nb_ops > nb_pending)
1003                 nb_ops = nb_pending;
1004
1005         for (i = 0; i < nb_ops; i++) {
1006                 rid = &pend_q->rid_queue[pend_q->deq_head];
1007                 req = (struct cpt_request_info *)(rid->rid);
1008
1009                 cc[i] = otx2_cpt_compcode_get(req);
1010
1011                 if (unlikely(cc[i] == ERR_REQ_PENDING))
1012                         break;
1013
1014                 ops[i] = req->op;
1015
1016                 MOD_INC(pend_q->deq_head, OTX2_CPT_DEFAULT_CMD_QLEN);
1017                 pend_q->pending_count -= 1;
1018         }
1019
1020         nb_completed = i;
1021
1022         for (i = 0; i < nb_completed; i++) {
1023                 rsp = (void *)ops[i];
1024
1025                 metabuf = (void *)rsp[0];
1026                 cop = (void *)rsp[1];
1027
1028                 ops[i] = cop;
1029
1030                 otx2_cpt_dequeue_post_process(qp, cop, rsp, cc[i]);
1031
1032                 free_op_meta(metabuf, qp->meta_info.pool);
1033         }
1034
1035         return nb_completed;
1036 }
1037
1038 /* PMD ops */
1039
1040 static int
1041 otx2_cpt_dev_config(struct rte_cryptodev *dev,
1042                     struct rte_cryptodev_config *conf)
1043 {
1044         struct otx2_cpt_vf *vf = dev->data->dev_private;
1045         int ret;
1046
1047         if (conf->nb_queue_pairs > vf->max_queues) {
1048                 CPT_LOG_ERR("Invalid number of queue pairs requested");
1049                 return -EINVAL;
1050         }
1051
1052         dev->feature_flags &= ~conf->ff_disable;
1053
1054         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
1055                 /* Initialize shared FPM table */
1056                 ret = cpt_fpm_init(otx2_fpm_iova);
1057                 if (ret)
1058                         return ret;
1059         }
1060
1061         /* Unregister error interrupts */
1062         if (vf->err_intr_registered)
1063                 otx2_cpt_err_intr_unregister(dev);
1064
1065         /* Detach queues */
1066         if (vf->nb_queues) {
1067                 ret = otx2_cpt_queues_detach(dev);
1068                 if (ret) {
1069                         CPT_LOG_ERR("Could not detach CPT queues");
1070                         return ret;
1071                 }
1072         }
1073
1074         /* Attach queues */
1075         ret = otx2_cpt_queues_attach(dev, conf->nb_queue_pairs);
1076         if (ret) {
1077                 CPT_LOG_ERR("Could not attach CPT queues");
1078                 return -ENODEV;
1079         }
1080
1081         ret = otx2_cpt_msix_offsets_get(dev);
1082         if (ret) {
1083                 CPT_LOG_ERR("Could not get MSI-X offsets");
1084                 goto queues_detach;
1085         }
1086
1087         /* Register error interrupts */
1088         ret = otx2_cpt_err_intr_register(dev);
1089         if (ret) {
1090                 CPT_LOG_ERR("Could not register error interrupts");
1091                 goto queues_detach;
1092         }
1093
1094         ret = otx2_cpt_inline_init(dev);
1095         if (ret) {
1096                 CPT_LOG_ERR("Could not enable inline IPsec");
1097                 goto intr_unregister;
1098         }
1099
1100         dev->enqueue_burst = otx2_cpt_enqueue_burst;
1101         dev->dequeue_burst = otx2_cpt_dequeue_burst;
1102
1103         rte_mb();
1104         return 0;
1105
1106 intr_unregister:
1107         otx2_cpt_err_intr_unregister(dev);
1108 queues_detach:
1109         otx2_cpt_queues_detach(dev);
1110         return ret;
1111 }
1112
1113 static int
1114 otx2_cpt_dev_start(struct rte_cryptodev *dev)
1115 {
1116         RTE_SET_USED(dev);
1117
1118         CPT_PMD_INIT_FUNC_TRACE();
1119
1120         return 0;
1121 }
1122
1123 static void
1124 otx2_cpt_dev_stop(struct rte_cryptodev *dev)
1125 {
1126         CPT_PMD_INIT_FUNC_TRACE();
1127
1128         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)
1129                 cpt_fpm_clear();
1130 }
1131
1132 static int
1133 otx2_cpt_dev_close(struct rte_cryptodev *dev)
1134 {
1135         struct otx2_cpt_vf *vf = dev->data->dev_private;
1136         int i, ret = 0;
1137
1138         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1139                 ret = otx2_cpt_queue_pair_release(dev, i);
1140                 if (ret)
1141                         return ret;
1142         }
1143
1144         /* Unregister error interrupts */
1145         if (vf->err_intr_registered)
1146                 otx2_cpt_err_intr_unregister(dev);
1147
1148         /* Detach queues */
1149         if (vf->nb_queues) {
1150                 ret = otx2_cpt_queues_detach(dev);
1151                 if (ret)
1152                         CPT_LOG_ERR("Could not detach CPT queues");
1153         }
1154
1155         return ret;
1156 }
1157
1158 static void
1159 otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
1160                       struct rte_cryptodev_info *info)
1161 {
1162         struct otx2_cpt_vf *vf = dev->data->dev_private;
1163
1164         if (info != NULL) {
1165                 info->max_nb_queue_pairs = vf->max_queues;
1166                 info->feature_flags = dev->feature_flags;
1167                 info->capabilities = otx2_cpt_capabilities_get();
1168                 info->sym.max_nb_sessions = 0;
1169                 info->driver_id = otx2_cryptodev_driver_id;
1170                 info->min_mbuf_headroom_req = OTX2_CPT_MIN_HEADROOM_REQ;
1171                 info->min_mbuf_tailroom_req = OTX2_CPT_MIN_TAILROOM_REQ;
1172         }
1173 }
1174
1175 static int
1176 otx2_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1177                           const struct rte_cryptodev_qp_conf *conf,
1178                           int socket_id __rte_unused)
1179 {
1180         uint8_t grp_mask = OTX2_CPT_ENG_GRPS_MASK;
1181         struct rte_pci_device *pci_dev;
1182         struct otx2_cpt_qp *qp;
1183
1184         CPT_PMD_INIT_FUNC_TRACE();
1185
1186         if (dev->data->queue_pairs[qp_id] != NULL)
1187                 otx2_cpt_queue_pair_release(dev, qp_id);
1188
1189         if (conf->nb_descriptors > OTX2_CPT_DEFAULT_CMD_QLEN) {
1190                 CPT_LOG_ERR("Could not setup queue pair for %u descriptors",
1191                             conf->nb_descriptors);
1192                 return -EINVAL;
1193         }
1194
1195         pci_dev = RTE_DEV_TO_PCI(dev->device);
1196
1197         if (pci_dev->mem_resource[2].addr == NULL) {
1198                 CPT_LOG_ERR("Invalid PCI mem address");
1199                 return -EIO;
1200         }
1201
1202         qp = otx2_cpt_qp_create(dev, qp_id, grp_mask);
1203         if (qp == NULL) {
1204                 CPT_LOG_ERR("Could not create queue pair %d", qp_id);
1205                 return -ENOMEM;
1206         }
1207
1208         qp->sess_mp = conf->mp_session;
1209         qp->sess_mp_priv = conf->mp_session_private;
1210         dev->data->queue_pairs[qp_id] = qp;
1211
1212         return 0;
1213 }
1214
1215 static int
1216 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
1217 {
1218         struct otx2_cpt_qp *qp = dev->data->queue_pairs[qp_id];
1219         int ret;
1220
1221         CPT_PMD_INIT_FUNC_TRACE();
1222
1223         if (qp == NULL)
1224                 return -EINVAL;
1225
1226         CPT_LOG_INFO("Releasing queue pair %d", qp_id);
1227
1228         ret = otx2_cpt_qp_destroy(dev, qp);
1229         if (ret) {
1230                 CPT_LOG_ERR("Could not destroy queue pair %d", qp_id);
1231                 return ret;
1232         }
1233
1234         dev->data->queue_pairs[qp_id] = NULL;
1235
1236         return 0;
1237 }
1238
1239 static unsigned int
1240 otx2_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1241 {
1242         return cpt_get_session_size();
1243 }
1244
1245 static int
1246 otx2_cpt_sym_session_configure(struct rte_cryptodev *dev,
1247                                struct rte_crypto_sym_xform *xform,
1248                                struct rte_cryptodev_sym_session *sess,
1249                                struct rte_mempool *pool)
1250 {
1251         CPT_PMD_INIT_FUNC_TRACE();
1252
1253         return sym_session_configure(dev->driver_id, xform, sess, pool);
1254 }
1255
1256 static void
1257 otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
1258                            struct rte_cryptodev_sym_session *sess)
1259 {
1260         CPT_PMD_INIT_FUNC_TRACE();
1261
1262         return sym_session_clear(dev->driver_id, sess);
1263 }
1264
1265 static unsigned int
1266 otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
1267 {
1268         return sizeof(struct cpt_asym_sess_misc);
1269 }
1270
1271 static int
1272 otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
1273                           struct rte_crypto_asym_xform *xform,
1274                           struct rte_cryptodev_asym_session *sess,
1275                           struct rte_mempool *pool)
1276 {
1277         struct cpt_asym_sess_misc *priv;
1278         int ret;
1279
1280         CPT_PMD_INIT_FUNC_TRACE();
1281
1282         if (rte_mempool_get(pool, (void **)&priv)) {
1283                 CPT_LOG_ERR("Could not allocate session_private_data");
1284                 return -ENOMEM;
1285         }
1286
1287         memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
1288
1289         ret = cpt_fill_asym_session_parameters(priv, xform);
1290         if (ret) {
1291                 CPT_LOG_ERR("Could not configure session parameters");
1292
1293                 /* Return session to mempool */
1294                 rte_mempool_put(pool, priv);
1295                 return ret;
1296         }
1297
1298         set_asym_session_private_data(sess, dev->driver_id, priv);
1299         return 0;
1300 }
1301
1302 static void
1303 otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
1304                             struct rte_cryptodev_asym_session *sess)
1305 {
1306         struct cpt_asym_sess_misc *priv;
1307         struct rte_mempool *sess_mp;
1308
1309         CPT_PMD_INIT_FUNC_TRACE();
1310
1311         priv = get_asym_session_private_data(sess, dev->driver_id);
1312         if (priv == NULL)
1313                 return;
1314
1315         /* Free resources allocated in session_cfg */
1316         cpt_free_asym_session_parameters(priv);
1317
1318         /* Reset and free object back to pool */
1319         memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
1320         sess_mp = rte_mempool_from_obj(priv);
1321         set_asym_session_private_data(sess, dev->driver_id, NULL);
1322         rte_mempool_put(sess_mp, priv);
1323 }
1324
1325 struct rte_cryptodev_ops otx2_cpt_ops = {
1326         /* Device control ops */
1327         .dev_configure = otx2_cpt_dev_config,
1328         .dev_start = otx2_cpt_dev_start,
1329         .dev_stop = otx2_cpt_dev_stop,
1330         .dev_close = otx2_cpt_dev_close,
1331         .dev_infos_get = otx2_cpt_dev_info_get,
1332
1333         .stats_get = NULL,
1334         .stats_reset = NULL,
1335         .queue_pair_setup = otx2_cpt_queue_pair_setup,
1336         .queue_pair_release = otx2_cpt_queue_pair_release,
1337
1338         /* Symmetric crypto ops */
1339         .sym_session_get_size = otx2_cpt_sym_session_get_size,
1340         .sym_session_configure = otx2_cpt_sym_session_configure,
1341         .sym_session_clear = otx2_cpt_sym_session_clear,
1342
1343         /* Asymmetric crypto ops */
1344         .asym_session_get_size = otx2_cpt_asym_session_size_get,
1345         .asym_session_configure = otx2_cpt_asym_session_cfg,
1346         .asym_session_clear = otx2_cpt_asym_session_clear,
1347
1348 };