drivers/crypto/octeontx2/otx2_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <unistd.h>
   6
   7 #include <rte_cryptodev_pmd.h>
   8 #include <rte_errno.h>
   9 #include <rte_ethdev.h>
  10
  11 #include "otx2_cryptodev.h"
  12 #include "otx2_cryptodev_capabilities.h"
  13 #include "otx2_cryptodev_hw_access.h"
  14 #include "otx2_cryptodev_mbox.h"
  15 #include "otx2_cryptodev_ops.h"
  16 #include "otx2_mbox.h"
  17 #include "otx2_sec_idev.h"
  18
  19 #include "cpt_hw_types.h"
  20 #include "cpt_pmd_logs.h"
  21 #include "cpt_pmd_ops_helper.h"
  22 #include "cpt_ucode.h"
  23 #include "cpt_ucode_asym.h"
  24
  25 #define METABUF_POOL_CACHE_SIZE 512
  26
  27 static uint64_t otx2_fpm_iova[CPT_EC_ID_PMAX];
  28
  29 /* Forward declarations */
  30
  31 static int
  32 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
  33
  34 static void
  35 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
  36 {
  37         snprintf(name, size, "otx2_cpt_lf_mem_%u:%u", dev_id, qp_id);
  38 }
  39
  40 static int
  41 otx2_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
  42                                 struct otx2_cpt_qp *qp, uint8_t qp_id,
  43                                 int nb_elements)
  44 {
  45         char mempool_name[RTE_MEMPOOL_NAMESIZE];
  46         struct cpt_qp_meta_info *meta_info;
  47         struct rte_mempool *pool;
  48         int ret, max_mlen;
  49         int asym_mlen = 0;
  50         int lb_mlen = 0;
  51         int sg_mlen = 0;
  52
  53         if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
  54
  55                 /* Get meta len for scatter gather mode */
  56                 sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
  57
  58                 /* Extra 32B saved for future considerations */
  59                 sg_mlen += 4 * sizeof(uint64_t);
  60
  61                 /* Get meta len for linear buffer (direct) mode */
  62                 lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
  63
  64                 /* Extra 32B saved for future considerations */
  65                 lb_mlen += 4 * sizeof(uint64_t);
  66         }
  67
  68         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
  69
  70                 /* Get meta len required for asymmetric operations */
  71                 asym_mlen = cpt_pmd_ops_helper_asym_get_mlen();
  72         }
  73
  74         /*
  75          * Check max requirement for meta buffer to
  76          * support crypto op of any type (sym/asym).
  77          */
  78         max_mlen = RTE_MAX(RTE_MAX(lb_mlen, sg_mlen), asym_mlen);
  79
  80         /* Allocate mempool */
  81
  82         snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "otx2_cpt_mb_%u:%u",
  83                  dev->data->dev_id, qp_id);
  84
  85         pool = rte_mempool_create_empty(mempool_name, nb_elements, max_mlen,
  86                                         METABUF_POOL_CACHE_SIZE, 0,
  87                                         rte_socket_id(), 0);
  88
  89         if (pool == NULL) {
  90                 CPT_LOG_ERR("Could not create mempool for metabuf");
  91                 return rte_errno;
  92         }
  93
  94         ret = rte_mempool_set_ops_byname(pool, RTE_MBUF_DEFAULT_MEMPOOL_OPS,
  95                                          NULL);
  96         if (ret) {
  97                 CPT_LOG_ERR("Could not set mempool ops");
  98                 goto mempool_free;
  99         }
 100
 101         ret = rte_mempool_populate_default(pool);
 102         if (ret <= 0) {
 103                 CPT_LOG_ERR("Could not populate metabuf pool");
 104                 goto mempool_free;
 105         }
 106
 107         meta_info = &qp->meta_info;
 108
 109         meta_info->pool = pool;
 110         meta_info->lb_mlen = lb_mlen;
 111         meta_info->sg_mlen = sg_mlen;
 112
 113         return 0;
 114
 115 mempool_free:
 116         rte_mempool_free(pool);
 117         return ret;
 118 }
 119
 120 static void
 121 otx2_cpt_metabuf_mempool_destroy(struct otx2_cpt_qp *qp)
 122 {
 123         struct cpt_qp_meta_info *meta_info = &qp->meta_info;
 124
 125         rte_mempool_free(meta_info->pool);
 126
 127         meta_info->pool = NULL;
 128         meta_info->lb_mlen = 0;
 129         meta_info->sg_mlen = 0;
 130 }
 131
 132 static int
 133 otx2_cpt_qp_inline_cfg(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 134 {
 135         static rte_atomic16_t port_offset = RTE_ATOMIC16_INIT(-1);
 136         uint16_t port_id, nb_ethport = rte_eth_dev_count_avail();
 137         int i, ret;
 138
 139         for (i = 0; i < nb_ethport; i++) {
 140                 port_id = rte_atomic16_add_return(&port_offset, 1) % nb_ethport;
 141                 if (otx2_eth_dev_is_sec_capable(&rte_eth_devices[port_id]))
 142                         break;
 143         }
 144
 145         if (i >= nb_ethport)
 146                 return 0;
 147
 148         ret = otx2_cpt_qp_ethdev_bind(dev, qp, port_id);
 149         if (ret)
 150                 return ret;
 151
 152         /* Publish inline Tx QP to eth dev security */
 153         ret = otx2_sec_idev_tx_cpt_qp_add(port_id, qp);
 154         if (ret)
 155                 return ret;
 156
 157         return 0;
 158 }
 159
 160 static struct otx2_cpt_qp *
 161 otx2_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
 162                    uint8_t group)
 163 {
 164         struct otx2_cpt_vf *vf = dev->data->dev_private;
 165         uint64_t pg_sz = sysconf(_SC_PAGESIZE);
 166         const struct rte_memzone *lf_mem;
 167         uint32_t len, iq_len, size_div40;
 168         char name[RTE_MEMZONE_NAMESIZE];
 169         uint64_t used_len, iova;
 170         struct otx2_cpt_qp *qp;
 171         uint64_t lmtline;
 172         uint8_t *va;
 173         int ret;
 174
 175         /* Allocate queue pair */
 176         qp = rte_zmalloc_socket("OCTEON TX2 Crypto PMD Queue Pair", sizeof(*qp),
 177                                 OTX2_ALIGN, 0);
 178         if (qp == NULL) {
 179                 CPT_LOG_ERR("Could not allocate queue pair");
 180                 return NULL;
 181         }
 182
 183         iq_len = OTX2_CPT_IQ_LEN;
 184
 185         /*
 186          * Queue size must be a multiple of 40 and effective queue size to
 187          * software is (size_div40 - 1) * 40
 188          */
 189         size_div40 = (iq_len + 40 - 1) / 40 + 1;
 190
 191         /* For pending queue */
 192         len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 193
 194         /* Space for instruction group memory */
 195         len += size_div40 * 16;
 196
 197         /* So that instruction queues start as pg size aligned */
 198         len = RTE_ALIGN(len, pg_sz);
 199
 200         /* For instruction queues */
 201         len += OTX2_CPT_IQ_LEN * sizeof(union cpt_inst_s);
 202
 203         /* Wastage after instruction queues */
 204         len = RTE_ALIGN(len, pg_sz);
 205
 206         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 207                             qp_id);
 208
 209         lf_mem = rte_memzone_reserve_aligned(name, len, vf->otx2_dev.node,
 210                         RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
 211                         RTE_CACHE_LINE_SIZE);
 212         if (lf_mem == NULL) {
 213                 CPT_LOG_ERR("Could not allocate reserved memzone");
 214                 goto qp_free;
 215         }
 216
 217         va = lf_mem->addr;
 218         iova = lf_mem->iova;
 219
 220         memset(va, 0, len);
 221
 222         ret = otx2_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
 223         if (ret) {
 224                 CPT_LOG_ERR("Could not create mempool for metabuf");
 225                 goto lf_mem_free;
 226         }
 227
 228         /* Initialize pending queue */
 229         qp->pend_q.rid_queue = (struct rid *)va;
 230         qp->pend_q.enq_tail = 0;
 231         qp->pend_q.deq_head = 0;
 232         qp->pend_q.pending_count = 0;
 233
 234         used_len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 235         used_len += size_div40 * 16;
 236         used_len = RTE_ALIGN(used_len, pg_sz);
 237         iova += used_len;
 238
 239         qp->iq_dma_addr = iova;
 240         qp->id = qp_id;
 241         qp->base = OTX2_CPT_LF_BAR2(vf, qp_id);
 242
 243         lmtline = vf->otx2_dev.bar2 +
 244                   (RVU_BLOCK_ADDR_LMT << 20 | qp_id << 12) +
 245                   OTX2_LMT_LF_LMTLINE(0);
 246
 247         qp->lmtline = (void *)lmtline;
 248
 249         qp->lf_nq_reg = qp->base + OTX2_CPT_LF_NQ(0);
 250
 251         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 252         if (ret && (ret != -ENOENT)) {
 253                 CPT_LOG_ERR("Could not delete inline configuration");
 254                 goto mempool_destroy;
 255         }
 256
 257         otx2_cpt_iq_disable(qp);
 258
 259         ret = otx2_cpt_qp_inline_cfg(dev, qp);
 260         if (ret) {
 261                 CPT_LOG_ERR("Could not configure queue for inline IPsec");
 262                 goto mempool_destroy;
 263         }
 264
 265         ret = otx2_cpt_iq_enable(dev, qp, group, OTX2_CPT_QUEUE_HI_PRIO,
 266                                  size_div40);
 267         if (ret) {
 268                 CPT_LOG_ERR("Could not enable instruction queue");
 269                 goto mempool_destroy;
 270         }
 271
 272         return qp;
 273
 274 mempool_destroy:
 275         otx2_cpt_metabuf_mempool_destroy(qp);
 276 lf_mem_free:
 277         rte_memzone_free(lf_mem);
 278 qp_free:
 279         rte_free(qp);
 280         return NULL;
 281 }
 282
 283 static int
 284 otx2_cpt_qp_destroy(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 285 {
 286         const struct rte_memzone *lf_mem;
 287         char name[RTE_MEMZONE_NAMESIZE];
 288         int ret;
 289
 290         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 291         if (ret && (ret != -ENOENT)) {
 292                 CPT_LOG_ERR("Could not delete inline configuration");
 293                 return ret;
 294         }
 295
 296         otx2_cpt_iq_disable(qp);
 297
 298         otx2_cpt_metabuf_mempool_destroy(qp);
 299
 300         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 301                             qp->id);
 302
 303         lf_mem = rte_memzone_lookup(name);
 304
 305         ret = rte_memzone_free(lf_mem);
 306         if (ret)
 307                 return ret;
 308
 309         rte_free(qp);
 310
 311         return 0;
 312 }
 313
 314 static int
 315 sym_xform_verify(struct rte_crypto_sym_xform *xform)
 316 {
 317         if (xform->next) {
 318                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 319                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 320                     xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 321                         return -ENOTSUP;
 322
 323                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 324                     xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT &&
 325                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 326                         return -ENOTSUP;
 327
 328                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 329                     xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
 330                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 331                     xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)
 332                         return -ENOTSUP;
 333
 334                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 335                     xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&
 336                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 337                     xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)
 338                         return -ENOTSUP;
 339
 340         } else {
 341                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 342                     xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&
 343                     xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
 344                         return -ENOTSUP;
 345         }
 346         return 0;
 347 }
 348
 349 static int
 350 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 351                       struct rte_cryptodev_sym_session *sess,
 352                       struct rte_mempool *pool)
 353 {
 354         struct cpt_sess_misc *misc;
 355         void *priv;
 356         int ret;
 357
 358         ret = sym_xform_verify(xform);
 359         if (unlikely(ret))
 360                 return ret;
 361
 362         if (unlikely(rte_mempool_get(pool, &priv))) {
 363                 CPT_LOG_ERR("Could not allocate session private data");
 364                 return -ENOMEM;
 365         }
 366
 367         memset(priv, 0, sizeof(struct cpt_sess_misc) +
 368                         offsetof(struct cpt_ctx, fctx));
 369
 370         misc = priv;
 371
 372         for ( ; xform != NULL; xform = xform->next) {
 373                 switch (xform->type) {
 374                 case RTE_CRYPTO_SYM_XFORM_AEAD:
 375                         ret = fill_sess_aead(xform, misc);
 376                         break;
 377                 case RTE_CRYPTO_SYM_XFORM_CIPHER:
 378                         ret = fill_sess_cipher(xform, misc);
 379                         break;
 380                 case RTE_CRYPTO_SYM_XFORM_AUTH:
 381                         if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
 382                                 ret = fill_sess_gmac(xform, misc);
 383                         else
 384                                 ret = fill_sess_auth(xform, misc);
 385                         break;
 386                 default:
 387                         ret = -1;
 388                 }
 389
 390                 if (ret)
 391                         goto priv_put;
 392         }
 393
 394         set_sym_session_private_data(sess, driver_id, misc);
 395
 396         misc->ctx_dma_addr = rte_mempool_virt2iova(misc) +
 397                              sizeof(struct cpt_sess_misc);
 398
 399         /*
 400          * IE engines support IPsec operations
 401          * SE engines support IPsec operations, Chacha-Poly and
 402          * Air-Crypto operations
 403          */
 404         if (misc->zsk_flag || misc->chacha_poly)
 405                 misc->egrp = OTX2_CPT_EGRP_SE;
 406         else
 407                 misc->egrp = OTX2_CPT_EGRP_SE_IE;
 408
 409         return 0;
 410
 411 priv_put:
 412         rte_mempool_put(pool, priv);
 413
 414         return -ENOTSUP;
 415 }
 416
 417 static void
 418 sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
 419 {
 420         void *priv = get_sym_session_private_data(sess, driver_id);
 421         struct rte_mempool *pool;
 422
 423         if (priv == NULL)
 424                 return;
 425
 426         memset(priv, 0, cpt_get_session_size());
 427
 428         pool = rte_mempool_from_obj(priv);
 429
 430         set_sym_session_private_data(sess, driver_id, NULL);
 431
 432         rte_mempool_put(pool, priv);
 433 }
 434
 435 static __rte_always_inline int32_t __rte_hot
 436 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 437                      struct pending_queue *pend_q,
 438                      struct cpt_request_info *req)
 439 {
 440         void *lmtline = qp->lmtline;
 441         union cpt_inst_s inst;
 442         uint64_t lmt_status;
 443
 444         if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 445                 return -EAGAIN;
 446
 447         inst.u[0] = 0;
 448         inst.s9x.res_addr = req->comp_baddr;
 449         inst.u[2] = 0;
 450         inst.u[3] = 0;
 451
 452         inst.s9x.ei0 = req->ist.ei0;
 453         inst.s9x.ei1 = req->ist.ei1;
 454         inst.s9x.ei2 = req->ist.ei2;
 455         inst.s9x.ei3 = req->ist.ei3;
 456
 457         req->time_out = rte_get_timer_cycles() +
 458                         DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 459
 460         do {
 461                 /* Copy CPT command to LMTLINE */
 462                 memcpy(lmtline, &inst, sizeof(inst));
 463
 464                 /*
 465                  * Make sure compiler does not reorder memcpy and ldeor.
 466                  * LMTST transactions are always flushed from the write
 467                  * buffer immediately, a DMB is not required to push out
 468                  * LMTSTs.
 469                  */
 470                 rte_cio_wmb();
 471                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 472         } while (lmt_status == 0);
 473
 474         pend_q->rid_queue[pend_q->enq_tail].rid = (uintptr_t)req;
 475
 476         /* We will use soft queue length here to limit requests */
 477         MOD_INC(pend_q->enq_tail, OTX2_CPT_DEFAULT_CMD_QLEN);
 478         pend_q->pending_count += 1;
 479
 480         return 0;
 481 }
 482
 483 static __rte_always_inline int32_t __rte_hot
 484 otx2_cpt_enqueue_asym(struct otx2_cpt_qp *qp,
 485                       struct rte_crypto_op *op,
 486                       struct pending_queue *pend_q)
 487 {
 488         struct cpt_qp_meta_info *minfo = &qp->meta_info;
 489         struct rte_crypto_asym_op *asym_op = op->asym;
 490         struct asym_op_params params = {0};
 491         struct cpt_asym_sess_misc *sess;
 492         vq_cmd_word3_t *w3;
 493         uintptr_t *cop;
 494         void *mdata;
 495         int ret;
 496
 497         if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) {
 498                 CPT_LOG_ERR("Could not allocate meta buffer for request");
 499                 return -ENOMEM;
 500         }
 501
 502         sess = get_asym_session_private_data(asym_op->session,
 503                                              otx2_cryptodev_driver_id);
 504
 505         /* Store IO address of the mdata to meta_buf */
 506         params.meta_buf = rte_mempool_virt2iova(mdata);
 507
 508         cop = mdata;
 509         cop[0] = (uintptr_t)mdata;
 510         cop[1] = (uintptr_t)op;
 511         cop[2] = cop[3] = 0ULL;
 512
 513         params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t));
 514         params.req->op = cop;
 515
 516         /* Adjust meta_buf to point to end of cpt_request_info structure */
 517         params.meta_buf += (4 * sizeof(uintptr_t)) +
 518                             sizeof(struct cpt_request_info);
 519         switch (sess->xfrm_type) {
 520         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 521                 ret = cpt_modex_prep(&params, &sess->mod_ctx);
 522                 if (unlikely(ret))
 523                         goto req_fail;
 524                 break;
 525         case RTE_CRYPTO_ASYM_XFORM_RSA:
 526                 ret = cpt_enqueue_rsa_op(op, &params, sess);
 527                 if (unlikely(ret))
 528                         goto req_fail;
 529                 break;
 530         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 531                 ret = cpt_enqueue_ecdsa_op(op, &params, sess, otx2_fpm_iova);
 532                 if (unlikely(ret))
 533                         goto req_fail;
 534                 break;
 535         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 536                 ret = cpt_ecpm_prep(&asym_op->ecpm, &params,
 537                                     sess->ec_ctx.curveid);
 538                 if (unlikely(ret))
 539                         goto req_fail;
 540                 break;
 541         default:
 542                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 543                 ret = -EINVAL;
 544                 goto req_fail;
 545         }
 546
 547         /* Set engine group of AE */
 548         w3 = (vq_cmd_word3_t *)&params.req->ist.ei3;
 549         w3->s.grp = OTX2_CPT_EGRP_AE;
 550
 551         ret = otx2_cpt_enqueue_req(qp, pend_q, params.req);
 552
 553         if (unlikely(ret)) {
 554                 CPT_LOG_DP_ERR("Could not enqueue crypto req");
 555                 goto req_fail;
 556         }
 557
 558         return 0;
 559
 560 req_fail:
 561         free_op_meta(mdata, minfo->pool);
 562
 563         return ret;
 564 }
 565
 566 static __rte_always_inline int __rte_hot
 567 otx2_cpt_enqueue_sym(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 568                      struct pending_queue *pend_q)
 569 {
 570         struct rte_crypto_sym_op *sym_op = op->sym;
 571         struct cpt_request_info *req;
 572         struct cpt_sess_misc *sess;
 573         vq_cmd_word3_t *w3;
 574         uint64_t cpt_op;
 575         void *mdata;
 576         int ret;
 577
 578         sess = get_sym_session_private_data(sym_op->session,
 579                                             otx2_cryptodev_driver_id);
 580
 581         cpt_op = sess->cpt_op;
 582
 583         if (cpt_op & CPT_OP_CIPHER_MASK)
 584                 ret = fill_fc_params(op, sess, &qp->meta_info, &mdata,
 585                                      (void **)&req);
 586         else
 587                 ret = fill_digest_params(op, sess, &qp->meta_info, &mdata,
 588                                          (void **)&req);
 589
 590         if (unlikely(ret)) {
 591                 CPT_LOG_DP_ERR("Crypto req : op %p, cpt_op 0x%x ret 0x%x",
 592                                 op, (unsigned int)cpt_op, ret);
 593                 return ret;
 594         }
 595
 596         w3 = ((vq_cmd_word3_t *)(&req->ist.ei3));
 597         w3->s.grp = sess->egrp;
 598
 599         ret = otx2_cpt_enqueue_req(qp, pend_q, req);
 600
 601         if (unlikely(ret)) {
 602                 /* Free buffer allocated by fill params routines */
 603                 free_op_meta(mdata, qp->meta_info.pool);
 604         }
 605
 606         return ret;
 607 }
 608
 609 static __rte_always_inline int __rte_hot
 610 otx2_cpt_enqueue_sym_sessless(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 611                               struct pending_queue *pend_q)
 612 {
 613         const int driver_id = otx2_cryptodev_driver_id;
 614         struct rte_crypto_sym_op *sym_op = op->sym;
 615         struct rte_cryptodev_sym_session *sess;
 616         int ret;
 617
 618         /* Create temporary session */
 619
 620         if (rte_mempool_get(qp->sess_mp, (void **)&sess))
 621                 return -ENOMEM;
 622
 623         ret = sym_session_configure(driver_id, sym_op->xform, sess,
 624                                     qp->sess_mp_priv);
 625         if (ret)
 626                 goto sess_put;
 627
 628         sym_op->session = sess;
 629
 630         ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 631
 632         if (unlikely(ret))
 633                 goto priv_put;
 634
 635         return 0;
 636
 637 priv_put:
 638         sym_session_clear(driver_id, sess);
 639 sess_put:
 640         rte_mempool_put(qp->sess_mp, sess);
 641         return ret;
 642 }
 643
 644 static uint16_t
 645 otx2_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 646 {
 647         uint16_t nb_allowed, count = 0;
 648         struct otx2_cpt_qp *qp = qptr;
 649         struct pending_queue *pend_q;
 650         struct rte_crypto_op *op;
 651         int ret;
 652
 653         pend_q = &qp->pend_q;
 654
 655         nb_allowed = OTX2_CPT_DEFAULT_CMD_QLEN - pend_q->pending_count;
 656         if (nb_ops > nb_allowed)
 657                 nb_ops = nb_allowed;
 658
 659         for (count = 0; count < nb_ops; count++) {
 660                 op = ops[count];
 661                 if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 662                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 663                                 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 664                         else
 665                                 ret = otx2_cpt_enqueue_sym_sessless(qp, op,
 666                                                                     pend_q);
 667                 } else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 668                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 669                                 ret = otx2_cpt_enqueue_asym(qp, op, pend_q);
 670                         else
 671                                 break;
 672                 } else
 673                         break;
 674
 675                 if (unlikely(ret))
 676                         break;
 677         }
 678
 679         return count;
 680 }
 681
 682 static __rte_always_inline void
 683 otx2_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req,
 684                      struct rte_crypto_rsa_xform *rsa_ctx)
 685 {
 686         struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa;
 687
 688         switch (rsa->op_type) {
 689         case RTE_CRYPTO_ASYM_OP_ENCRYPT:
 690                 rsa->cipher.length = rsa_ctx->n.length;
 691                 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length);
 692                 break;
 693         case RTE_CRYPTO_ASYM_OP_DECRYPT:
 694                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 695                         rsa->message.length = rsa_ctx->n.length;
 696                         memcpy(rsa->message.data, req->rptr,
 697                                rsa->message.length);
 698                 } else {
 699                         /* Get length of decrypted output */
 700                         rsa->message.length = rte_cpu_to_be_16
 701                                              (*((uint16_t *)req->rptr));
 702                         /*
 703                          * Offset output data pointer by length field
 704                          * (2 bytes) and copy decrypted data.
 705                          */
 706                         memcpy(rsa->message.data, req->rptr + 2,
 707                                rsa->message.length);
 708                 }
 709                 break;
 710         case RTE_CRYPTO_ASYM_OP_SIGN:
 711                 rsa->sign.length = rsa_ctx->n.length;
 712                 memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 713                 break;
 714         case RTE_CRYPTO_ASYM_OP_VERIFY:
 715                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 716                         rsa->sign.length = rsa_ctx->n.length;
 717                         memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 718                 } else {
 719                         /* Get length of signed output */
 720                         rsa->sign.length = rte_cpu_to_be_16
 721                                           (*((uint16_t *)req->rptr));
 722                         /*
 723                          * Offset output data pointer by length field
 724                          * (2 bytes) and copy signed data.
 725                          */
 726                         memcpy(rsa->sign.data, req->rptr + 2,
 727                                rsa->sign.length);
 728                 }
 729                 if (memcmp(rsa->sign.data, rsa->message.data,
 730                            rsa->message.length)) {
 731                         CPT_LOG_DP_ERR("RSA verification failed");
 732                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 733                 }
 734                 break;
 735         default:
 736                 CPT_LOG_DP_DEBUG("Invalid RSA operation type");
 737                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 738                 break;
 739         }
 740 }
 741
 742 static __rte_always_inline void
 743 otx2_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa,
 744                                struct cpt_request_info *req,
 745                                struct cpt_asym_ec_ctx *ec)
 746 {
 747         int prime_len = ec_grp[ec->curveid].prime.length;
 748
 749         if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)
 750                 return;
 751
 752         /* Separate out sign r and s components */
 753         memcpy(ecdsa->r.data, req->rptr, prime_len);
 754         memcpy(ecdsa->s.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 755         ecdsa->r.length = prime_len;
 756         ecdsa->s.length = prime_len;
 757 }
 758
 759 static __rte_always_inline void
 760 otx2_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm,
 761                              struct cpt_request_info *req,
 762                              struct cpt_asym_ec_ctx *ec)
 763 {
 764         int prime_len = ec_grp[ec->curveid].prime.length;
 765
 766         memcpy(ecpm->r.x.data, req->rptr, prime_len);
 767         memcpy(ecpm->r.y.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 768         ecpm->r.x.length = prime_len;
 769         ecpm->r.y.length = prime_len;
 770 }
 771
 772 static void
 773 otx2_cpt_asym_post_process(struct rte_crypto_op *cop,
 774                            struct cpt_request_info *req)
 775 {
 776         struct rte_crypto_asym_op *op = cop->asym;
 777         struct cpt_asym_sess_misc *sess;
 778
 779         sess = get_asym_session_private_data(op->session,
 780                                              otx2_cryptodev_driver_id);
 781
 782         switch (sess->xfrm_type) {
 783         case RTE_CRYPTO_ASYM_XFORM_RSA:
 784                 otx2_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx);
 785                 break;
 786         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 787                 op->modex.result.length = sess->mod_ctx.modulus.length;
 788                 memcpy(op->modex.result.data, req->rptr,
 789                        op->modex.result.length);
 790                 break;
 791         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 792                 otx2_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx);
 793                 break;
 794         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 795                 otx2_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx);
 796                 break;
 797         default:
 798                 CPT_LOG_DP_DEBUG("Invalid crypto xform type");
 799                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 800                 break;
 801         }
 802 }
 803
 804 static inline void
 805 otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 806                               uintptr_t *rsp, uint8_t cc)
 807 {
 808         if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 809                 if (likely(cc == NO_ERR)) {
 810                         /* Verify authentication data if required */
 811                         if (unlikely(rsp[2]))
 812                                 compl_auth_verify(cop, (uint8_t *)rsp[2],
 813                                                  rsp[3]);
 814                         else
 815                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 816                 } else {
 817                         if (cc == ERR_GC_ICV_MISCOMPARE)
 818                                 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 819                         else
 820                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 821                 }
 822
 823                 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 824                         sym_session_clear(otx2_cryptodev_driver_id,
 825                                           cop->sym->session);
 826                         rte_mempool_put(qp->sess_mp, cop->sym->session);
 827                         cop->sym->session = NULL;
 828                 }
 829         }
 830
 831         if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 832                 if (likely(cc == NO_ERR)) {
 833                         cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 834                         /*
 835                          * Pass cpt_req_info stored in metabuf during
 836                          * enqueue.
 837                          */
 838                         rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t));
 839                         otx2_cpt_asym_post_process(cop,
 840                                         (struct cpt_request_info *)rsp);
 841                 } else
 842                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 843         }
 844 }
 845
 846 static __rte_always_inline uint8_t
 847 otx2_cpt_compcode_get(struct cpt_request_info *req)
 848 {
 849         volatile struct cpt_res_s_9s *res;
 850         uint8_t ret;
 851
 852         res = (volatile struct cpt_res_s_9s *)req->completion_addr;
 853
 854         if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
 855                 if (rte_get_timer_cycles() < req->time_out)
 856                         return ERR_REQ_PENDING;
 857
 858                 CPT_LOG_DP_ERR("Request timed out");
 859                 return ERR_REQ_TIMEOUT;
 860         }
 861
 862         if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
 863                 ret = NO_ERR;
 864                 if (unlikely(res->uc_compcode)) {
 865                         ret = res->uc_compcode;
 866                         CPT_LOG_DP_DEBUG("Request failed with microcode error");
 867                         CPT_LOG_DP_DEBUG("MC completion code 0x%x",
 868                                          res->uc_compcode);
 869                 }
 870         } else {
 871                 CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
 872
 873                 ret = res->compcode;
 874                 switch (res->compcode) {
 875                 case CPT_9X_COMP_E_INSTERR:
 876                         CPT_LOG_DP_ERR("Request failed with instruction error");
 877                         break;
 878                 case CPT_9X_COMP_E_FAULT:
 879                         CPT_LOG_DP_ERR("Request failed with DMA fault");
 880                         break;
 881                 case CPT_9X_COMP_E_HWERR:
 882                         CPT_LOG_DP_ERR("Request failed with hardware error");
 883                         break;
 884                 default:
 885                         CPT_LOG_DP_ERR("Request failed with unknown completion code");
 886                 }
 887         }
 888
 889         return ret;
 890 }
 891
 892 static uint16_t
 893 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 894 {
 895         int i, nb_pending, nb_completed;
 896         struct otx2_cpt_qp *qp = qptr;
 897         struct pending_queue *pend_q;
 898         struct cpt_request_info *req;
 899         struct rte_crypto_op *cop;
 900         uint8_t cc[nb_ops];
 901         struct rid *rid;
 902         uintptr_t *rsp;
 903         void *metabuf;
 904
 905         pend_q = &qp->pend_q;
 906
 907         nb_pending = pend_q->pending_count;
 908
 909         if (nb_ops > nb_pending)
 910                 nb_ops = nb_pending;
 911
 912         for (i = 0; i < nb_ops; i++) {
 913                 rid = &pend_q->rid_queue[pend_q->deq_head];
 914                 req = (struct cpt_request_info *)(rid->rid);
 915
 916                 cc[i] = otx2_cpt_compcode_get(req);
 917
 918                 if (unlikely(cc[i] == ERR_REQ_PENDING))
 919                         break;
 920
 921                 ops[i] = req->op;
 922
 923                 MOD_INC(pend_q->deq_head, OTX2_CPT_DEFAULT_CMD_QLEN);
 924                 pend_q->pending_count -= 1;
 925         }
 926
 927         nb_completed = i;
 928
 929         for (i = 0; i < nb_completed; i++) {
 930                 rsp = (void *)ops[i];
 931
 932                 metabuf = (void *)rsp[0];
 933                 cop = (void *)rsp[1];
 934
 935                 ops[i] = cop;
 936
 937                 otx2_cpt_dequeue_post_process(qp, cop, rsp, cc[i]);
 938
 939                 free_op_meta(metabuf, qp->meta_info.pool);
 940         }
 941
 942         return nb_completed;
 943 }
 944
 945 /* PMD ops */
 946
 947 static int
 948 otx2_cpt_dev_config(struct rte_cryptodev *dev,
 949                     struct rte_cryptodev_config *conf)
 950 {
 951         struct otx2_cpt_vf *vf = dev->data->dev_private;
 952         int ret;
 953
 954         if (conf->nb_queue_pairs > vf->max_queues) {
 955                 CPT_LOG_ERR("Invalid number of queue pairs requested");
 956                 return -EINVAL;
 957         }
 958
 959         dev->feature_flags &= ~conf->ff_disable;
 960
 961         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
 962                 /* Initialize shared FPM table */
 963                 ret = cpt_fpm_init(otx2_fpm_iova);
 964                 if (ret)
 965                         return ret;
 966         }
 967
 968         /* Unregister error interrupts */
 969         if (vf->err_intr_registered)
 970                 otx2_cpt_err_intr_unregister(dev);
 971
 972         /* Detach queues */
 973         if (vf->nb_queues) {
 974                 ret = otx2_cpt_queues_detach(dev);
 975                 if (ret) {
 976                         CPT_LOG_ERR("Could not detach CPT queues");
 977                         return ret;
 978                 }
 979         }
 980
 981         /* Attach queues */
 982         ret = otx2_cpt_queues_attach(dev, conf->nb_queue_pairs);
 983         if (ret) {
 984                 CPT_LOG_ERR("Could not attach CPT queues");
 985                 return -ENODEV;
 986         }
 987
 988         ret = otx2_cpt_msix_offsets_get(dev);
 989         if (ret) {
 990                 CPT_LOG_ERR("Could not get MSI-X offsets");
 991                 goto queues_detach;
 992         }
 993
 994         /* Register error interrupts */
 995         ret = otx2_cpt_err_intr_register(dev);
 996         if (ret) {
 997                 CPT_LOG_ERR("Could not register error interrupts");
 998                 goto queues_detach;
 999         }
1000
1001         ret = otx2_cpt_inline_init(dev);
1002         if (ret) {
1003                 CPT_LOG_ERR("Could not enable inline IPsec");
1004                 goto intr_unregister;
1005         }
1006
1007         dev->enqueue_burst = otx2_cpt_enqueue_burst;
1008         dev->dequeue_burst = otx2_cpt_dequeue_burst;
1009
1010         rte_mb();
1011         return 0;
1012
1013 intr_unregister:
1014         otx2_cpt_err_intr_unregister(dev);
1015 queues_detach:
1016         otx2_cpt_queues_detach(dev);
1017         return ret;
1018 }
1019
1020 static int
1021 otx2_cpt_dev_start(struct rte_cryptodev *dev)
1022 {
1023         RTE_SET_USED(dev);
1024
1025         CPT_PMD_INIT_FUNC_TRACE();
1026
1027         return 0;
1028 }
1029
1030 static void
1031 otx2_cpt_dev_stop(struct rte_cryptodev *dev)
1032 {
1033         CPT_PMD_INIT_FUNC_TRACE();
1034
1035         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)
1036                 cpt_fpm_clear();
1037 }
1038
1039 static int
1040 otx2_cpt_dev_close(struct rte_cryptodev *dev)
1041 {
1042         struct otx2_cpt_vf *vf = dev->data->dev_private;
1043         int i, ret = 0;
1044
1045         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1046                 ret = otx2_cpt_queue_pair_release(dev, i);
1047                 if (ret)
1048                         return ret;
1049         }
1050
1051         /* Unregister error interrupts */
1052         if (vf->err_intr_registered)
1053                 otx2_cpt_err_intr_unregister(dev);
1054
1055         /* Detach queues */
1056         if (vf->nb_queues) {
1057                 ret = otx2_cpt_queues_detach(dev);
1058                 if (ret)
1059                         CPT_LOG_ERR("Could not detach CPT queues");
1060         }
1061
1062         return ret;
1063 }
1064
1065 static void
1066 otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
1067                       struct rte_cryptodev_info *info)
1068 {
1069         struct otx2_cpt_vf *vf = dev->data->dev_private;
1070
1071         if (info != NULL) {
1072                 info->max_nb_queue_pairs = vf->max_queues;
1073                 info->feature_flags = dev->feature_flags;
1074                 info->capabilities = otx2_cpt_capabilities_get(vf->hw_caps);
1075                 info->sym.max_nb_sessions = 0;
1076                 info->driver_id = otx2_cryptodev_driver_id;
1077                 info->min_mbuf_headroom_req = OTX2_CPT_MIN_HEADROOM_REQ;
1078                 info->min_mbuf_tailroom_req = OTX2_CPT_MIN_TAILROOM_REQ;
1079         }
1080 }
1081
1082 static int
1083 otx2_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1084                           const struct rte_cryptodev_qp_conf *conf,
1085                           int socket_id __rte_unused)
1086 {
1087         uint8_t grp_mask = OTX2_CPT_ENG_GRPS_MASK;
1088         struct rte_pci_device *pci_dev;
1089         struct otx2_cpt_qp *qp;
1090
1091         CPT_PMD_INIT_FUNC_TRACE();
1092
1093         if (dev->data->queue_pairs[qp_id] != NULL)
1094                 otx2_cpt_queue_pair_release(dev, qp_id);
1095
1096         if (conf->nb_descriptors > OTX2_CPT_DEFAULT_CMD_QLEN) {
1097                 CPT_LOG_ERR("Could not setup queue pair for %u descriptors",
1098                             conf->nb_descriptors);
1099                 return -EINVAL;
1100         }
1101
1102         pci_dev = RTE_DEV_TO_PCI(dev->device);
1103
1104         if (pci_dev->mem_resource[2].addr == NULL) {
1105                 CPT_LOG_ERR("Invalid PCI mem address");
1106                 return -EIO;
1107         }
1108
1109         qp = otx2_cpt_qp_create(dev, qp_id, grp_mask);
1110         if (qp == NULL) {
1111                 CPT_LOG_ERR("Could not create queue pair %d", qp_id);
1112                 return -ENOMEM;
1113         }
1114
1115         qp->sess_mp = conf->mp_session;
1116         qp->sess_mp_priv = conf->mp_session_private;
1117         dev->data->queue_pairs[qp_id] = qp;
1118
1119         return 0;
1120 }
1121
1122 static int
1123 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
1124 {
1125         struct otx2_cpt_qp *qp = dev->data->queue_pairs[qp_id];
1126         int ret;
1127
1128         CPT_PMD_INIT_FUNC_TRACE();
1129
1130         if (qp == NULL)
1131                 return -EINVAL;
1132
1133         CPT_LOG_INFO("Releasing queue pair %d", qp_id);
1134
1135         ret = otx2_cpt_qp_destroy(dev, qp);
1136         if (ret) {
1137                 CPT_LOG_ERR("Could not destroy queue pair %d", qp_id);
1138                 return ret;
1139         }
1140
1141         dev->data->queue_pairs[qp_id] = NULL;
1142
1143         return 0;
1144 }
1145
1146 static unsigned int
1147 otx2_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1148 {
1149         return cpt_get_session_size();
1150 }
1151
1152 static int
1153 otx2_cpt_sym_session_configure(struct rte_cryptodev *dev,
1154                                struct rte_crypto_sym_xform *xform,
1155                                struct rte_cryptodev_sym_session *sess,
1156                                struct rte_mempool *pool)
1157 {
1158         CPT_PMD_INIT_FUNC_TRACE();
1159
1160         return sym_session_configure(dev->driver_id, xform, sess, pool);
1161 }
1162
1163 static void
1164 otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
1165                            struct rte_cryptodev_sym_session *sess)
1166 {
1167         CPT_PMD_INIT_FUNC_TRACE();
1168
1169         return sym_session_clear(dev->driver_id, sess);
1170 }
1171
1172 static unsigned int
1173 otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
1174 {
1175         return sizeof(struct cpt_asym_sess_misc);
1176 }
1177
1178 static int
1179 otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
1180                           struct rte_crypto_asym_xform *xform,
1181                           struct rte_cryptodev_asym_session *sess,
1182                           struct rte_mempool *pool)
1183 {
1184         struct cpt_asym_sess_misc *priv;
1185         int ret;
1186
1187         CPT_PMD_INIT_FUNC_TRACE();
1188
1189         if (rte_mempool_get(pool, (void **)&priv)) {
1190                 CPT_LOG_ERR("Could not allocate session_private_data");
1191                 return -ENOMEM;
1192         }
1193
1194         memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
1195
1196         ret = cpt_fill_asym_session_parameters(priv, xform);
1197         if (ret) {
1198                 CPT_LOG_ERR("Could not configure session parameters");
1199
1200                 /* Return session to mempool */
1201                 rte_mempool_put(pool, priv);
1202                 return ret;
1203         }
1204
1205         set_asym_session_private_data(sess, dev->driver_id, priv);
1206         return 0;
1207 }
1208
1209 static void
1210 otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
1211                             struct rte_cryptodev_asym_session *sess)
1212 {
1213         struct cpt_asym_sess_misc *priv;
1214         struct rte_mempool *sess_mp;
1215
1216         CPT_PMD_INIT_FUNC_TRACE();
1217
1218         priv = get_asym_session_private_data(sess, dev->driver_id);
1219         if (priv == NULL)
1220                 return;
1221
1222         /* Free resources allocated in session_cfg */
1223         cpt_free_asym_session_parameters(priv);
1224
1225         /* Reset and free object back to pool */
1226         memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
1227         sess_mp = rte_mempool_from_obj(priv);
1228         set_asym_session_private_data(sess, dev->driver_id, NULL);
1229         rte_mempool_put(sess_mp, priv);
1230 }
1231
1232 struct rte_cryptodev_ops otx2_cpt_ops = {
1233         /* Device control ops */
1234         .dev_configure = otx2_cpt_dev_config,
1235         .dev_start = otx2_cpt_dev_start,
1236         .dev_stop = otx2_cpt_dev_stop,
1237         .dev_close = otx2_cpt_dev_close,
1238         .dev_infos_get = otx2_cpt_dev_info_get,
1239
1240         .stats_get = NULL,
1241         .stats_reset = NULL,
1242         .queue_pair_setup = otx2_cpt_queue_pair_setup,
1243         .queue_pair_release = otx2_cpt_queue_pair_release,
1244
1245         /* Symmetric crypto ops */
1246         .sym_session_get_size = otx2_cpt_sym_session_get_size,
1247         .sym_session_configure = otx2_cpt_sym_session_configure,
1248         .sym_session_clear = otx2_cpt_sym_session_clear,
1249
1250         /* Asymmetric crypto ops */
1251         .asym_session_get_size = otx2_cpt_asym_session_size_get,
1252         .asym_session_configure = otx2_cpt_asym_session_cfg,
1253         .asym_session_clear = otx2_cpt_asym_session_clear,
1254
1255 };