drivers/crypto/octeontx2/otx2_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <unistd.h>
   6
   7 #include <rte_cryptodev_pmd.h>
   8 #include <rte_errno.h>
   9 #include <rte_ethdev.h>
  10
  11 #include "otx2_cryptodev.h"
  12 #include "otx2_cryptodev_capabilities.h"
  13 #include "otx2_cryptodev_hw_access.h"
  14 #include "otx2_cryptodev_mbox.h"
  15 #include "otx2_cryptodev_ops.h"
  16 #include "otx2_cryptodev_ops_helper.h"
  17 #include "otx2_ipsec_po_ops.h"
  18 #include "otx2_mbox.h"
  19 #include "otx2_sec_idev.h"
  20 #include "otx2_security.h"
  21
  22 #include "cpt_hw_types.h"
  23 #include "cpt_pmd_logs.h"
  24 #include "cpt_pmd_ops_helper.h"
  25 #include "cpt_ucode.h"
  26 #include "cpt_ucode_asym.h"
  27
  28 #define METABUF_POOL_CACHE_SIZE 512
  29
  30 static uint64_t otx2_fpm_iova[CPT_EC_ID_PMAX];
  31
  32 /* Forward declarations */
  33
  34 static int
  35 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
  36
  37 static void
  38 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
  39 {
  40         snprintf(name, size, "otx2_cpt_lf_mem_%u:%u", dev_id, qp_id);
  41 }
  42
  43 static int
  44 otx2_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
  45                                 struct otx2_cpt_qp *qp, uint8_t qp_id,
  46                                 int nb_elements)
  47 {
  48         char mempool_name[RTE_MEMPOOL_NAMESIZE];
  49         struct cpt_qp_meta_info *meta_info;
  50         struct rte_mempool *pool;
  51         int ret, max_mlen;
  52         int asym_mlen = 0;
  53         int lb_mlen = 0;
  54         int sg_mlen = 0;
  55
  56         if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
  57
  58                 /* Get meta len for scatter gather mode */
  59                 sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
  60
  61                 /* Extra 32B saved for future considerations */
  62                 sg_mlen += 4 * sizeof(uint64_t);
  63
  64                 /* Get meta len for linear buffer (direct) mode */
  65                 lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
  66
  67                 /* Extra 32B saved for future considerations */
  68                 lb_mlen += 4 * sizeof(uint64_t);
  69         }
  70
  71         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
  72
  73                 /* Get meta len required for asymmetric operations */
  74                 asym_mlen = cpt_pmd_ops_helper_asym_get_mlen();
  75         }
  76
  77         /*
  78          * Check max requirement for meta buffer to
  79          * support crypto op of any type (sym/asym).
  80          */
  81         max_mlen = RTE_MAX(RTE_MAX(lb_mlen, sg_mlen), asym_mlen);
  82
  83         /* Allocate mempool */
  84
  85         snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "otx2_cpt_mb_%u:%u",
  86                  dev->data->dev_id, qp_id);
  87
  88         pool = rte_mempool_create_empty(mempool_name, nb_elements, max_mlen,
  89                                         METABUF_POOL_CACHE_SIZE, 0,
  90                                         rte_socket_id(), 0);
  91
  92         if (pool == NULL) {
  93                 CPT_LOG_ERR("Could not create mempool for metabuf");
  94                 return rte_errno;
  95         }
  96
  97         ret = rte_mempool_set_ops_byname(pool, RTE_MBUF_DEFAULT_MEMPOOL_OPS,
  98                                          NULL);
  99         if (ret) {
 100                 CPT_LOG_ERR("Could not set mempool ops");
 101                 goto mempool_free;
 102         }
 103
 104         ret = rte_mempool_populate_default(pool);
 105         if (ret <= 0) {
 106                 CPT_LOG_ERR("Could not populate metabuf pool");
 107                 goto mempool_free;
 108         }
 109
 110         meta_info = &qp->meta_info;
 111
 112         meta_info->pool = pool;
 113         meta_info->lb_mlen = lb_mlen;
 114         meta_info->sg_mlen = sg_mlen;
 115
 116         return 0;
 117
 118 mempool_free:
 119         rte_mempool_free(pool);
 120         return ret;
 121 }
 122
 123 static void
 124 otx2_cpt_metabuf_mempool_destroy(struct otx2_cpt_qp *qp)
 125 {
 126         struct cpt_qp_meta_info *meta_info = &qp->meta_info;
 127
 128         rte_mempool_free(meta_info->pool);
 129
 130         meta_info->pool = NULL;
 131         meta_info->lb_mlen = 0;
 132         meta_info->sg_mlen = 0;
 133 }
 134
 135 static int
 136 otx2_cpt_qp_inline_cfg(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 137 {
 138         static rte_atomic16_t port_offset = RTE_ATOMIC16_INIT(-1);
 139         uint16_t port_id, nb_ethport = rte_eth_dev_count_avail();
 140         int i, ret;
 141
 142         for (i = 0; i < nb_ethport; i++) {
 143                 port_id = rte_atomic16_add_return(&port_offset, 1) % nb_ethport;
 144                 if (otx2_eth_dev_is_sec_capable(&rte_eth_devices[port_id]))
 145                         break;
 146         }
 147
 148         if (i >= nb_ethport)
 149                 return 0;
 150
 151         ret = otx2_cpt_qp_ethdev_bind(dev, qp, port_id);
 152         if (ret)
 153                 return ret;
 154
 155         /* Publish inline Tx QP to eth dev security */
 156         ret = otx2_sec_idev_tx_cpt_qp_add(port_id, qp);
 157         if (ret)
 158                 return ret;
 159
 160         return 0;
 161 }
 162
 163 static struct otx2_cpt_qp *
 164 otx2_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
 165                    uint8_t group)
 166 {
 167         struct otx2_cpt_vf *vf = dev->data->dev_private;
 168         uint64_t pg_sz = sysconf(_SC_PAGESIZE);
 169         const struct rte_memzone *lf_mem;
 170         uint32_t len, iq_len, size_div40;
 171         char name[RTE_MEMZONE_NAMESIZE];
 172         uint64_t used_len, iova;
 173         struct otx2_cpt_qp *qp;
 174         uint64_t lmtline;
 175         uint8_t *va;
 176         int ret;
 177
 178         /* Allocate queue pair */
 179         qp = rte_zmalloc_socket("OCTEON TX2 Crypto PMD Queue Pair", sizeof(*qp),
 180                                 OTX2_ALIGN, 0);
 181         if (qp == NULL) {
 182                 CPT_LOG_ERR("Could not allocate queue pair");
 183                 return NULL;
 184         }
 185
 186         iq_len = OTX2_CPT_IQ_LEN;
 187
 188         /*
 189          * Queue size must be a multiple of 40 and effective queue size to
 190          * software is (size_div40 - 1) * 40
 191          */
 192         size_div40 = (iq_len + 40 - 1) / 40 + 1;
 193
 194         /* For pending queue */
 195         len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 196
 197         /* Space for instruction group memory */
 198         len += size_div40 * 16;
 199
 200         /* So that instruction queues start as pg size aligned */
 201         len = RTE_ALIGN(len, pg_sz);
 202
 203         /* For instruction queues */
 204         len += OTX2_CPT_IQ_LEN * sizeof(union cpt_inst_s);
 205
 206         /* Wastage after instruction queues */
 207         len = RTE_ALIGN(len, pg_sz);
 208
 209         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 210                             qp_id);
 211
 212         lf_mem = rte_memzone_reserve_aligned(name, len, vf->otx2_dev.node,
 213                         RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
 214                         RTE_CACHE_LINE_SIZE);
 215         if (lf_mem == NULL) {
 216                 CPT_LOG_ERR("Could not allocate reserved memzone");
 217                 goto qp_free;
 218         }
 219
 220         va = lf_mem->addr;
 221         iova = lf_mem->iova;
 222
 223         memset(va, 0, len);
 224
 225         ret = otx2_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
 226         if (ret) {
 227                 CPT_LOG_ERR("Could not create mempool for metabuf");
 228                 goto lf_mem_free;
 229         }
 230
 231         /* Initialize pending queue */
 232         qp->pend_q.rid_queue = (struct rid *)va;
 233         qp->pend_q.enq_tail = 0;
 234         qp->pend_q.deq_head = 0;
 235         qp->pend_q.pending_count = 0;
 236
 237         used_len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 238         used_len += size_div40 * 16;
 239         used_len = RTE_ALIGN(used_len, pg_sz);
 240         iova += used_len;
 241
 242         qp->iq_dma_addr = iova;
 243         qp->id = qp_id;
 244         qp->base = OTX2_CPT_LF_BAR2(vf, qp_id);
 245
 246         lmtline = vf->otx2_dev.bar2 +
 247                   (RVU_BLOCK_ADDR_LMT << 20 | qp_id << 12) +
 248                   OTX2_LMT_LF_LMTLINE(0);
 249
 250         qp->lmtline = (void *)lmtline;
 251
 252         qp->lf_nq_reg = qp->base + OTX2_CPT_LF_NQ(0);
 253
 254         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 255         if (ret && (ret != -ENOENT)) {
 256                 CPT_LOG_ERR("Could not delete inline configuration");
 257                 goto mempool_destroy;
 258         }
 259
 260         otx2_cpt_iq_disable(qp);
 261
 262         ret = otx2_cpt_qp_inline_cfg(dev, qp);
 263         if (ret) {
 264                 CPT_LOG_ERR("Could not configure queue for inline IPsec");
 265                 goto mempool_destroy;
 266         }
 267
 268         ret = otx2_cpt_iq_enable(dev, qp, group, OTX2_CPT_QUEUE_HI_PRIO,
 269                                  size_div40);
 270         if (ret) {
 271                 CPT_LOG_ERR("Could not enable instruction queue");
 272                 goto mempool_destroy;
 273         }
 274
 275         return qp;
 276
 277 mempool_destroy:
 278         otx2_cpt_metabuf_mempool_destroy(qp);
 279 lf_mem_free:
 280         rte_memzone_free(lf_mem);
 281 qp_free:
 282         rte_free(qp);
 283         return NULL;
 284 }
 285
 286 static int
 287 otx2_cpt_qp_destroy(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 288 {
 289         const struct rte_memzone *lf_mem;
 290         char name[RTE_MEMZONE_NAMESIZE];
 291         int ret;
 292
 293         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 294         if (ret && (ret != -ENOENT)) {
 295                 CPT_LOG_ERR("Could not delete inline configuration");
 296                 return ret;
 297         }
 298
 299         otx2_cpt_iq_disable(qp);
 300
 301         otx2_cpt_metabuf_mempool_destroy(qp);
 302
 303         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 304                             qp->id);
 305
 306         lf_mem = rte_memzone_lookup(name);
 307
 308         ret = rte_memzone_free(lf_mem);
 309         if (ret)
 310                 return ret;
 311
 312         rte_free(qp);
 313
 314         return 0;
 315 }
 316
 317 static int
 318 sym_xform_verify(struct rte_crypto_sym_xform *xform)
 319 {
 320         if (xform->next) {
 321                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 322                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 323                     xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 324                         return -ENOTSUP;
 325
 326                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 327                     xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT &&
 328                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 329                         return -ENOTSUP;
 330
 331                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 332                     xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
 333                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 334                     xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)
 335                         return -ENOTSUP;
 336
 337                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 338                     xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&
 339                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 340                     xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)
 341                         return -ENOTSUP;
 342
 343         } else {
 344                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 345                     xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&
 346                     xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
 347                         return -ENOTSUP;
 348         }
 349         return 0;
 350 }
 351
 352 static int
 353 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 354                       struct rte_cryptodev_sym_session *sess,
 355                       struct rte_mempool *pool)
 356 {
 357         struct rte_crypto_sym_xform *temp_xform = xform;
 358         struct cpt_sess_misc *misc;
 359         void *priv;
 360         int ret;
 361
 362         ret = sym_xform_verify(xform);
 363         if (unlikely(ret))
 364                 return ret;
 365
 366         if (unlikely(rte_mempool_get(pool, &priv))) {
 367                 CPT_LOG_ERR("Could not allocate session private data");
 368                 return -ENOMEM;
 369         }
 370
 371         memset(priv, 0, sizeof(struct cpt_sess_misc) +
 372                         offsetof(struct cpt_ctx, fctx));
 373
 374         misc = priv;
 375
 376         for ( ; xform != NULL; xform = xform->next) {
 377                 switch (xform->type) {
 378                 case RTE_CRYPTO_SYM_XFORM_AEAD:
 379                         ret = fill_sess_aead(xform, misc);
 380                         break;
 381                 case RTE_CRYPTO_SYM_XFORM_CIPHER:
 382                         ret = fill_sess_cipher(xform, misc);
 383                         break;
 384                 case RTE_CRYPTO_SYM_XFORM_AUTH:
 385                         if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
 386                                 ret = fill_sess_gmac(xform, misc);
 387                         else
 388                                 ret = fill_sess_auth(xform, misc);
 389                         break;
 390                 default:
 391                         ret = -1;
 392                 }
 393
 394                 if (ret)
 395                         goto priv_put;
 396         }
 397
 398         if ((GET_SESS_FC_TYPE(misc) == HASH_HMAC) &&
 399                         cpt_mac_len_verify(&temp_xform->auth)) {
 400                 CPT_LOG_ERR("MAC length is not supported");
 401                 ret = -ENOTSUP;
 402                 goto priv_put;
 403         }
 404
 405         set_sym_session_private_data(sess, driver_id, misc);
 406
 407         misc->ctx_dma_addr = rte_mempool_virt2iova(misc) +
 408                              sizeof(struct cpt_sess_misc);
 409
 410         /*
 411          * IE engines support IPsec operations
 412          * SE engines support IPsec operations, Chacha-Poly and
 413          * Air-Crypto operations
 414          */
 415         if (misc->zsk_flag || misc->chacha_poly)
 416                 misc->egrp = OTX2_CPT_EGRP_SE;
 417         else
 418                 misc->egrp = OTX2_CPT_EGRP_SE_IE;
 419
 420         return 0;
 421
 422 priv_put:
 423         rte_mempool_put(pool, priv);
 424
 425         return -ENOTSUP;
 426 }
 427
 428 static __rte_always_inline int32_t __rte_hot
 429 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 430                      struct pending_queue *pend_q,
 431                      struct cpt_request_info *req)
 432 {
 433         void *lmtline = qp->lmtline;
 434         union cpt_inst_s inst;
 435         uint64_t lmt_status;
 436
 437         if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 438                 return -EAGAIN;
 439
 440         inst.u[0] = 0;
 441         inst.s9x.res_addr = req->comp_baddr;
 442         inst.u[2] = 0;
 443         inst.u[3] = 0;
 444
 445         inst.s9x.ei0 = req->ist.ei0;
 446         inst.s9x.ei1 = req->ist.ei1;
 447         inst.s9x.ei2 = req->ist.ei2;
 448         inst.s9x.ei3 = req->ist.ei3;
 449
 450         req->time_out = rte_get_timer_cycles() +
 451                         DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 452
 453         do {
 454                 /* Copy CPT command to LMTLINE */
 455                 memcpy(lmtline, &inst, sizeof(inst));
 456
 457                 /*
 458                  * Make sure compiler does not reorder memcpy and ldeor.
 459                  * LMTST transactions are always flushed from the write
 460                  * buffer immediately, a DMB is not required to push out
 461                  * LMTSTs.
 462                  */
 463                 rte_io_wmb();
 464                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 465         } while (lmt_status == 0);
 466
 467         pend_q->rid_queue[pend_q->enq_tail].rid = (uintptr_t)req;
 468
 469         /* We will use soft queue length here to limit requests */
 470         MOD_INC(pend_q->enq_tail, OTX2_CPT_DEFAULT_CMD_QLEN);
 471         pend_q->pending_count += 1;
 472
 473         return 0;
 474 }
 475
 476 static __rte_always_inline int32_t __rte_hot
 477 otx2_cpt_enqueue_asym(struct otx2_cpt_qp *qp,
 478                       struct rte_crypto_op *op,
 479                       struct pending_queue *pend_q)
 480 {
 481         struct cpt_qp_meta_info *minfo = &qp->meta_info;
 482         struct rte_crypto_asym_op *asym_op = op->asym;
 483         struct asym_op_params params = {0};
 484         struct cpt_asym_sess_misc *sess;
 485         vq_cmd_word3_t *w3;
 486         uintptr_t *cop;
 487         void *mdata;
 488         int ret;
 489
 490         if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) {
 491                 CPT_LOG_ERR("Could not allocate meta buffer for request");
 492                 return -ENOMEM;
 493         }
 494
 495         sess = get_asym_session_private_data(asym_op->session,
 496                                              otx2_cryptodev_driver_id);
 497
 498         /* Store IO address of the mdata to meta_buf */
 499         params.meta_buf = rte_mempool_virt2iova(mdata);
 500
 501         cop = mdata;
 502         cop[0] = (uintptr_t)mdata;
 503         cop[1] = (uintptr_t)op;
 504         cop[2] = cop[3] = 0ULL;
 505
 506         params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t));
 507         params.req->op = cop;
 508
 509         /* Adjust meta_buf to point to end of cpt_request_info structure */
 510         params.meta_buf += (4 * sizeof(uintptr_t)) +
 511                             sizeof(struct cpt_request_info);
 512         switch (sess->xfrm_type) {
 513         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 514                 ret = cpt_modex_prep(&params, &sess->mod_ctx);
 515                 if (unlikely(ret))
 516                         goto req_fail;
 517                 break;
 518         case RTE_CRYPTO_ASYM_XFORM_RSA:
 519                 ret = cpt_enqueue_rsa_op(op, &params, sess);
 520                 if (unlikely(ret))
 521                         goto req_fail;
 522                 break;
 523         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 524                 ret = cpt_enqueue_ecdsa_op(op, &params, sess, otx2_fpm_iova);
 525                 if (unlikely(ret))
 526                         goto req_fail;
 527                 break;
 528         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 529                 ret = cpt_ecpm_prep(&asym_op->ecpm, &params,
 530                                     sess->ec_ctx.curveid);
 531                 if (unlikely(ret))
 532                         goto req_fail;
 533                 break;
 534         default:
 535                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 536                 ret = -EINVAL;
 537                 goto req_fail;
 538         }
 539
 540         /* Set engine group of AE */
 541         w3 = (vq_cmd_word3_t *)&params.req->ist.ei3;
 542         w3->s.grp = OTX2_CPT_EGRP_AE;
 543
 544         ret = otx2_cpt_enqueue_req(qp, pend_q, params.req);
 545
 546         if (unlikely(ret)) {
 547                 CPT_LOG_DP_ERR("Could not enqueue crypto req");
 548                 goto req_fail;
 549         }
 550
 551         return 0;
 552
 553 req_fail:
 554         free_op_meta(mdata, minfo->pool);
 555
 556         return ret;
 557 }
 558
 559 static __rte_always_inline int __rte_hot
 560 otx2_cpt_enqueue_sym(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 561                      struct pending_queue *pend_q)
 562 {
 563         struct rte_crypto_sym_op *sym_op = op->sym;
 564         struct cpt_request_info *req;
 565         struct cpt_sess_misc *sess;
 566         vq_cmd_word3_t *w3;
 567         uint64_t cpt_op;
 568         void *mdata;
 569         int ret;
 570
 571         sess = get_sym_session_private_data(sym_op->session,
 572                                             otx2_cryptodev_driver_id);
 573
 574         cpt_op = sess->cpt_op;
 575
 576         if (cpt_op & CPT_OP_CIPHER_MASK)
 577                 ret = fill_fc_params(op, sess, &qp->meta_info, &mdata,
 578                                      (void **)&req);
 579         else
 580                 ret = fill_digest_params(op, sess, &qp->meta_info, &mdata,
 581                                          (void **)&req);
 582
 583         if (unlikely(ret)) {
 584                 CPT_LOG_DP_ERR("Crypto req : op %p, cpt_op 0x%x ret 0x%x",
 585                                 op, (unsigned int)cpt_op, ret);
 586                 return ret;
 587         }
 588
 589         w3 = ((vq_cmd_word3_t *)(&req->ist.ei3));
 590         w3->s.grp = sess->egrp;
 591
 592         ret = otx2_cpt_enqueue_req(qp, pend_q, req);
 593
 594         if (unlikely(ret)) {
 595                 /* Free buffer allocated by fill params routines */
 596                 free_op_meta(mdata, qp->meta_info.pool);
 597         }
 598
 599         return ret;
 600 }
 601
 602 static __rte_always_inline int __rte_hot
 603 otx2_cpt_enqueue_sec(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 604                      struct pending_queue *pend_q)
 605 {
 606         struct otx2_sec_session_ipsec_lp *sess;
 607         struct otx2_ipsec_po_sa_ctl *ctl_wrd;
 608         struct otx2_sec_session *priv;
 609         struct cpt_request_info *req;
 610         int ret;
 611
 612         priv = get_sec_session_private_data(op->sym->sec_session);
 613         sess = &priv->ipsec.lp;
 614
 615         ctl_wrd = &sess->in_sa.ctl;
 616
 617         if (ctl_wrd->direction == OTX2_IPSEC_PO_SA_DIRECTION_OUTBOUND)
 618                 ret = process_outb_sa(op, sess, &qp->meta_info, (void **)&req);
 619         else
 620                 ret = process_inb_sa(op, sess, &qp->meta_info, (void **)&req);
 621
 622         if (unlikely(ret)) {
 623                 otx2_err("Crypto req : op %p, ret 0x%x", op, ret);
 624                 return ret;
 625         }
 626
 627         ret = otx2_cpt_enqueue_req(qp, pend_q, req);
 628
 629         return ret;
 630 }
 631
 632 static __rte_always_inline int __rte_hot
 633 otx2_cpt_enqueue_sym_sessless(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 634                               struct pending_queue *pend_q)
 635 {
 636         const int driver_id = otx2_cryptodev_driver_id;
 637         struct rte_crypto_sym_op *sym_op = op->sym;
 638         struct rte_cryptodev_sym_session *sess;
 639         int ret;
 640
 641         /* Create temporary session */
 642         sess = rte_cryptodev_sym_session_create(qp->sess_mp);
 643         if (sess == NULL)
 644                 return -ENOMEM;
 645
 646         ret = sym_session_configure(driver_id, sym_op->xform, sess,
 647                                     qp->sess_mp_priv);
 648         if (ret)
 649                 goto sess_put;
 650
 651         sym_op->session = sess;
 652
 653         ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 654
 655         if (unlikely(ret))
 656                 goto priv_put;
 657
 658         return 0;
 659
 660 priv_put:
 661         sym_session_clear(driver_id, sess);
 662 sess_put:
 663         rte_mempool_put(qp->sess_mp, sess);
 664         return ret;
 665 }
 666
 667 static uint16_t
 668 otx2_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 669 {
 670         uint16_t nb_allowed, count = 0;
 671         struct otx2_cpt_qp *qp = qptr;
 672         struct pending_queue *pend_q;
 673         struct rte_crypto_op *op;
 674         int ret;
 675
 676         pend_q = &qp->pend_q;
 677
 678         nb_allowed = OTX2_CPT_DEFAULT_CMD_QLEN - pend_q->pending_count;
 679         if (nb_ops > nb_allowed)
 680                 nb_ops = nb_allowed;
 681
 682         for (count = 0; count < nb_ops; count++) {
 683                 op = ops[count];
 684                 if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 685                         if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)
 686                                 ret = otx2_cpt_enqueue_sec(qp, op, pend_q);
 687                         else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 688                                 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 689                         else
 690                                 ret = otx2_cpt_enqueue_sym_sessless(qp, op,
 691                                                                     pend_q);
 692                 } else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 693                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 694                                 ret = otx2_cpt_enqueue_asym(qp, op, pend_q);
 695                         else
 696                                 break;
 697                 } else
 698                         break;
 699
 700                 if (unlikely(ret))
 701                         break;
 702         }
 703
 704         return count;
 705 }
 706
 707 static __rte_always_inline void
 708 otx2_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req,
 709                      struct rte_crypto_rsa_xform *rsa_ctx)
 710 {
 711         struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa;
 712
 713         switch (rsa->op_type) {
 714         case RTE_CRYPTO_ASYM_OP_ENCRYPT:
 715                 rsa->cipher.length = rsa_ctx->n.length;
 716                 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length);
 717                 break;
 718         case RTE_CRYPTO_ASYM_OP_DECRYPT:
 719                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 720                         rsa->message.length = rsa_ctx->n.length;
 721                         memcpy(rsa->message.data, req->rptr,
 722                                rsa->message.length);
 723                 } else {
 724                         /* Get length of decrypted output */
 725                         rsa->message.length = rte_cpu_to_be_16
 726                                              (*((uint16_t *)req->rptr));
 727                         /*
 728                          * Offset output data pointer by length field
 729                          * (2 bytes) and copy decrypted data.
 730                          */
 731                         memcpy(rsa->message.data, req->rptr + 2,
 732                                rsa->message.length);
 733                 }
 734                 break;
 735         case RTE_CRYPTO_ASYM_OP_SIGN:
 736                 rsa->sign.length = rsa_ctx->n.length;
 737                 memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 738                 break;
 739         case RTE_CRYPTO_ASYM_OP_VERIFY:
 740                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 741                         rsa->sign.length = rsa_ctx->n.length;
 742                         memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 743                 } else {
 744                         /* Get length of signed output */
 745                         rsa->sign.length = rte_cpu_to_be_16
 746                                           (*((uint16_t *)req->rptr));
 747                         /*
 748                          * Offset output data pointer by length field
 749                          * (2 bytes) and copy signed data.
 750                          */
 751                         memcpy(rsa->sign.data, req->rptr + 2,
 752                                rsa->sign.length);
 753                 }
 754                 if (memcmp(rsa->sign.data, rsa->message.data,
 755                            rsa->message.length)) {
 756                         CPT_LOG_DP_ERR("RSA verification failed");
 757                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 758                 }
 759                 break;
 760         default:
 761                 CPT_LOG_DP_DEBUG("Invalid RSA operation type");
 762                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 763                 break;
 764         }
 765 }
 766
 767 static __rte_always_inline void
 768 otx2_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa,
 769                                struct cpt_request_info *req,
 770                                struct cpt_asym_ec_ctx *ec)
 771 {
 772         int prime_len = ec_grp[ec->curveid].prime.length;
 773
 774         if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)
 775                 return;
 776
 777         /* Separate out sign r and s components */
 778         memcpy(ecdsa->r.data, req->rptr, prime_len);
 779         memcpy(ecdsa->s.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 780         ecdsa->r.length = prime_len;
 781         ecdsa->s.length = prime_len;
 782 }
 783
 784 static __rte_always_inline void
 785 otx2_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm,
 786                              struct cpt_request_info *req,
 787                              struct cpt_asym_ec_ctx *ec)
 788 {
 789         int prime_len = ec_grp[ec->curveid].prime.length;
 790
 791         memcpy(ecpm->r.x.data, req->rptr, prime_len);
 792         memcpy(ecpm->r.y.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 793         ecpm->r.x.length = prime_len;
 794         ecpm->r.y.length = prime_len;
 795 }
 796
 797 static void
 798 otx2_cpt_asym_post_process(struct rte_crypto_op *cop,
 799                            struct cpt_request_info *req)
 800 {
 801         struct rte_crypto_asym_op *op = cop->asym;
 802         struct cpt_asym_sess_misc *sess;
 803
 804         sess = get_asym_session_private_data(op->session,
 805                                              otx2_cryptodev_driver_id);
 806
 807         switch (sess->xfrm_type) {
 808         case RTE_CRYPTO_ASYM_XFORM_RSA:
 809                 otx2_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx);
 810                 break;
 811         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 812                 op->modex.result.length = sess->mod_ctx.modulus.length;
 813                 memcpy(op->modex.result.data, req->rptr,
 814                        op->modex.result.length);
 815                 break;
 816         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 817                 otx2_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx);
 818                 break;
 819         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 820                 otx2_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx);
 821                 break;
 822         default:
 823                 CPT_LOG_DP_DEBUG("Invalid crypto xform type");
 824                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 825                 break;
 826         }
 827 }
 828
 829 static void
 830 otx2_cpt_sec_post_process(struct rte_crypto_op *cop, uintptr_t *rsp)
 831 {
 832         struct cpt_request_info *req = (struct cpt_request_info *)rsp[2];
 833         vq_cmd_word0_t *word0 = (vq_cmd_word0_t *)&req->ist.ei0;
 834         struct rte_crypto_sym_op *sym_op = cop->sym;
 835         struct rte_mbuf *m = sym_op->m_src;
 836         struct rte_ipv6_hdr *ip6;
 837         struct rte_ipv4_hdr *ip;
 838         uint16_t m_len;
 839         int mdata_len;
 840         char *data;
 841
 842         mdata_len = (int)rsp[3];
 843         rte_pktmbuf_trim(m, mdata_len);
 844
 845         if ((word0->s.opcode & 0xff) == OTX2_IPSEC_PO_PROCESS_IPSEC_INB) {
 846                 data = rte_pktmbuf_mtod(m, char *);
 847
 848                 if (rsp[4] == RTE_SECURITY_IPSEC_TUNNEL_IPV4) {
 849                         ip = (struct rte_ipv4_hdr *)(data +
 850                                 OTX2_IPSEC_PO_INB_RPTR_HDR);
 851                         m_len = rte_be_to_cpu_16(ip->total_length);
 852                 } else {
 853                         ip6 = (struct rte_ipv6_hdr *)(data +
 854                                 OTX2_IPSEC_PO_INB_RPTR_HDR);
 855                         m_len = rte_be_to_cpu_16(ip6->payload_len) +
 856                                 sizeof(struct rte_ipv6_hdr);
 857                 }
 858
 859                 m->data_len = m_len;
 860                 m->pkt_len = m_len;
 861                 m->data_off += OTX2_IPSEC_PO_INB_RPTR_HDR;
 862         }
 863 }
 864
 865 static inline void
 866 otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 867                               uintptr_t *rsp, uint8_t cc)
 868 {
 869         unsigned int sz;
 870
 871         if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 872                 if (cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 873                         if (likely(cc == OTX2_IPSEC_PO_CC_SUCCESS)) {
 874                                 otx2_cpt_sec_post_process(cop, rsp);
 875                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 876                         } else
 877                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 878
 879                         return;
 880                 }
 881
 882                 if (likely(cc == NO_ERR)) {
 883                         /* Verify authentication data if required */
 884                         if (unlikely(rsp[2]))
 885                                 compl_auth_verify(cop, (uint8_t *)rsp[2],
 886                                                  rsp[3]);
 887                         else
 888                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 889                 } else {
 890                         if (cc == ERR_GC_ICV_MISCOMPARE)
 891                                 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 892                         else
 893                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 894                 }
 895
 896                 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 897                         sym_session_clear(otx2_cryptodev_driver_id,
 898                                           cop->sym->session);
 899                         sz = rte_cryptodev_sym_get_existing_header_session_size(
 900                                         cop->sym->session);
 901                         memset(cop->sym->session, 0, sz);
 902                         rte_mempool_put(qp->sess_mp, cop->sym->session);
 903                         cop->sym->session = NULL;
 904                 }
 905         }
 906
 907         if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 908                 if (likely(cc == NO_ERR)) {
 909                         cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 910                         /*
 911                          * Pass cpt_req_info stored in metabuf during
 912                          * enqueue.
 913                          */
 914                         rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t));
 915                         otx2_cpt_asym_post_process(cop,
 916                                         (struct cpt_request_info *)rsp);
 917                 } else
 918                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 919         }
 920 }
 921
 922 static uint16_t
 923 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 924 {
 925         int i, nb_pending, nb_completed;
 926         struct otx2_cpt_qp *qp = qptr;
 927         struct pending_queue *pend_q;
 928         struct cpt_request_info *req;
 929         struct rte_crypto_op *cop;
 930         uint8_t cc[nb_ops];
 931         struct rid *rid;
 932         uintptr_t *rsp;
 933         void *metabuf;
 934
 935         pend_q = &qp->pend_q;
 936
 937         nb_pending = pend_q->pending_count;
 938
 939         if (nb_ops > nb_pending)
 940                 nb_ops = nb_pending;
 941
 942         for (i = 0; i < nb_ops; i++) {
 943                 rid = &pend_q->rid_queue[pend_q->deq_head];
 944                 req = (struct cpt_request_info *)(rid->rid);
 945
 946                 cc[i] = otx2_cpt_compcode_get(req);
 947
 948                 if (unlikely(cc[i] == ERR_REQ_PENDING))
 949                         break;
 950
 951                 ops[i] = req->op;
 952
 953                 MOD_INC(pend_q->deq_head, OTX2_CPT_DEFAULT_CMD_QLEN);
 954                 pend_q->pending_count -= 1;
 955         }
 956
 957         nb_completed = i;
 958
 959         for (i = 0; i < nb_completed; i++) {
 960                 rsp = (void *)ops[i];
 961
 962                 metabuf = (void *)rsp[0];
 963                 cop = (void *)rsp[1];
 964
 965                 ops[i] = cop;
 966
 967                 otx2_cpt_dequeue_post_process(qp, cop, rsp, cc[i]);
 968
 969                 free_op_meta(metabuf, qp->meta_info.pool);
 970         }
 971
 972         return nb_completed;
 973 }
 974
 975 /* PMD ops */
 976
 977 static int
 978 otx2_cpt_dev_config(struct rte_cryptodev *dev,
 979                     struct rte_cryptodev_config *conf)
 980 {
 981         struct otx2_cpt_vf *vf = dev->data->dev_private;
 982         int ret;
 983
 984         if (conf->nb_queue_pairs > vf->max_queues) {
 985                 CPT_LOG_ERR("Invalid number of queue pairs requested");
 986                 return -EINVAL;
 987         }
 988
 989         dev->feature_flags &= ~conf->ff_disable;
 990
 991         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
 992                 /* Initialize shared FPM table */
 993                 ret = cpt_fpm_init(otx2_fpm_iova);
 994                 if (ret)
 995                         return ret;
 996         }
 997
 998         /* Unregister error interrupts */
 999         if (vf->err_intr_registered)
1000                 otx2_cpt_err_intr_unregister(dev);
1001
1002         /* Detach queues */
1003         if (vf->nb_queues) {
1004                 ret = otx2_cpt_queues_detach(dev);
1005                 if (ret) {
1006                         CPT_LOG_ERR("Could not detach CPT queues");
1007                         return ret;
1008                 }
1009         }
1010
1011         /* Attach queues */
1012         ret = otx2_cpt_queues_attach(dev, conf->nb_queue_pairs);
1013         if (ret) {
1014                 CPT_LOG_ERR("Could not attach CPT queues");
1015                 return -ENODEV;
1016         }
1017
1018         ret = otx2_cpt_msix_offsets_get(dev);
1019         if (ret) {
1020                 CPT_LOG_ERR("Could not get MSI-X offsets");
1021                 goto queues_detach;
1022         }
1023
1024         /* Register error interrupts */
1025         ret = otx2_cpt_err_intr_register(dev);
1026         if (ret) {
1027                 CPT_LOG_ERR("Could not register error interrupts");
1028                 goto queues_detach;
1029         }
1030
1031         ret = otx2_cpt_inline_init(dev);
1032         if (ret) {
1033                 CPT_LOG_ERR("Could not enable inline IPsec");
1034                 goto intr_unregister;
1035         }
1036
1037         dev->enqueue_burst = otx2_cpt_enqueue_burst;
1038         dev->dequeue_burst = otx2_cpt_dequeue_burst;
1039
1040         rte_mb();
1041         return 0;
1042
1043 intr_unregister:
1044         otx2_cpt_err_intr_unregister(dev);
1045 queues_detach:
1046         otx2_cpt_queues_detach(dev);
1047         return ret;
1048 }
1049
1050 static int
1051 otx2_cpt_dev_start(struct rte_cryptodev *dev)
1052 {
1053         RTE_SET_USED(dev);
1054
1055         CPT_PMD_INIT_FUNC_TRACE();
1056
1057         return 0;
1058 }
1059
1060 static void
1061 otx2_cpt_dev_stop(struct rte_cryptodev *dev)
1062 {
1063         CPT_PMD_INIT_FUNC_TRACE();
1064
1065         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)
1066                 cpt_fpm_clear();
1067 }
1068
1069 static int
1070 otx2_cpt_dev_close(struct rte_cryptodev *dev)
1071 {
1072         struct otx2_cpt_vf *vf = dev->data->dev_private;
1073         int i, ret = 0;
1074
1075         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1076                 ret = otx2_cpt_queue_pair_release(dev, i);
1077                 if (ret)
1078                         return ret;
1079         }
1080
1081         /* Unregister error interrupts */
1082         if (vf->err_intr_registered)
1083                 otx2_cpt_err_intr_unregister(dev);
1084
1085         /* Detach queues */
1086         if (vf->nb_queues) {
1087                 ret = otx2_cpt_queues_detach(dev);
1088                 if (ret)
1089                         CPT_LOG_ERR("Could not detach CPT queues");
1090         }
1091
1092         return ret;
1093 }
1094
1095 static void
1096 otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
1097                       struct rte_cryptodev_info *info)
1098 {
1099         struct otx2_cpt_vf *vf = dev->data->dev_private;
1100
1101         if (info != NULL) {
1102                 info->max_nb_queue_pairs = vf->max_queues;
1103                 info->feature_flags = dev->feature_flags;
1104                 info->capabilities = otx2_cpt_capabilities_get();
1105                 info->sym.max_nb_sessions = 0;
1106                 info->driver_id = otx2_cryptodev_driver_id;
1107                 info->min_mbuf_headroom_req = OTX2_CPT_MIN_HEADROOM_REQ;
1108                 info->min_mbuf_tailroom_req = OTX2_CPT_MIN_TAILROOM_REQ;
1109         }
1110 }
1111
1112 static int
1113 otx2_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1114                           const struct rte_cryptodev_qp_conf *conf,
1115                           int socket_id __rte_unused)
1116 {
1117         uint8_t grp_mask = OTX2_CPT_ENG_GRPS_MASK;
1118         struct rte_pci_device *pci_dev;
1119         struct otx2_cpt_qp *qp;
1120
1121         CPT_PMD_INIT_FUNC_TRACE();
1122
1123         if (dev->data->queue_pairs[qp_id] != NULL)
1124                 otx2_cpt_queue_pair_release(dev, qp_id);
1125
1126         if (conf->nb_descriptors > OTX2_CPT_DEFAULT_CMD_QLEN) {
1127                 CPT_LOG_ERR("Could not setup queue pair for %u descriptors",
1128                             conf->nb_descriptors);
1129                 return -EINVAL;
1130         }
1131
1132         pci_dev = RTE_DEV_TO_PCI(dev->device);
1133
1134         if (pci_dev->mem_resource[2].addr == NULL) {
1135                 CPT_LOG_ERR("Invalid PCI mem address");
1136                 return -EIO;
1137         }
1138
1139         qp = otx2_cpt_qp_create(dev, qp_id, grp_mask);
1140         if (qp == NULL) {
1141                 CPT_LOG_ERR("Could not create queue pair %d", qp_id);
1142                 return -ENOMEM;
1143         }
1144
1145         qp->sess_mp = conf->mp_session;
1146         qp->sess_mp_priv = conf->mp_session_private;
1147         dev->data->queue_pairs[qp_id] = qp;
1148
1149         return 0;
1150 }
1151
1152 static int
1153 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
1154 {
1155         struct otx2_cpt_qp *qp = dev->data->queue_pairs[qp_id];
1156         int ret;
1157
1158         CPT_PMD_INIT_FUNC_TRACE();
1159
1160         if (qp == NULL)
1161                 return -EINVAL;
1162
1163         CPT_LOG_INFO("Releasing queue pair %d", qp_id);
1164
1165         ret = otx2_cpt_qp_destroy(dev, qp);
1166         if (ret) {
1167                 CPT_LOG_ERR("Could not destroy queue pair %d", qp_id);
1168                 return ret;
1169         }
1170
1171         dev->data->queue_pairs[qp_id] = NULL;
1172
1173         return 0;
1174 }
1175
1176 static unsigned int
1177 otx2_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1178 {
1179         return cpt_get_session_size();
1180 }
1181
1182 static int
1183 otx2_cpt_sym_session_configure(struct rte_cryptodev *dev,
1184                                struct rte_crypto_sym_xform *xform,
1185                                struct rte_cryptodev_sym_session *sess,
1186                                struct rte_mempool *pool)
1187 {
1188         CPT_PMD_INIT_FUNC_TRACE();
1189
1190         return sym_session_configure(dev->driver_id, xform, sess, pool);
1191 }
1192
1193 static void
1194 otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
1195                            struct rte_cryptodev_sym_session *sess)
1196 {
1197         CPT_PMD_INIT_FUNC_TRACE();
1198
1199         return sym_session_clear(dev->driver_id, sess);
1200 }
1201
1202 static unsigned int
1203 otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
1204 {
1205         return sizeof(struct cpt_asym_sess_misc);
1206 }
1207
1208 static int
1209 otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
1210                           struct rte_crypto_asym_xform *xform,
1211                           struct rte_cryptodev_asym_session *sess,
1212                           struct rte_mempool *pool)
1213 {
1214         struct cpt_asym_sess_misc *priv;
1215         int ret;
1216
1217         CPT_PMD_INIT_FUNC_TRACE();
1218
1219         if (rte_mempool_get(pool, (void **)&priv)) {
1220                 CPT_LOG_ERR("Could not allocate session_private_data");
1221                 return -ENOMEM;
1222         }
1223
1224         memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
1225
1226         ret = cpt_fill_asym_session_parameters(priv, xform);
1227         if (ret) {
1228                 CPT_LOG_ERR("Could not configure session parameters");
1229
1230                 /* Return session to mempool */
1231                 rte_mempool_put(pool, priv);
1232                 return ret;
1233         }
1234
1235         set_asym_session_private_data(sess, dev->driver_id, priv);
1236         return 0;
1237 }
1238
1239 static void
1240 otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
1241                             struct rte_cryptodev_asym_session *sess)
1242 {
1243         struct cpt_asym_sess_misc *priv;
1244         struct rte_mempool *sess_mp;
1245
1246         CPT_PMD_INIT_FUNC_TRACE();
1247
1248         priv = get_asym_session_private_data(sess, dev->driver_id);
1249         if (priv == NULL)
1250                 return;
1251
1252         /* Free resources allocated in session_cfg */
1253         cpt_free_asym_session_parameters(priv);
1254
1255         /* Reset and free object back to pool */
1256         memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
1257         sess_mp = rte_mempool_from_obj(priv);
1258         set_asym_session_private_data(sess, dev->driver_id, NULL);
1259         rte_mempool_put(sess_mp, priv);
1260 }
1261
1262 struct rte_cryptodev_ops otx2_cpt_ops = {
1263         /* Device control ops */
1264         .dev_configure = otx2_cpt_dev_config,
1265         .dev_start = otx2_cpt_dev_start,
1266         .dev_stop = otx2_cpt_dev_stop,
1267         .dev_close = otx2_cpt_dev_close,
1268         .dev_infos_get = otx2_cpt_dev_info_get,
1269
1270         .stats_get = NULL,
1271         .stats_reset = NULL,
1272         .queue_pair_setup = otx2_cpt_queue_pair_setup,
1273         .queue_pair_release = otx2_cpt_queue_pair_release,
1274
1275         /* Symmetric crypto ops */
1276         .sym_session_get_size = otx2_cpt_sym_session_get_size,
1277         .sym_session_configure = otx2_cpt_sym_session_configure,
1278         .sym_session_clear = otx2_cpt_sym_session_clear,
1279
1280         /* Asymmetric crypto ops */
1281         .asym_session_get_size = otx2_cpt_asym_session_size_get,
1282         .asym_session_configure = otx2_cpt_asym_session_cfg,
1283         .asym_session_clear = otx2_cpt_asym_session_clear,
1284
1285 };