drivers/crypto/qat/dev/qat_asym_pmd_gen1.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017-2022 Intel Corporation
   3  */
   4
   5 #include <rte_cryptodev.h>
   6 #include <cryptodev_pmd.h>
   7 #include "qat_asym.h"
   8 #include "qat_crypto.h"
   9 #include "qat_crypto_pmd_gens.h"
  10
  11 struct rte_cryptodev_ops qat_asym_crypto_ops_gen1 = {
  12         /* Device related operations */
  13         .dev_configure          = qat_cryptodev_config,
  14         .dev_start              = qat_cryptodev_start,
  15         .dev_stop               = qat_cryptodev_stop,
  16         .dev_close              = qat_cryptodev_close,
  17         .dev_infos_get          = qat_cryptodev_info_get,
  18
  19         .stats_get              = qat_cryptodev_stats_get,
  20         .stats_reset            = qat_cryptodev_stats_reset,
  21         .queue_pair_setup       = qat_cryptodev_qp_setup,
  22         .queue_pair_release     = qat_cryptodev_qp_release,
  23
  24         /* Crypto related operations */
  25         .asym_session_get_size  = qat_asym_session_get_private_size,
  26         .asym_session_configure = qat_asym_session_configure,
  27         .asym_session_clear     = qat_asym_session_clear
  28 };
  29
  30 static struct rte_cryptodev_capabilities qat_asym_crypto_caps_gen1[] = {
  31         QAT_ASYM_CAP(MODEX,
  32                 0, 1, 512, 1),
  33         QAT_ASYM_CAP(MODINV,
  34                 0, 1, 512, 1),
  35         QAT_ASYM_CAP(RSA,
  36                         ((1 << RTE_CRYPTO_ASYM_OP_SIGN) |
  37                         (1 << RTE_CRYPTO_ASYM_OP_VERIFY) |
  38                         (1 << RTE_CRYPTO_ASYM_OP_ENCRYPT) |
  39                         (1 << RTE_CRYPTO_ASYM_OP_DECRYPT)),
  40                         64, 512, 64),
  41         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
  42 };
  43
  44
  45 struct qat_capabilities_info
  46 qat_asym_crypto_cap_get_gen1(struct qat_pci_device *qat_dev __rte_unused)
  47 {
  48         struct qat_capabilities_info capa_info;
  49         capa_info.data = qat_asym_crypto_caps_gen1;
  50         capa_info.size = sizeof(qat_asym_crypto_caps_gen1);
  51         return capa_info;
  52 }
  53
  54 uint64_t
  55 qat_asym_crypto_feature_flags_get_gen1(
  56         struct qat_pci_device *qat_dev __rte_unused)
  57 {
  58         uint64_t feature_flags = RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
  59                         RTE_CRYPTODEV_FF_HW_ACCELERATED |
  60                         RTE_CRYPTODEV_FF_ASYM_SESSIONLESS |
  61                         RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_EXP |
  62                         RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT;
  63
  64         return feature_flags;
  65 }
  66
  67 int
  68 qat_asym_crypto_set_session_gen1(void *cdev __rte_unused,
  69                 void *session __rte_unused)
  70 {
  71         return 0;
  72 }
  73
  74 RTE_INIT(qat_asym_crypto_gen1_init)
  75 {
  76         qat_asym_gen_dev_ops[QAT_GEN1].cryptodev_ops =
  77                         &qat_asym_crypto_ops_gen1;
  78         qat_asym_gen_dev_ops[QAT_GEN1].get_capabilities =
  79                         qat_asym_crypto_cap_get_gen1;
  80         qat_asym_gen_dev_ops[QAT_GEN1].get_feature_flags =
  81                         qat_asym_crypto_feature_flags_get_gen1;
  82 }