1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
2 * Copyright(c) 2015-2018 Intel Corporation
4 #ifndef _ICP_QAT_ALGS_H_
5 #define _ICP_QAT_ALGS_H_
6 #include <rte_memory.h>
7 #include <rte_crypto.h>
8 #include "icp_qat_hw.h"
9 #include "icp_qat_fw.h"
10 #include "icp_qat_fw_la.h"
11 #include "../qat_crypto.h"
14 * Key Modifier (KM) value used in KASUMI algorithm in F9 mode to XOR
17 #define KASUMI_F9_KEY_MODIFIER_4_BYTES 0xAAAAAAAA
19 #define KASUMI_F8_KEY_MODIFIER_4_BYTES 0x55555555
22 #define QAT_3DES_KEY_SZ_OPT1 24 /* Keys are independent */
23 #define QAT_3DES_KEY_SZ_OPT2 16 /* K3=K1 */
25 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
26 ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
27 ICP_QAT_HW_CIPHER_NO_CONVERT, \
28 ICP_QAT_HW_CIPHER_ENCRYPT)
30 #define QAT_AES_HW_CONFIG_CBC_DEC(alg) \
31 ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
32 ICP_QAT_HW_CIPHER_KEY_CONVERT, \
33 ICP_QAT_HW_CIPHER_DECRYPT)
41 enum qat_crypto_proto_flag {
42 QAT_CRYPTO_PROTO_FLAG_NONE = 0,
43 QAT_CRYPTO_PROTO_FLAG_CCM = 1,
44 QAT_CRYPTO_PROTO_FLAG_GCM = 2,
45 QAT_CRYPTO_PROTO_FLAG_SNOW3G = 3,
46 QAT_CRYPTO_PROTO_FLAG_ZUC = 4
50 * Maximum number of SGL entries
52 #define QAT_SGL_MAX_NUMBER 16
54 struct qat_alg_buf_list {
57 uint32_t num_mapped_bufs;
58 struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];
59 } __rte_packed __rte_cache_aligned;
61 struct qat_crypto_op_cookie {
62 struct qat_alg_buf_list qat_sgl_list_src;
63 struct qat_alg_buf_list qat_sgl_list_dst;
64 rte_iova_t qat_sgl_src_phys_addr;
65 rte_iova_t qat_sgl_dst_phys_addr;
68 /* Common content descriptor */
70 struct icp_qat_hw_cipher_algo_blk cipher;
71 struct icp_qat_hw_auth_algo_blk hash;
72 } __rte_packed __rte_cache_aligned;
75 enum icp_qat_fw_la_cmd_id qat_cmd;
76 enum icp_qat_hw_cipher_algo qat_cipher_alg;
77 enum icp_qat_hw_cipher_dir qat_dir;
78 enum icp_qat_hw_cipher_mode qat_mode;
79 enum icp_qat_hw_auth_algo qat_hash_alg;
80 enum icp_qat_hw_auth_op auth_op;
85 struct icp_qat_fw_la_bulk_req fw_req;
87 struct qat_crypto_instance *inst;
96 uint16_t digest_length;
97 rte_spinlock_t lock; /* protects this struct */
98 enum qat_device_gen min_qat_dev_gen;
101 int qat_get_inter_state_size(enum icp_qat_hw_auth_algo qat_hash_alg);
103 int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cd,
107 int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
112 unsigned int operation);
114 void qat_alg_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,
115 enum qat_crypto_proto_flag proto_flags);
117 int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
118 int qat_alg_validate_aes_docsisbpi_key(int key_len,
119 enum icp_qat_hw_cipher_algo *alg);
120 int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
121 int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
122 int qat_alg_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
123 int qat_alg_validate_des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
124 int qat_cipher_get_block_size(enum icp_qat_hw_cipher_algo qat_cipher_alg);
125 int qat_alg_validate_zuc_key(int key_len, enum icp_qat_hw_cipher_algo *alg);