drivers/crypto/qat/qat_asym_pmd.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2019 Intel Corporation
   3  */
   4
   5 #include <cryptodev_pmd.h>
   6
   7 #include "qat_logs.h"
   8
   9 #include "qat_crypto.h"
  10 #include "qat_asym.h"
  11 #include "qat_asym_pmd.h"
  12
  13 uint8_t qat_asym_driver_id;
  14 struct qat_crypto_gen_dev_ops qat_asym_gen_dev_ops[QAT_N_GENS];
  15
  16 void
  17 qat_asym_init_op_cookie(void *op_cookie)
  18 {
  19         int j;
  20         struct qat_asym_op_cookie *cookie = op_cookie;
  21
  22         cookie->input_addr = rte_mempool_virt2iova(cookie) +
  23                         offsetof(struct qat_asym_op_cookie,
  24                                         input_params_ptrs);
  25
  26         cookie->output_addr = rte_mempool_virt2iova(cookie) +
  27                         offsetof(struct qat_asym_op_cookie,
  28                                         output_params_ptrs);
  29
  30         for (j = 0; j < 8; j++) {
  31                 cookie->input_params_ptrs[j] =
  32                                 rte_mempool_virt2iova(cookie) +
  33                                 offsetof(struct qat_asym_op_cookie,
  34                                                 input_array[j]);
  35                 cookie->output_params_ptrs[j] =
  36                                 rte_mempool_virt2iova(cookie) +
  37                                 offsetof(struct qat_asym_op_cookie,
  38                                                 output_array[j]);
  39         }
  40 }
  41
  42 static struct rte_cryptodev_ops crypto_qat_ops = {
  43
  44         /* Device related operations */
  45         .dev_configure          = qat_cryptodev_config,
  46         .dev_start              = qat_cryptodev_start,
  47         .dev_stop               = qat_cryptodev_stop,
  48         .dev_close              = qat_cryptodev_close,
  49         .dev_infos_get          = qat_cryptodev_info_get,
  50
  51         .stats_get              = qat_cryptodev_stats_get,
  52         .stats_reset            = qat_cryptodev_stats_reset,
  53         .queue_pair_setup       = qat_cryptodev_qp_setup,
  54         .queue_pair_release     = qat_cryptodev_qp_release,
  55
  56         /* Crypto related operations */
  57         .asym_session_get_size  = qat_asym_session_get_private_size,
  58         .asym_session_configure = qat_asym_session_configure,
  59         .asym_session_clear     = qat_asym_session_clear
  60 };
  61
  62 uint16_t qat_asym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
  63                                        uint16_t nb_ops)
  64 {
  65         return qat_enqueue_op_burst(qp, (void **)ops, nb_ops);
  66 }
  67
  68 uint16_t qat_asym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
  69                                        uint16_t nb_ops)
  70 {
  71         return qat_dequeue_op_burst(qp, (void **)ops, nb_ops);
  72 }
  73
  74 /* An rte_driver is needed in the registration of both the device and the driver
  75  * with cryptodev.
  76  * The actual qat pci's rte_driver can't be used as its name represents
  77  * the whole pci device with all services. Think of this as a holder for a name
  78  * for the crypto part of the pci device.
  79  */
  80 static const char qat_asym_drv_name[] = RTE_STR(CRYPTODEV_NAME_QAT_ASYM_PMD);
  81 static const struct rte_driver cryptodev_qat_asym_driver = {
  82         .name = qat_asym_drv_name,
  83         .alias = qat_asym_drv_name
  84 };
  85
  86 int
  87 qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,
  88                 struct qat_dev_cmd_param *qat_dev_cmd_param)
  89 {
  90         int i = 0;
  91         struct qat_device_info *qat_dev_instance =
  92                         &qat_pci_devs[qat_pci_dev->qat_dev_id];
  93         struct rte_cryptodev_pmd_init_params init_params = {
  94                 .name = "",
  95                 .socket_id = qat_dev_instance->pci_dev->device.numa_node,
  96                 .private_data_size = sizeof(struct qat_cryptodev_private)
  97         };
  98         struct qat_capabilities_info capa_info;
  99         const struct rte_cryptodev_capabilities *capabilities;
 100         const struct qat_crypto_gen_dev_ops *gen_dev_ops =
 101                 &qat_asym_gen_dev_ops[qat_pci_dev->qat_dev_gen];
 102         char name[RTE_CRYPTODEV_NAME_MAX_LEN];
 103         char capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN];
 104         struct rte_cryptodev *cryptodev;
 105         struct qat_cryptodev_private *internals;
 106         uint64_t capa_size;
 107
 108         snprintf(name, RTE_CRYPTODEV_NAME_MAX_LEN, "%s_%s",
 109                         qat_pci_dev->name, "asym");
 110         QAT_LOG(DEBUG, "Creating QAT ASYM device %s\n", name);
 111
 112         if (gen_dev_ops->cryptodev_ops == NULL) {
 113                 QAT_LOG(ERR, "Device %s does not support asymmetric crypto",
 114                                 name);
 115                 return -EFAULT;
 116         }
 117
 118         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 119                 qat_pci_dev->qat_asym_driver_id =
 120                                 qat_asym_driver_id;
 121         } else if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 122                 if (qat_pci_dev->qat_asym_driver_id !=
 123                                 qat_asym_driver_id) {
 124                         QAT_LOG(ERR,
 125                                 "Device %s have different driver id than corresponding device in primary process",
 126                                 name);
 127                         return -(EFAULT);
 128                 }
 129         }
 130
 131         /* Populate subset device to use in cryptodev device creation */
 132         qat_dev_instance->asym_rte_dev.driver = &cryptodev_qat_asym_driver;
 133         qat_dev_instance->asym_rte_dev.numa_node =
 134                         qat_dev_instance->pci_dev->device.numa_node;
 135         qat_dev_instance->asym_rte_dev.devargs = NULL;
 136
 137         cryptodev = rte_cryptodev_pmd_create(name,
 138                         &(qat_dev_instance->asym_rte_dev), &init_params);
 139
 140         if (cryptodev == NULL)
 141                 return -ENODEV;
 142
 143         qat_dev_instance->asym_rte_dev.name = cryptodev->data->name;
 144         cryptodev->driver_id = qat_asym_driver_id;
 145         cryptodev->dev_ops = &crypto_qat_ops;
 146
 147         cryptodev->enqueue_burst = qat_asym_pmd_enqueue_op_burst;
 148         cryptodev->dequeue_burst = qat_asym_pmd_dequeue_op_burst;
 149
 150
 151         cryptodev->feature_flags = gen_dev_ops->get_feature_flags(qat_pci_dev);
 152
 153         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 154                 return 0;
 155
 156         snprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN,
 157                         "QAT_ASYM_CAPA_GEN_%d",
 158                         qat_pci_dev->qat_dev_gen);
 159
 160         internals = cryptodev->data->dev_private;
 161         internals->qat_dev = qat_pci_dev;
 162         internals->dev_id = cryptodev->data->dev_id;
 163         internals->service_type = QAT_SERVICE_ASYMMETRIC;
 164
 165         capa_info = gen_dev_ops->get_capabilities(qat_pci_dev);
 166         capabilities = capa_info.data;
 167         capa_size = capa_info.size;
 168
 169         internals->capa_mz = rte_memzone_lookup(capa_memz_name);
 170         if (internals->capa_mz == NULL) {
 171                 internals->capa_mz = rte_memzone_reserve(capa_memz_name,
 172                                 capa_size, rte_socket_id(), 0);
 173                 if (internals->capa_mz == NULL) {
 174                         QAT_LOG(DEBUG,
 175                                 "Error allocating memzone for capabilities, "
 176                                 "destroying PMD for %s",
 177                                 name);
 178                         rte_cryptodev_pmd_destroy(cryptodev);
 179                         memset(&qat_dev_instance->asym_rte_dev, 0,
 180                                 sizeof(qat_dev_instance->asym_rte_dev));
 181                         return -EFAULT;
 182                 }
 183         }
 184
 185         memcpy(internals->capa_mz->addr, capabilities, capa_size);
 186         internals->qat_dev_capabilities = internals->capa_mz->addr;
 187
 188         while (1) {
 189                 if (qat_dev_cmd_param[i].name == NULL)
 190                         break;
 191                 if (!strcmp(qat_dev_cmd_param[i].name, ASYM_ENQ_THRESHOLD_NAME))
 192                         internals->min_enq_burst_threshold =
 193                                         qat_dev_cmd_param[i].val;
 194                 i++;
 195         }
 196
 197         qat_pci_dev->asym_dev = internals;
 198
 199         rte_cryptodev_pmd_probing_finish(cryptodev);
 200
 201         QAT_LOG(DEBUG, "Created QAT ASYM device %s as cryptodev instance %d",
 202                         cryptodev->data->name, internals->dev_id);
 203         return 0;
 204 }
 205
 206 int
 207 qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev)
 208 {
 209         struct rte_cryptodev *cryptodev;
 210
 211         if (qat_pci_dev == NULL)
 212                 return -ENODEV;
 213         if (qat_pci_dev->asym_dev == NULL)
 214                 return 0;
 215         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
 216                 rte_memzone_free(qat_pci_dev->asym_dev->capa_mz);
 217
 218         /* free crypto device */
 219         cryptodev = rte_cryptodev_pmd_get_dev(
 220                         qat_pci_dev->asym_dev->dev_id);
 221         rte_cryptodev_pmd_destroy(cryptodev);
 222         qat_pci_devs[qat_pci_dev->qat_dev_id].asym_rte_dev.name = NULL;
 223         qat_pci_dev->asym_dev = NULL;
 224
 225         return 0;
 226 }
 227
 228 static struct cryptodev_driver qat_crypto_drv;
 229 RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv,
 230                 cryptodev_qat_asym_driver,
 231                 qat_asym_driver_id);