1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
9 /**< Intel(R) QAT Symmetric Crypto PMD device name */
10 #define CRYPTODEV_NAME_QAT_SYM_PMD crypto_qat
13 * Maximum number of SGL entries
15 #define QAT_SGL_MAX_NUMBER 16
17 /* Intel(R) QuickAssist Technology device generation is enumerated
18 * from one according to the generation of the device
26 enum qat_service_type {
27 QAT_SERVICE_ASYMMETRIC = 0,
28 QAT_SERVICE_SYMMETRIC,
29 QAT_SERVICE_COMPRESSION,
32 #define QAT_MAX_SERVICES (QAT_SERVICE_INVALID)
34 /**< Common struct for scatter-gather list operations */
41 struct qat_alg_buf_list {
44 uint32_t num_mapped_bufs;
45 struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];
46 } __rte_packed __rte_cache_aligned;
48 struct qat_sym_op_cookie {
49 struct qat_alg_buf_list qat_sgl_list_src;
50 struct qat_alg_buf_list qat_sgl_list_dst;
51 phys_addr_t qat_sgl_src_phys_addr;
52 phys_addr_t qat_sgl_dst_phys_addr;
55 #endif /* _QAT_COMMON_H_ */