drivers/crypto/qat/qat_crypto.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *       * Redistributions of source code must retain the above copyright
  12  *         notice, this list of conditions and the following disclaimer.
  13  *       * Redistributions in binary form must reproduce the above copyright
  14  *         notice, this list of conditions and the following disclaimer in
  15  *         the documentation and/or other materials provided with the
  16  *         distribution.
  17  *       * Neither the name of Intel Corporation nor the names of its
  18  *         contributors may be used to endorse or promote products derived
  19  *         from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <strings.h>
  37 #include <string.h>
  38 #include <inttypes.h>
  39 #include <errno.h>
  40 #include <sys/queue.h>
  41 #include <stdarg.h>
  42
  43 #include <rte_common.h>
  44 #include <rte_log.h>
  45 #include <rte_debug.h>
  46 #include <rte_memory.h>
  47 #include <rte_memzone.h>
  48 #include <rte_tailq.h>
  49 #include <rte_ether.h>
  50 #include <rte_malloc.h>
  51 #include <rte_launch.h>
  52 #include <rte_eal.h>
  53 #include <rte_per_lcore.h>
  54 #include <rte_lcore.h>
  55 #include <rte_atomic.h>
  56 #include <rte_branch_prediction.h>
  57 #include <rte_mempool.h>
  58 #include <rte_mbuf.h>
  59 #include <rte_string_fns.h>
  60 #include <rte_spinlock.h>
  61 #include <rte_hexdump.h>
  62
  63 #include "qat_logs.h"
  64 #include "qat_algs.h"
  65 #include "qat_crypto.h"
  66 #include "adf_transport_access_macros.h"
  67
  68 #define BYTE_LENGTH    8
  69
  70 static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
  71         {       /* SHA1 HMAC */
  72                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  73                 {.sym = {
  74                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  75                         {.auth = {
  76                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
  77                                 .block_size = 64,
  78                                 .key_size = {
  79                                         .min = 64,
  80                                         .max = 64,
  81                                         .increment = 0
  82                                 },
  83                                 .digest_size = {
  84                                         .min = 20,
  85                                         .max = 20,
  86                                         .increment = 0
  87                                 },
  88                                 .aad_size = { 0 }
  89                         }, }
  90                 }, }
  91         },
  92         {       /* SHA224 HMAC */
  93                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  94                 {.sym = {
  95                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  96                         {.auth = {
  97                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
  98                                 .block_size = 64,
  99                                         .key_size = {
 100                                         .min = 64,
 101                                         .max = 64,
 102                                         .increment = 0
 103                                 },
 104                                 .digest_size = {
 105                                         .min = 28,
 106                                         .max = 28,
 107                                         .increment = 0
 108                                 },
 109                                 .aad_size = { 0 }
 110                         }, }
 111                 }, }
 112         },
 113         {       /* SHA256 HMAC */
 114                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 115                 {.sym = {
 116                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 117                         {.auth = {
 118                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
 119                                 .block_size = 64,
 120                                 .key_size = {
 121                                         .min = 64,
 122                                         .max = 64,
 123                                         .increment = 0
 124                                 },
 125                                 .digest_size = {
 126                                         .min = 32,
 127                                         .max = 32,
 128                                         .increment = 0
 129                                 },
 130                                 .aad_size = { 0 }
 131                         }, }
 132                 }, }
 133         },
 134         {       /* SHA384 HMAC */
 135                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 136                 {.sym = {
 137                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 138                         {.auth = {
 139                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
 140                                 .block_size = 64,
 141                                 .key_size = {
 142                                         .min = 128,
 143                                         .max = 128,
 144                                         .increment = 0
 145                                 },
 146                                 .digest_size = {
 147                                         .min = 48,
 148                                         .max = 48,
 149                                         .increment = 0
 150                                         },
 151                                 .aad_size = { 0 }
 152                         }, }
 153                 }, }
 154         },
 155         {       /* SHA512 HMAC */
 156                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 157                 {.sym = {
 158                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 159                         {.auth = {
 160                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
 161                                 .block_size = 128,
 162                                 .key_size = {
 163                                         .min = 128,
 164                                         .max = 128,
 165                                         .increment = 0
 166                                 },
 167                                 .digest_size = {
 168                                         .min = 64,
 169                                         .max = 64,
 170                                         .increment = 0
 171                                 },
 172                                 .aad_size = { 0 }
 173                         }, }
 174                 }, }
 175         },
 176         {       /* MD5 HMAC */
 177                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 178                 {.sym = {
 179                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 180                         {.auth = {
 181                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
 182                                 .block_size = 64,
 183                                 .key_size = {
 184                                         .min = 8,
 185                                         .max = 64,
 186                                         .increment = 8
 187                                 },
 188                                 .digest_size = {
 189                                         .min = 16,
 190                                         .max = 16,
 191                                         .increment = 0
 192                                 },
 193                                 .aad_size = { 0 }
 194                         }, }
 195                 }, }
 196         },
 197         {       /* AES XCBC MAC */
 198                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 199                 {.sym = {
 200                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 201                         {.auth = {
 202                                 .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
 203                                 .block_size = 16,
 204                                 .key_size = {
 205                                         .min = 16,
 206                                         .max = 16,
 207                                         .increment = 0
 208                                 },
 209                                 .digest_size = {
 210                                         .min = 16,
 211                                         .max = 16,
 212                                         .increment = 0
 213                                 },
 214                                 .aad_size = { 0 }
 215                         }, }
 216                 }, }
 217         },
 218         {       /* AES GCM (AUTH) */
 219                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 220                 {.sym = {
 221                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 222                         {.auth = {
 223                                 .algo = RTE_CRYPTO_AUTH_AES_GCM,
 224                                 .block_size = 16,
 225                                 .key_size = {
 226                                         .min = 16,
 227                                         .max = 32,
 228                                         .increment = 8
 229                                 },
 230                                 .digest_size = {
 231                                         .min = 8,
 232                                         .max = 16,
 233                                         .increment = 4
 234                                 },
 235                                 .aad_size = {
 236                                         .min = 8,
 237                                         .max = 12,
 238                                         .increment = 4
 239                                 }
 240                         }, }
 241                 }, }
 242         },
 243         {       /* SNOW3G (UIA2) */
 244                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 245                 {.sym = {
 246                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 247                         {.auth = {
 248                                 .algo = RTE_CRYPTO_AUTH_SNOW3G_UIA2,
 249                                 .block_size = 16,
 250                                 .key_size = {
 251                                         .min = 16,
 252                                         .max = 16,
 253                                         .increment = 0
 254                                 },
 255                                 .digest_size = {
 256                                         .min = 4,
 257                                         .max = 4,
 258                                         .increment = 0
 259                                 },
 260                                 .aad_size = {
 261                                         .min = 16,
 262                                         .max = 16,
 263                                         .increment = 0
 264                                 }
 265                         }, }
 266                 }, }
 267         },
 268         {       /* AES GCM (CIPHER) */
 269                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 270                 {.sym = {
 271                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 272                         {.cipher = {
 273                                 .algo = RTE_CRYPTO_CIPHER_AES_GCM,
 274                                 .block_size = 16,
 275                                 .key_size = {
 276                                         .min = 16,
 277                                         .max = 32,
 278                                         .increment = 8
 279                                 },
 280                                 .iv_size = {
 281                                         .min = 16,
 282                                         .max = 16,
 283                                         .increment = 0
 284                                 }
 285                         }, }
 286                 }, }
 287         },
 288         {       /* AES CBC */
 289                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 290                 {.sym = {
 291                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 292                         {.cipher = {
 293                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
 294                                 .block_size = 16,
 295                                 .key_size = {
 296                                         .min = 16,
 297                                         .max = 32,
 298                                         .increment = 8
 299                                 },
 300                                 .iv_size = {
 301                                         .min = 16,
 302                                         .max = 16,
 303                                         .increment = 0
 304                                 }
 305                         }, }
 306                 }, }
 307         },
 308         {       /* SNOW3G (UEA2) */
 309                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 310                 {.sym = {
 311                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 312                         {.cipher = {
 313                                 .algo = RTE_CRYPTO_CIPHER_SNOW3G_UEA2,
 314                                 .block_size = 16,
 315                                 .key_size = {
 316                                         .min = 16,
 317                                         .max = 16,
 318                                         .increment = 0
 319                                 },
 320                                 .iv_size = {
 321                                         .min = 16,
 322                                         .max = 16,
 323                                         .increment = 0
 324                                 }
 325                         }, }
 326                 }, }
 327         },
 328         {       /* AES CTR */
 329                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 330                 {.sym = {
 331                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 332                         {.cipher = {
 333                                 .algo = RTE_CRYPTO_CIPHER_AES_CTR,
 334                                 .block_size = 16,
 335                                 .key_size = {
 336                                         .min = 16,
 337                                         .max = 32,
 338                                         .increment = 8
 339                                 },
 340                                 .iv_size = {
 341                                         .min = 16,
 342                                         .max = 16,
 343                                         .increment = 0
 344                                 }
 345                         }, }
 346                 }, }
 347         },
 348         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 349 };
 350
 351 static inline uint32_t
 352 adf_modulo(uint32_t data, uint32_t shift);
 353
 354 static inline int
 355 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg);
 356
 357 void qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
 358                 void *session)
 359 {
 360         struct qat_session *sess = session;
 361         phys_addr_t cd_paddr;
 362
 363         PMD_INIT_FUNC_TRACE();
 364         if (session) {
 365                 cd_paddr = sess->cd_paddr;
 366                 memset(sess, 0, qat_crypto_sym_get_session_private_size(dev));
 367                 sess->cd_paddr = cd_paddr;
 368         } else
 369                 PMD_DRV_LOG(ERR, "NULL session");
 370 }
 371
 372 static int
 373 qat_get_cmd_id(const struct rte_crypto_sym_xform *xform)
 374 {
 375         /* Cipher Only */
 376         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
 377                 return ICP_QAT_FW_LA_CMD_CIPHER;
 378
 379         /* Authentication Only */
 380         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
 381                 return ICP_QAT_FW_LA_CMD_AUTH;
 382
 383         if (xform->next == NULL)
 384                 return -1;
 385
 386         /* Cipher then Authenticate */
 387         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 388                         xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 389                 return ICP_QAT_FW_LA_CMD_CIPHER_HASH;
 390
 391         /* Authenticate then Cipher */
 392         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 393                         xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 394                 return ICP_QAT_FW_LA_CMD_HASH_CIPHER;
 395
 396         return -1;
 397 }
 398
 399 static struct rte_crypto_auth_xform *
 400 qat_get_auth_xform(struct rte_crypto_sym_xform *xform)
 401 {
 402         do {
 403                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 404                         return &xform->auth;
 405
 406                 xform = xform->next;
 407         } while (xform);
 408
 409         return NULL;
 410 }
 411
 412 static struct rte_crypto_cipher_xform *
 413 qat_get_cipher_xform(struct rte_crypto_sym_xform *xform)
 414 {
 415         do {
 416                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 417                         return &xform->cipher;
 418
 419                 xform = xform->next;
 420         } while (xform);
 421
 422         return NULL;
 423 }
 424 void *
 425 qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
 426                 struct rte_crypto_sym_xform *xform, void *session_private)
 427 {
 428         struct qat_pmd_private *internals = dev->data->dev_private;
 429
 430         struct qat_session *session = session_private;
 431
 432         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 433
 434         /* Get cipher xform from crypto xform chain */
 435         cipher_xform = qat_get_cipher_xform(xform);
 436
 437         switch (cipher_xform->algo) {
 438         case RTE_CRYPTO_CIPHER_AES_CBC:
 439                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 440                                 &session->qat_cipher_alg) != 0) {
 441                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 442                         goto error_out;
 443                 }
 444                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 445                 break;
 446         case RTE_CRYPTO_CIPHER_AES_GCM:
 447                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 448                                 &session->qat_cipher_alg) != 0) {
 449                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 450                         goto error_out;
 451                 }
 452                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 453                 break;
 454         case RTE_CRYPTO_CIPHER_AES_CTR:
 455                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 456                                 &session->qat_cipher_alg) != 0) {
 457                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 458                         goto error_out;
 459                 }
 460                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 461                 break;
 462         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
 463                 if (qat_alg_validate_snow3g_key(cipher_xform->key.length,
 464                                         &session->qat_cipher_alg) != 0) {
 465                         PMD_DRV_LOG(ERR, "Invalid SNOW3G cipher key size");
 466                         goto error_out;
 467                 }
 468                 session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 469                 break;
 470         case RTE_CRYPTO_CIPHER_NULL:
 471         case RTE_CRYPTO_CIPHER_3DES_ECB:
 472         case RTE_CRYPTO_CIPHER_3DES_CBC:
 473         case RTE_CRYPTO_CIPHER_AES_ECB:
 474         case RTE_CRYPTO_CIPHER_AES_CCM:
 475         case RTE_CRYPTO_CIPHER_KASUMI_F8:
 476                 PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
 477                                 cipher_xform->algo);
 478                 goto error_out;
 479         default:
 480                 PMD_DRV_LOG(ERR, "Crypto: Undefined Cipher specified %u\n",
 481                                 cipher_xform->algo);
 482                 goto error_out;
 483         }
 484
 485         if (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 486                 session->qat_dir = ICP_QAT_HW_CIPHER_ENCRYPT;
 487         else
 488                 session->qat_dir = ICP_QAT_HW_CIPHER_DECRYPT;
 489
 490         if (qat_alg_aead_session_create_content_desc_cipher(session,
 491                                                 cipher_xform->key.data,
 492                                                 cipher_xform->key.length))
 493                 goto error_out;
 494
 495         return session;
 496
 497 error_out:
 498         rte_mempool_put(internals->sess_mp, session);
 499         return NULL;
 500 }
 501
 502
 503 void *
 504 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
 505                 struct rte_crypto_sym_xform *xform, void *session_private)
 506 {
 507         struct qat_pmd_private *internals = dev->data->dev_private;
 508
 509         struct qat_session *session = session_private;
 510
 511         int qat_cmd_id;
 512
 513         PMD_INIT_FUNC_TRACE();
 514
 515         /* Get requested QAT command id */
 516         qat_cmd_id = qat_get_cmd_id(xform);
 517         if (qat_cmd_id < 0 || qat_cmd_id >= ICP_QAT_FW_LA_CMD_DELIMITER) {
 518                 PMD_DRV_LOG(ERR, "Unsupported xform chain requested");
 519                 goto error_out;
 520         }
 521         session->qat_cmd = (enum icp_qat_fw_la_cmd_id)qat_cmd_id;
 522         switch (session->qat_cmd) {
 523         case ICP_QAT_FW_LA_CMD_CIPHER:
 524         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 525                 break;
 526         case ICP_QAT_FW_LA_CMD_AUTH:
 527         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 528                 break;
 529         case ICP_QAT_FW_LA_CMD_CIPHER_HASH:
 530         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 531         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 532                 break;
 533         case ICP_QAT_FW_LA_CMD_HASH_CIPHER:
 534         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 535         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 536                 break;
 537         case ICP_QAT_FW_LA_CMD_TRNG_GET_RANDOM:
 538         case ICP_QAT_FW_LA_CMD_TRNG_TEST:
 539         case ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE:
 540         case ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE:
 541         case ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE:
 542         case ICP_QAT_FW_LA_CMD_MGF1:
 543         case ICP_QAT_FW_LA_CMD_AUTH_PRE_COMP:
 544         case ICP_QAT_FW_LA_CMD_CIPHER_PRE_COMP:
 545         case ICP_QAT_FW_LA_CMD_DELIMITER:
 546         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 547                 session->qat_cmd);
 548                 goto error_out;
 549         default:
 550         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 551                 session->qat_cmd);
 552                 goto error_out;
 553         }
 554         return session;
 555
 556 error_out:
 557         rte_mempool_put(internals->sess_mp, session);
 558         return NULL;
 559 }
 560
 561 struct qat_session *
 562 qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 563                                 struct rte_crypto_sym_xform *xform,
 564                                 struct qat_session *session_private)
 565 {
 566
 567         struct qat_pmd_private *internals = dev->data->dev_private;
 568         struct qat_session *session = session_private;
 569         struct rte_crypto_auth_xform *auth_xform = NULL;
 570         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 571         auth_xform = qat_get_auth_xform(xform);
 572
 573         switch (auth_xform->algo) {
 574         case RTE_CRYPTO_AUTH_SHA1_HMAC:
 575                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
 576                 break;
 577         case RTE_CRYPTO_AUTH_SHA224_HMAC:
 578                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA224;
 579                 break;
 580         case RTE_CRYPTO_AUTH_SHA256_HMAC:
 581                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA256;
 582                 break;
 583         case RTE_CRYPTO_AUTH_SHA384_HMAC:
 584                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA384;
 585                 break;
 586         case RTE_CRYPTO_AUTH_SHA512_HMAC:
 587                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA512;
 588                 break;
 589         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
 590                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;
 591                 break;
 592         case RTE_CRYPTO_AUTH_AES_GCM:
 593                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 594                 break;
 595         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 596                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2;
 597                 break;
 598         case RTE_CRYPTO_AUTH_MD5_HMAC:
 599                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_MD5;
 600                 break;
 601         case RTE_CRYPTO_AUTH_NULL:
 602         case RTE_CRYPTO_AUTH_SHA1:
 603         case RTE_CRYPTO_AUTH_SHA256:
 604         case RTE_CRYPTO_AUTH_SHA512:
 605         case RTE_CRYPTO_AUTH_SHA224:
 606         case RTE_CRYPTO_AUTH_SHA384:
 607         case RTE_CRYPTO_AUTH_MD5:
 608         case RTE_CRYPTO_AUTH_AES_CCM:
 609         case RTE_CRYPTO_AUTH_AES_GMAC:
 610         case RTE_CRYPTO_AUTH_KASUMI_F9:
 611         case RTE_CRYPTO_AUTH_AES_CMAC:
 612         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 613         case RTE_CRYPTO_AUTH_ZUC_EIA3:
 614                 PMD_DRV_LOG(ERR, "Crypto: Unsupported hash alg %u",
 615                                 auth_xform->algo);
 616                 goto error_out;
 617         default:
 618                 PMD_DRV_LOG(ERR, "Crypto: Undefined Hash algo %u specified",
 619                                 auth_xform->algo);
 620                 goto error_out;
 621         }
 622         cipher_xform = qat_get_cipher_xform(xform);
 623
 624         if ((session->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128) ||
 625                         (session->qat_hash_alg ==
 626                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_64))  {
 627                 if (qat_alg_aead_session_create_content_desc_auth(session,
 628                                 cipher_xform->key.data,
 629                                 cipher_xform->key.length,
 630                                 auth_xform->add_auth_data_length,
 631                                 auth_xform->digest_length,
 632                                 auth_xform->op))
 633                         goto error_out;
 634         } else {
 635                 if (qat_alg_aead_session_create_content_desc_auth(session,
 636                                 auth_xform->key.data,
 637                                 auth_xform->key.length,
 638                                 auth_xform->add_auth_data_length,
 639                                 auth_xform->digest_length,
 640                                 auth_xform->op))
 641                         goto error_out;
 642         }
 643         return session;
 644
 645 error_out:
 646         if (internals->sess_mp != NULL)
 647                 rte_mempool_put(internals->sess_mp, session);
 648         return NULL;
 649 }
 650
 651 unsigned qat_crypto_sym_get_session_private_size(
 652                 struct rte_cryptodev *dev __rte_unused)
 653 {
 654         return RTE_ALIGN_CEIL(sizeof(struct qat_session), 8);
 655 }
 656
 657
 658 uint16_t
 659 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
 660                 uint16_t nb_ops)
 661 {
 662         register struct qat_queue *queue;
 663         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 664         register uint32_t nb_ops_sent = 0;
 665         register struct rte_crypto_op **cur_op = ops;
 666         register int ret;
 667         uint16_t nb_ops_possible = nb_ops;
 668         register uint8_t *base_addr;
 669         register uint32_t tail;
 670         int overflow;
 671
 672         if (unlikely(nb_ops == 0))
 673                 return 0;
 674
 675         /* read params used a lot in main loop into registers */
 676         queue = &(tmp_qp->tx_q);
 677         base_addr = (uint8_t *)queue->base_addr;
 678         tail = queue->tail;
 679
 680         /* Find how many can actually fit on the ring */
 681         overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops)
 682                                 - queue->max_inflights;
 683         if (overflow > 0) {
 684                 rte_atomic16_sub(&tmp_qp->inflights16, overflow);
 685                 nb_ops_possible = nb_ops - overflow;
 686                 if (nb_ops_possible == 0)
 687                         return 0;
 688         }
 689
 690         while (nb_ops_sent != nb_ops_possible) {
 691                 ret = qat_write_hw_desc_entry(*cur_op, base_addr + tail);
 692                 if (ret != 0) {
 693                         tmp_qp->stats.enqueue_err_count++;
 694                         if (nb_ops_sent == 0)
 695                                 return 0;
 696                         goto kick_tail;
 697                 }
 698
 699                 tail = adf_modulo(tail + queue->msg_size, queue->modulo);
 700                 nb_ops_sent++;
 701                 cur_op++;
 702         }
 703 kick_tail:
 704         WRITE_CSR_RING_TAIL(tmp_qp->mmap_bar_addr, queue->hw_bundle_number,
 705                         queue->hw_queue_number, tail);
 706         queue->tail = tail;
 707         tmp_qp->stats.enqueued_count += nb_ops_sent;
 708         return nb_ops_sent;
 709 }
 710
 711 uint16_t
 712 qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
 713                 uint16_t nb_ops)
 714 {
 715         struct qat_queue *queue;
 716         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 717         uint32_t msg_counter = 0;
 718         struct rte_crypto_op *rx_op;
 719         struct icp_qat_fw_comn_resp *resp_msg;
 720
 721         queue = &(tmp_qp->rx_q);
 722         resp_msg = (struct icp_qat_fw_comn_resp *)
 723                         ((uint8_t *)queue->base_addr + queue->head);
 724
 725         while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
 726                         msg_counter != nb_ops) {
 727                 rx_op = (struct rte_crypto_op *)(uintptr_t)
 728                                 (resp_msg->opaque_data);
 729
 730 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
 731                 rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
 732                                 sizeof(struct icp_qat_fw_comn_resp));
 733 #endif
 734                 if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
 735                                 ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
 736                                         resp_msg->comn_hdr.comn_status)) {
 737                         rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 738                 } else {
 739                         rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 740                 }
 741                 *(uint32_t *)resp_msg = ADF_RING_EMPTY_SIG;
 742                 queue->head = adf_modulo(queue->head +
 743                                 queue->msg_size,
 744                                 ADF_RING_SIZE_MODULO(queue->queue_size));
 745                 resp_msg = (struct icp_qat_fw_comn_resp *)
 746                                         ((uint8_t *)queue->base_addr +
 747                                                         queue->head);
 748                 *ops = rx_op;
 749                 ops++;
 750                 msg_counter++;
 751         }
 752         if (msg_counter > 0) {
 753                 WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr,
 754                                         queue->hw_bundle_number,
 755                                         queue->hw_queue_number, queue->head);
 756                 rte_atomic16_sub(&tmp_qp->inflights16, msg_counter);
 757                 tmp_qp->stats.dequeued_count += msg_counter;
 758         }
 759         return msg_counter;
 760 }
 761
 762 static inline int
 763 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 764 {
 765         struct qat_session *ctx;
 766         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 767         struct icp_qat_fw_la_auth_req_params *auth_param;
 768         register struct icp_qat_fw_la_bulk_req *qat_req;
 769
 770 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 771         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 772                 PMD_DRV_LOG(ERR, "QAT PMD only supports symmetric crypto "
 773                                 "operation requests, op (%p) is not a "
 774                                 "symmetric operation.", op);
 775                 return -EINVAL;
 776         }
 777 #endif
 778         if (unlikely(op->sym->sess_type == RTE_CRYPTO_SYM_OP_SESSIONLESS)) {
 779                 PMD_DRV_LOG(ERR, "QAT PMD only supports session oriented"
 780                                 " requests, op (%p) is sessionless.", op);
 781                 return -EINVAL;
 782         }
 783
 784         if (unlikely(op->sym->session->dev_type != RTE_CRYPTODEV_QAT_SYM_PMD)) {
 785                 PMD_DRV_LOG(ERR, "Session was not created for this device");
 786                 return -EINVAL;
 787         }
 788
 789         ctx = (struct qat_session *)op->sym->session->_private;
 790         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 791         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
 792         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 793
 794         qat_req->comn_mid.dst_length =
 795                 qat_req->comn_mid.src_length =
 796                                 rte_pktmbuf_data_len(op->sym->m_src);
 797
 798         qat_req->comn_mid.dest_data_addr =
 799                 qat_req->comn_mid.src_data_addr =
 800                             rte_pktmbuf_mtophys(op->sym->m_src);
 801
 802         if (unlikely(op->sym->m_dst != NULL)) {
 803                 qat_req->comn_mid.dest_data_addr =
 804                                 rte_pktmbuf_mtophys(op->sym->m_dst);
 805                 qat_req->comn_mid.dst_length =
 806                                 rte_pktmbuf_data_len(op->sym->m_dst);
 807         }
 808
 809         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 810         auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
 811
 812         cipher_param->cipher_length = op->sym->cipher.data.length;
 813         cipher_param->cipher_offset = op->sym->cipher.data.offset;
 814         if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2) {
 815                 if (unlikely((cipher_param->cipher_length % BYTE_LENGTH != 0) ||
 816                                 (cipher_param->cipher_offset
 817                                         % BYTE_LENGTH != 0))) {
 818                         PMD_DRV_LOG(ERR, " For Snow3g, QAT PMD only "
 819                                 "supports byte aligned values");
 820                         op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 821                         return -EINVAL;
 822                 }
 823                 cipher_param->cipher_length >>= 3;
 824                 cipher_param->cipher_offset >>= 3;
 825         }
 826
 827         if (op->sym->cipher.iv.length && (op->sym->cipher.iv.length <=
 828                         sizeof(cipher_param->u.cipher_IV_array))) {
 829                 rte_memcpy(cipher_param->u.cipher_IV_array,
 830                                 op->sym->cipher.iv.data,
 831                                 op->sym->cipher.iv.length);
 832         } else {
 833                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 834                                 qat_req->comn_hdr.serv_specif_flags,
 835                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 836                 cipher_param->u.s.cipher_IV_ptr = op->sym->cipher.iv.phys_addr;
 837         }
 838         if (op->sym->auth.digest.phys_addr) {
 839                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 840                                 qat_req->comn_hdr.serv_specif_flags,
 841                                 ICP_QAT_FW_LA_NO_DIGEST_IN_BUFFER);
 842                 auth_param->auth_res_addr = op->sym->auth.digest.phys_addr;
 843         }
 844         auth_param->auth_off = op->sym->auth.data.offset;
 845         auth_param->auth_len = op->sym->auth.data.length;
 846         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2) {
 847                 if (unlikely((auth_param->auth_off % BYTE_LENGTH != 0) ||
 848                                 (auth_param->auth_len % BYTE_LENGTH != 0))) {
 849                         PMD_DRV_LOG(ERR, " For Snow3g, QAT PMD only "
 850                                 "supports byte aligned values");
 851                         op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 852                         return -EINVAL;
 853                 }
 854                 auth_param->auth_off >>= 3;
 855                 auth_param->auth_len >>= 3;
 856         }
 857         auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
 858
 859         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 860                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 861                 if (op->sym->cipher.iv.length == 12) {
 862                         /*
 863                          * For GCM a 12 bit IV is allowed,
 864                          * but we need to inform the f/w
 865                          */
 866                         ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
 867                                 qat_req->comn_hdr.serv_specif_flags,
 868                                 ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
 869                 }
 870         }
 871
 872 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 873         rte_hexdump(stdout, "qat_req:", qat_req,
 874                         sizeof(struct icp_qat_fw_la_bulk_req));
 875         rte_hexdump(stdout, "src_data:",
 876                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 877                         rte_pktmbuf_data_len(op->sym->m_src));
 878         rte_hexdump(stdout, "iv:", op->sym->cipher.iv.data,
 879                         op->sym->cipher.iv.length);
 880         rte_hexdump(stdout, "digest:", op->sym->auth.digest.data,
 881                         op->sym->auth.digest.length);
 882         rte_hexdump(stdout, "aad:", op->sym->auth.aad.data,
 883                         op->sym->auth.aad.length);
 884 #endif
 885         return 0;
 886 }
 887
 888 static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
 889 {
 890         uint32_t div = data >> shift;
 891         uint32_t mult = div << shift;
 892
 893         return data - mult;
 894 }
 895
 896 void qat_crypto_sym_session_init(struct rte_mempool *mp, void *sym_sess)
 897 {
 898         struct rte_cryptodev_sym_session *sess = sym_sess;
 899         struct qat_session *s = (void *)sess->_private;
 900
 901         PMD_INIT_FUNC_TRACE();
 902         s->cd_paddr = rte_mempool_virt2phy(mp, sess) +
 903                 offsetof(struct qat_session, cd) +
 904                 offsetof(struct rte_cryptodev_sym_session, _private);
 905 }
 906
 907 int qat_dev_config(__rte_unused struct rte_cryptodev *dev)
 908 {
 909         PMD_INIT_FUNC_TRACE();
 910         return -ENOTSUP;
 911 }
 912
 913 int qat_dev_start(__rte_unused struct rte_cryptodev *dev)
 914 {
 915         PMD_INIT_FUNC_TRACE();
 916         return 0;
 917 }
 918
 919 void qat_dev_stop(__rte_unused struct rte_cryptodev *dev)
 920 {
 921         PMD_INIT_FUNC_TRACE();
 922 }
 923
 924 int qat_dev_close(struct rte_cryptodev *dev)
 925 {
 926         int i, ret;
 927
 928         PMD_INIT_FUNC_TRACE();
 929
 930         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
 931                 ret = qat_crypto_sym_qp_release(dev, i);
 932                 if (ret < 0)
 933                         return ret;
 934         }
 935
 936         return 0;
 937 }
 938
 939 void qat_dev_info_get(__rte_unused struct rte_cryptodev *dev,
 940                                 struct rte_cryptodev_info *info)
 941 {
 942         struct qat_pmd_private *internals = dev->data->dev_private;
 943
 944         PMD_INIT_FUNC_TRACE();
 945         if (info != NULL) {
 946                 info->max_nb_queue_pairs =
 947                                 ADF_NUM_SYM_QPS_PER_BUNDLE *
 948                                 ADF_NUM_BUNDLES_PER_DEV;
 949                 info->feature_flags = dev->feature_flags;
 950                 info->capabilities = qat_pmd_capabilities;
 951                 info->sym.max_nb_sessions = internals->max_nb_sessions;
 952                 info->dev_type = RTE_CRYPTODEV_QAT_SYM_PMD;
 953         }
 954 }
 955
 956 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
 957                 struct rte_cryptodev_stats *stats)
 958 {
 959         int i;
 960         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
 961
 962         PMD_INIT_FUNC_TRACE();
 963         if (stats == NULL) {
 964                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
 965                 return;
 966         }
 967         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
 968                 if (qp[i] == NULL) {
 969                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
 970                         continue;
 971                 }
 972
 973                 stats->enqueued_count += qp[i]->stats.enqueued_count;
 974                 stats->dequeued_count += qp[i]->stats.enqueued_count;
 975                 stats->enqueue_err_count += qp[i]->stats.enqueue_err_count;
 976                 stats->dequeue_err_count += qp[i]->stats.enqueue_err_count;
 977         }
 978 }
 979
 980 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev)
 981 {
 982         int i;
 983         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
 984
 985         PMD_INIT_FUNC_TRACE();
 986         for (i = 0; i < dev->data->nb_queue_pairs; i++)
 987                 memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
 988         PMD_DRV_LOG(DEBUG, "QAT crypto: stats cleared");
 989 }