drivers/crypto/qat/qat_crypto.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *       * Redistributions of source code must retain the above copyright
  12  *         notice, this list of conditions and the following disclaimer.
  13  *       * Redistributions in binary form must reproduce the above copyright
  14  *         notice, this list of conditions and the following disclaimer in
  15  *         the documentation and/or other materials provided with the
  16  *         distribution.
  17  *       * Neither the name of Intel Corporation nor the names of its
  18  *         contributors may be used to endorse or promote products derived
  19  *         from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <strings.h>
  37 #include <string.h>
  38 #include <inttypes.h>
  39 #include <errno.h>
  40 #include <sys/queue.h>
  41 #include <stdarg.h>
  42
  43 #include <rte_common.h>
  44 #include <rte_log.h>
  45 #include <rte_debug.h>
  46 #include <rte_memory.h>
  47 #include <rte_memzone.h>
  48 #include <rte_tailq.h>
  49 #include <rte_ether.h>
  50 #include <rte_malloc.h>
  51 #include <rte_launch.h>
  52 #include <rte_eal.h>
  53 #include <rte_per_lcore.h>
  54 #include <rte_lcore.h>
  55 #include <rte_atomic.h>
  56 #include <rte_branch_prediction.h>
  57 #include <rte_mempool.h>
  58 #include <rte_mbuf.h>
  59 #include <rte_string_fns.h>
  60 #include <rte_spinlock.h>
  61 #include <rte_hexdump.h>
  62
  63 #include "qat_logs.h"
  64 #include "qat_algs.h"
  65 #include "qat_crypto.h"
  66 #include "adf_transport_access_macros.h"
  67
  68 #define BYTE_LENGTH    8
  69
  70 static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
  71         {       /* SHA1 HMAC */
  72                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  73                 {.sym = {
  74                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  75                         {.auth = {
  76                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
  77                                 .block_size = 64,
  78                                 .key_size = {
  79                                         .min = 64,
  80                                         .max = 64,
  81                                         .increment = 0
  82                                 },
  83                                 .digest_size = {
  84                                         .min = 20,
  85                                         .max = 20,
  86                                         .increment = 0
  87                                 },
  88                                 .aad_size = { 0 }
  89                         }, }
  90                 }, }
  91         },
  92         {       /* SHA224 HMAC */
  93                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  94                 {.sym = {
  95                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  96                         {.auth = {
  97                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
  98                                 .block_size = 64,
  99                                         .key_size = {
 100                                         .min = 64,
 101                                         .max = 64,
 102                                         .increment = 0
 103                                 },
 104                                 .digest_size = {
 105                                         .min = 28,
 106                                         .max = 28,
 107                                         .increment = 0
 108                                 },
 109                                 .aad_size = { 0 }
 110                         }, }
 111                 }, }
 112         },
 113         {       /* SHA256 HMAC */
 114                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 115                 {.sym = {
 116                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 117                         {.auth = {
 118                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
 119                                 .block_size = 64,
 120                                 .key_size = {
 121                                         .min = 64,
 122                                         .max = 64,
 123                                         .increment = 0
 124                                 },
 125                                 .digest_size = {
 126                                         .min = 32,
 127                                         .max = 32,
 128                                         .increment = 0
 129                                 },
 130                                 .aad_size = { 0 }
 131                         }, }
 132                 }, }
 133         },
 134         {       /* SHA384 HMAC */
 135                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 136                 {.sym = {
 137                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 138                         {.auth = {
 139                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
 140                                 .block_size = 64,
 141                                 .key_size = {
 142                                         .min = 128,
 143                                         .max = 128,
 144                                         .increment = 0
 145                                 },
 146                                 .digest_size = {
 147                                         .min = 48,
 148                                         .max = 48,
 149                                         .increment = 0
 150                                         },
 151                                 .aad_size = { 0 }
 152                         }, }
 153                 }, }
 154         },
 155         {       /* SHA512 HMAC */
 156                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 157                 {.sym = {
 158                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 159                         {.auth = {
 160                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
 161                                 .block_size = 128,
 162                                 .key_size = {
 163                                         .min = 128,
 164                                         .max = 128,
 165                                         .increment = 0
 166                                 },
 167                                 .digest_size = {
 168                                         .min = 64,
 169                                         .max = 64,
 170                                         .increment = 0
 171                                 },
 172                                 .aad_size = { 0 }
 173                         }, }
 174                 }, }
 175         },
 176         {       /* MD5 HMAC */
 177                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 178                 {.sym = {
 179                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 180                         {.auth = {
 181                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
 182                                 .block_size = 64,
 183                                 .key_size = {
 184                                         .min = 8,
 185                                         .max = 64,
 186                                         .increment = 8
 187                                 },
 188                                 .digest_size = {
 189                                         .min = 16,
 190                                         .max = 16,
 191                                         .increment = 0
 192                                 },
 193                                 .aad_size = { 0 }
 194                         }, }
 195                 }, }
 196         },
 197         {       /* AES XCBC MAC */
 198                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 199                 {.sym = {
 200                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 201                         {.auth = {
 202                                 .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
 203                                 .block_size = 16,
 204                                 .key_size = {
 205                                         .min = 16,
 206                                         .max = 16,
 207                                         .increment = 0
 208                                 },
 209                                 .digest_size = {
 210                                         .min = 16,
 211                                         .max = 16,
 212                                         .increment = 0
 213                                 },
 214                                 .aad_size = { 0 }
 215                         }, }
 216                 }, }
 217         },
 218         {       /* AES GCM (AUTH) */
 219                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 220                 {.sym = {
 221                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 222                         {.auth = {
 223                                 .algo = RTE_CRYPTO_AUTH_AES_GCM,
 224                                 .block_size = 16,
 225                                 .key_size = {
 226                                         .min = 16,
 227                                         .max = 32,
 228                                         .increment = 8
 229                                 },
 230                                 .digest_size = {
 231                                         .min = 8,
 232                                         .max = 16,
 233                                         .increment = 4
 234                                 },
 235                                 .aad_size = {
 236                                         .min = 8,
 237                                         .max = 12,
 238                                         .increment = 4
 239                                 }
 240                         }, }
 241                 }, }
 242         },
 243         {       /* AES GMAC (AUTH) */
 244                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 245                 {.sym = {
 246                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 247                         {.auth = {
 248                                 .algo = RTE_CRYPTO_AUTH_AES_GMAC,
 249                                 .block_size = 16,
 250                                 .key_size = {
 251                                         .min = 16,
 252                                         .max = 32,
 253                                         .increment = 8
 254                                 },
 255                                 .digest_size = {
 256                                         .min = 8,
 257                                         .max = 16,
 258                                         .increment = 4
 259                                 },
 260                                 .aad_size = {
 261                                         .min = 1,
 262                                         .max = 65535,
 263                                         .increment = 1
 264                                 }
 265                         }, }
 266                 }, }
 267         },
 268         {       /* SNOW3G (UIA2) */
 269                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 270                 {.sym = {
 271                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 272                         {.auth = {
 273                                 .algo = RTE_CRYPTO_AUTH_SNOW3G_UIA2,
 274                                 .block_size = 16,
 275                                 .key_size = {
 276                                         .min = 16,
 277                                         .max = 16,
 278                                         .increment = 0
 279                                 },
 280                                 .digest_size = {
 281                                         .min = 4,
 282                                         .max = 4,
 283                                         .increment = 0
 284                                 },
 285                                 .aad_size = {
 286                                         .min = 16,
 287                                         .max = 16,
 288                                         .increment = 0
 289                                 }
 290                         }, }
 291                 }, }
 292         },
 293         {       /* AES GCM (CIPHER) */
 294                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 295                 {.sym = {
 296                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 297                         {.cipher = {
 298                                 .algo = RTE_CRYPTO_CIPHER_AES_GCM,
 299                                 .block_size = 16,
 300                                 .key_size = {
 301                                         .min = 16,
 302                                         .max = 32,
 303                                         .increment = 8
 304                                 },
 305                                 .iv_size = {
 306                                         .min = 16,
 307                                         .max = 16,
 308                                         .increment = 0
 309                                 }
 310                         }, }
 311                 }, }
 312         },
 313         {       /* AES CBC */
 314                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 315                 {.sym = {
 316                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 317                         {.cipher = {
 318                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
 319                                 .block_size = 16,
 320                                 .key_size = {
 321                                         .min = 16,
 322                                         .max = 32,
 323                                         .increment = 8
 324                                 },
 325                                 .iv_size = {
 326                                         .min = 16,
 327                                         .max = 16,
 328                                         .increment = 0
 329                                 }
 330                         }, }
 331                 }, }
 332         },
 333         {       /* SNOW3G (UEA2) */
 334                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 335                 {.sym = {
 336                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 337                         {.cipher = {
 338                                 .algo = RTE_CRYPTO_CIPHER_SNOW3G_UEA2,
 339                                 .block_size = 16,
 340                                 .key_size = {
 341                                         .min = 16,
 342                                         .max = 16,
 343                                         .increment = 0
 344                                 },
 345                                 .iv_size = {
 346                                         .min = 16,
 347                                         .max = 16,
 348                                         .increment = 0
 349                                 }
 350                         }, }
 351                 }, }
 352         },
 353         {       /* AES CTR */
 354                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 355                 {.sym = {
 356                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 357                         {.cipher = {
 358                                 .algo = RTE_CRYPTO_CIPHER_AES_CTR,
 359                                 .block_size = 16,
 360                                 .key_size = {
 361                                         .min = 16,
 362                                         .max = 32,
 363                                         .increment = 8
 364                                 },
 365                                 .iv_size = {
 366                                         .min = 16,
 367                                         .max = 16,
 368                                         .increment = 0
 369                                 }
 370                         }, }
 371                 }, }
 372         },
 373         {       /* NULL (AUTH) */
 374                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 375                 {.sym = {
 376                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 377                         {.auth = {
 378                                 .algo = RTE_CRYPTO_AUTH_NULL,
 379                                 .block_size = 1,
 380                                 .key_size = {
 381                                         .min = 0,
 382                                         .max = 0,
 383                                         .increment = 0
 384                                 },
 385                                 .digest_size = {
 386                                         .min = 0,
 387                                         .max = 0,
 388                                         .increment = 0
 389                                 },
 390                                 .aad_size = { 0 }
 391                         }, },
 392                 }, },
 393         },
 394         {       /* NULL (CIPHER) */
 395                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 396                 {.sym = {
 397                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 398                         {.cipher = {
 399                                 .algo = RTE_CRYPTO_CIPHER_NULL,
 400                                 .block_size = 1,
 401                                 .key_size = {
 402                                         .min = 0,
 403                                         .max = 0,
 404                                         .increment = 0
 405                                 },
 406                                 .iv_size = {
 407                                         .min = 0,
 408                                         .max = 0,
 409                                         .increment = 0
 410                                 }
 411                         }, },
 412                 }, }
 413         },
 414         {       /* KASUMI (F8) */
 415                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 416                 {.sym = {
 417                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 418                         {.cipher = {
 419                                 .algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
 420                                 .block_size = 8,
 421                                 .key_size = {
 422                                         .min = 16,
 423                                         .max = 16,
 424                                         .increment = 0
 425                                 },
 426                                 .iv_size = {
 427                                         .min = 8,
 428                                         .max = 8,
 429                                         .increment = 0
 430                                 }
 431                         }, }
 432                 }, }
 433         },
 434         {       /* KASUMI (F9) */
 435                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 436                 {.sym = {
 437                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 438                         {.auth = {
 439                                 .algo = RTE_CRYPTO_AUTH_KASUMI_F9,
 440                                 .block_size = 8,
 441                                 .key_size = {
 442                                         .min = 16,
 443                                         .max = 16,
 444                                         .increment = 0
 445                                 },
 446                                 .digest_size = {
 447                                         .min = 4,
 448                                         .max = 4,
 449                                         .increment = 0
 450                                 },
 451                                 .aad_size = {
 452                                         .min = 8,
 453                                         .max = 8,
 454                                         .increment = 0
 455                                 }
 456                         }, }
 457                 }, }
 458         },
 459         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 460 };
 461
 462 static inline uint32_t
 463 adf_modulo(uint32_t data, uint32_t shift);
 464
 465 static inline int
 466 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg);
 467
 468 void qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
 469                 void *session)
 470 {
 471         struct qat_session *sess = session;
 472         phys_addr_t cd_paddr;
 473
 474         PMD_INIT_FUNC_TRACE();
 475         if (session) {
 476                 cd_paddr = sess->cd_paddr;
 477                 memset(sess, 0, qat_crypto_sym_get_session_private_size(dev));
 478                 sess->cd_paddr = cd_paddr;
 479         } else
 480                 PMD_DRV_LOG(ERR, "NULL session");
 481 }
 482
 483 static int
 484 qat_get_cmd_id(const struct rte_crypto_sym_xform *xform)
 485 {
 486         /* Cipher Only */
 487         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
 488                 return ICP_QAT_FW_LA_CMD_CIPHER;
 489
 490         /* Authentication Only */
 491         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
 492                 return ICP_QAT_FW_LA_CMD_AUTH;
 493
 494         if (xform->next == NULL)
 495                 return -1;
 496
 497         /* Cipher then Authenticate */
 498         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 499                         xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 500                 return ICP_QAT_FW_LA_CMD_CIPHER_HASH;
 501
 502         /* Authenticate then Cipher */
 503         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 504                         xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 505                 return ICP_QAT_FW_LA_CMD_HASH_CIPHER;
 506
 507         return -1;
 508 }
 509
 510 static struct rte_crypto_auth_xform *
 511 qat_get_auth_xform(struct rte_crypto_sym_xform *xform)
 512 {
 513         do {
 514                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 515                         return &xform->auth;
 516
 517                 xform = xform->next;
 518         } while (xform);
 519
 520         return NULL;
 521 }
 522
 523 static struct rte_crypto_cipher_xform *
 524 qat_get_cipher_xform(struct rte_crypto_sym_xform *xform)
 525 {
 526         do {
 527                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 528                         return &xform->cipher;
 529
 530                 xform = xform->next;
 531         } while (xform);
 532
 533         return NULL;
 534 }
 535 void *
 536 qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
 537                 struct rte_crypto_sym_xform *xform, void *session_private)
 538 {
 539         struct qat_pmd_private *internals = dev->data->dev_private;
 540
 541         struct qat_session *session = session_private;
 542
 543         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 544
 545         /* Get cipher xform from crypto xform chain */
 546         cipher_xform = qat_get_cipher_xform(xform);
 547
 548         switch (cipher_xform->algo) {
 549         case RTE_CRYPTO_CIPHER_AES_CBC:
 550                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 551                                 &session->qat_cipher_alg) != 0) {
 552                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 553                         goto error_out;
 554                 }
 555                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 556                 break;
 557         case RTE_CRYPTO_CIPHER_AES_GCM:
 558                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 559                                 &session->qat_cipher_alg) != 0) {
 560                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 561                         goto error_out;
 562                 }
 563                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 564                 break;
 565         case RTE_CRYPTO_CIPHER_AES_CTR:
 566                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 567                                 &session->qat_cipher_alg) != 0) {
 568                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 569                         goto error_out;
 570                 }
 571                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 572                 break;
 573         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
 574                 if (qat_alg_validate_snow3g_key(cipher_xform->key.length,
 575                                         &session->qat_cipher_alg) != 0) {
 576                         PMD_DRV_LOG(ERR, "Invalid SNOW3G cipher key size");
 577                         goto error_out;
 578                 }
 579                 session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 580                 break;
 581         case RTE_CRYPTO_CIPHER_NULL:
 582                 session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 583                 break;
 584         case RTE_CRYPTO_CIPHER_KASUMI_F8:
 585                 if (qat_alg_validate_kasumi_key(cipher_xform->key.length,
 586                                         &session->qat_cipher_alg) != 0) {
 587                         PMD_DRV_LOG(ERR, "Invalid KASUMI cipher key size");
 588                         goto error_out;
 589                 }
 590                 session->qat_mode = ICP_QAT_HW_CIPHER_F8_MODE;
 591                 break;
 592         case RTE_CRYPTO_CIPHER_3DES_ECB:
 593         case RTE_CRYPTO_CIPHER_3DES_CBC:
 594         case RTE_CRYPTO_CIPHER_AES_ECB:
 595         case RTE_CRYPTO_CIPHER_AES_CCM:
 596                 PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
 597                                 cipher_xform->algo);
 598                 goto error_out;
 599         default:
 600                 PMD_DRV_LOG(ERR, "Crypto: Undefined Cipher specified %u\n",
 601                                 cipher_xform->algo);
 602                 goto error_out;
 603         }
 604
 605         if (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 606                 session->qat_dir = ICP_QAT_HW_CIPHER_ENCRYPT;
 607         else
 608                 session->qat_dir = ICP_QAT_HW_CIPHER_DECRYPT;
 609
 610         if (qat_alg_aead_session_create_content_desc_cipher(session,
 611                                                 cipher_xform->key.data,
 612                                                 cipher_xform->key.length))
 613                 goto error_out;
 614
 615         return session;
 616
 617 error_out:
 618         rte_mempool_put(internals->sess_mp, session);
 619         return NULL;
 620 }
 621
 622
 623 void *
 624 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
 625                 struct rte_crypto_sym_xform *xform, void *session_private)
 626 {
 627         struct qat_pmd_private *internals = dev->data->dev_private;
 628
 629         struct qat_session *session = session_private;
 630
 631         int qat_cmd_id;
 632
 633         PMD_INIT_FUNC_TRACE();
 634
 635         /* Get requested QAT command id */
 636         qat_cmd_id = qat_get_cmd_id(xform);
 637         if (qat_cmd_id < 0 || qat_cmd_id >= ICP_QAT_FW_LA_CMD_DELIMITER) {
 638                 PMD_DRV_LOG(ERR, "Unsupported xform chain requested");
 639                 goto error_out;
 640         }
 641         session->qat_cmd = (enum icp_qat_fw_la_cmd_id)qat_cmd_id;
 642         switch (session->qat_cmd) {
 643         case ICP_QAT_FW_LA_CMD_CIPHER:
 644         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 645                 break;
 646         case ICP_QAT_FW_LA_CMD_AUTH:
 647         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 648                 break;
 649         case ICP_QAT_FW_LA_CMD_CIPHER_HASH:
 650         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 651         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 652                 break;
 653         case ICP_QAT_FW_LA_CMD_HASH_CIPHER:
 654         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 655         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 656                 break;
 657         case ICP_QAT_FW_LA_CMD_TRNG_GET_RANDOM:
 658         case ICP_QAT_FW_LA_CMD_TRNG_TEST:
 659         case ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE:
 660         case ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE:
 661         case ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE:
 662         case ICP_QAT_FW_LA_CMD_MGF1:
 663         case ICP_QAT_FW_LA_CMD_AUTH_PRE_COMP:
 664         case ICP_QAT_FW_LA_CMD_CIPHER_PRE_COMP:
 665         case ICP_QAT_FW_LA_CMD_DELIMITER:
 666         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 667                 session->qat_cmd);
 668                 goto error_out;
 669         default:
 670         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 671                 session->qat_cmd);
 672                 goto error_out;
 673         }
 674         return session;
 675
 676 error_out:
 677         rte_mempool_put(internals->sess_mp, session);
 678         return NULL;
 679 }
 680
 681 struct qat_session *
 682 qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 683                                 struct rte_crypto_sym_xform *xform,
 684                                 struct qat_session *session_private)
 685 {
 686
 687         struct qat_pmd_private *internals = dev->data->dev_private;
 688         struct qat_session *session = session_private;
 689         struct rte_crypto_auth_xform *auth_xform = NULL;
 690         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 691         auth_xform = qat_get_auth_xform(xform);
 692
 693         switch (auth_xform->algo) {
 694         case RTE_CRYPTO_AUTH_SHA1_HMAC:
 695                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
 696                 break;
 697         case RTE_CRYPTO_AUTH_SHA224_HMAC:
 698                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA224;
 699                 break;
 700         case RTE_CRYPTO_AUTH_SHA256_HMAC:
 701                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA256;
 702                 break;
 703         case RTE_CRYPTO_AUTH_SHA384_HMAC:
 704                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA384;
 705                 break;
 706         case RTE_CRYPTO_AUTH_SHA512_HMAC:
 707                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA512;
 708                 break;
 709         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
 710                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;
 711                 break;
 712         case RTE_CRYPTO_AUTH_AES_GCM:
 713                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 714                 break;
 715         case RTE_CRYPTO_AUTH_AES_GMAC:
 716                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 717                 break;
 718         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 719                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2;
 720                 break;
 721         case RTE_CRYPTO_AUTH_MD5_HMAC:
 722                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_MD5;
 723                 break;
 724         case RTE_CRYPTO_AUTH_NULL:
 725                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_NULL;
 726                 break;
 727         case RTE_CRYPTO_AUTH_KASUMI_F9:
 728                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_KASUMI_F9;
 729                 break;
 730         case RTE_CRYPTO_AUTH_SHA1:
 731         case RTE_CRYPTO_AUTH_SHA256:
 732         case RTE_CRYPTO_AUTH_SHA512:
 733         case RTE_CRYPTO_AUTH_SHA224:
 734         case RTE_CRYPTO_AUTH_SHA384:
 735         case RTE_CRYPTO_AUTH_MD5:
 736         case RTE_CRYPTO_AUTH_AES_CCM:
 737         case RTE_CRYPTO_AUTH_AES_CMAC:
 738         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 739         case RTE_CRYPTO_AUTH_ZUC_EIA3:
 740                 PMD_DRV_LOG(ERR, "Crypto: Unsupported hash alg %u",
 741                                 auth_xform->algo);
 742                 goto error_out;
 743         default:
 744                 PMD_DRV_LOG(ERR, "Crypto: Undefined Hash algo %u specified",
 745                                 auth_xform->algo);
 746                 goto error_out;
 747         }
 748         cipher_xform = qat_get_cipher_xform(xform);
 749
 750         if ((session->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128) ||
 751                         (session->qat_hash_alg ==
 752                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_64))  {
 753                 if (qat_alg_aead_session_create_content_desc_auth(session,
 754                                 cipher_xform->key.data,
 755                                 cipher_xform->key.length,
 756                                 auth_xform->add_auth_data_length,
 757                                 auth_xform->digest_length,
 758                                 auth_xform->op))
 759                         goto error_out;
 760         } else {
 761                 if (qat_alg_aead_session_create_content_desc_auth(session,
 762                                 auth_xform->key.data,
 763                                 auth_xform->key.length,
 764                                 auth_xform->add_auth_data_length,
 765                                 auth_xform->digest_length,
 766                                 auth_xform->op))
 767                         goto error_out;
 768         }
 769         return session;
 770
 771 error_out:
 772         if (internals->sess_mp != NULL)
 773                 rte_mempool_put(internals->sess_mp, session);
 774         return NULL;
 775 }
 776
 777 unsigned qat_crypto_sym_get_session_private_size(
 778                 struct rte_cryptodev *dev __rte_unused)
 779 {
 780         return RTE_ALIGN_CEIL(sizeof(struct qat_session), 8);
 781 }
 782
 783
 784 uint16_t
 785 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
 786                 uint16_t nb_ops)
 787 {
 788         register struct qat_queue *queue;
 789         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 790         register uint32_t nb_ops_sent = 0;
 791         register struct rte_crypto_op **cur_op = ops;
 792         register int ret;
 793         uint16_t nb_ops_possible = nb_ops;
 794         register uint8_t *base_addr;
 795         register uint32_t tail;
 796         int overflow;
 797
 798         if (unlikely(nb_ops == 0))
 799                 return 0;
 800
 801         /* read params used a lot in main loop into registers */
 802         queue = &(tmp_qp->tx_q);
 803         base_addr = (uint8_t *)queue->base_addr;
 804         tail = queue->tail;
 805
 806         /* Find how many can actually fit on the ring */
 807         overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops)
 808                                 - queue->max_inflights;
 809         if (overflow > 0) {
 810                 rte_atomic16_sub(&tmp_qp->inflights16, overflow);
 811                 nb_ops_possible = nb_ops - overflow;
 812                 if (nb_ops_possible == 0)
 813                         return 0;
 814         }
 815
 816         while (nb_ops_sent != nb_ops_possible) {
 817                 ret = qat_write_hw_desc_entry(*cur_op, base_addr + tail);
 818                 if (ret != 0) {
 819                         tmp_qp->stats.enqueue_err_count++;
 820                         if (nb_ops_sent == 0)
 821                                 return 0;
 822                         goto kick_tail;
 823                 }
 824
 825                 tail = adf_modulo(tail + queue->msg_size, queue->modulo);
 826                 nb_ops_sent++;
 827                 cur_op++;
 828         }
 829 kick_tail:
 830         WRITE_CSR_RING_TAIL(tmp_qp->mmap_bar_addr, queue->hw_bundle_number,
 831                         queue->hw_queue_number, tail);
 832         queue->tail = tail;
 833         tmp_qp->stats.enqueued_count += nb_ops_sent;
 834         return nb_ops_sent;
 835 }
 836
 837 uint16_t
 838 qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
 839                 uint16_t nb_ops)
 840 {
 841         struct qat_queue *queue;
 842         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 843         uint32_t msg_counter = 0;
 844         struct rte_crypto_op *rx_op;
 845         struct icp_qat_fw_comn_resp *resp_msg;
 846
 847         queue = &(tmp_qp->rx_q);
 848         resp_msg = (struct icp_qat_fw_comn_resp *)
 849                         ((uint8_t *)queue->base_addr + queue->head);
 850
 851         while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
 852                         msg_counter != nb_ops) {
 853                 rx_op = (struct rte_crypto_op *)(uintptr_t)
 854                                 (resp_msg->opaque_data);
 855
 856 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
 857                 rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
 858                                 sizeof(struct icp_qat_fw_comn_resp));
 859 #endif
 860                 if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
 861                                 ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
 862                                         resp_msg->comn_hdr.comn_status)) {
 863                         rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 864                 } else {
 865                         rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 866                 }
 867                 *(uint32_t *)resp_msg = ADF_RING_EMPTY_SIG;
 868                 queue->head = adf_modulo(queue->head +
 869                                 queue->msg_size,
 870                                 ADF_RING_SIZE_MODULO(queue->queue_size));
 871                 resp_msg = (struct icp_qat_fw_comn_resp *)
 872                                         ((uint8_t *)queue->base_addr +
 873                                                         queue->head);
 874                 *ops = rx_op;
 875                 ops++;
 876                 msg_counter++;
 877         }
 878         if (msg_counter > 0) {
 879                 WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr,
 880                                         queue->hw_bundle_number,
 881                                         queue->hw_queue_number, queue->head);
 882                 rte_atomic16_sub(&tmp_qp->inflights16, msg_counter);
 883                 tmp_qp->stats.dequeued_count += msg_counter;
 884         }
 885         return msg_counter;
 886 }
 887
 888 static inline int
 889 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 890 {
 891         struct qat_session *ctx;
 892         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 893         struct icp_qat_fw_la_auth_req_params *auth_param;
 894         register struct icp_qat_fw_la_bulk_req *qat_req;
 895
 896 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 897         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 898                 PMD_DRV_LOG(ERR, "QAT PMD only supports symmetric crypto "
 899                                 "operation requests, op (%p) is not a "
 900                                 "symmetric operation.", op);
 901                 return -EINVAL;
 902         }
 903 #endif
 904         if (unlikely(op->sym->sess_type == RTE_CRYPTO_SYM_OP_SESSIONLESS)) {
 905                 PMD_DRV_LOG(ERR, "QAT PMD only supports session oriented"
 906                                 " requests, op (%p) is sessionless.", op);
 907                 return -EINVAL;
 908         }
 909
 910         if (unlikely(op->sym->session->dev_type != RTE_CRYPTODEV_QAT_SYM_PMD)) {
 911                 PMD_DRV_LOG(ERR, "Session was not created for this device");
 912                 return -EINVAL;
 913         }
 914
 915         ctx = (struct qat_session *)op->sym->session->_private;
 916         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 917         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
 918         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 919
 920         qat_req->comn_mid.dst_length =
 921                 qat_req->comn_mid.src_length =
 922                                 rte_pktmbuf_data_len(op->sym->m_src);
 923
 924         qat_req->comn_mid.dest_data_addr =
 925                 qat_req->comn_mid.src_data_addr =
 926                             rte_pktmbuf_mtophys(op->sym->m_src);
 927
 928         if (unlikely(op->sym->m_dst != NULL)) {
 929                 qat_req->comn_mid.dest_data_addr =
 930                                 rte_pktmbuf_mtophys(op->sym->m_dst);
 931                 qat_req->comn_mid.dst_length =
 932                                 rte_pktmbuf_data_len(op->sym->m_dst);
 933         }
 934
 935         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 936         auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
 937
 938         cipher_param->cipher_length = op->sym->cipher.data.length;
 939         cipher_param->cipher_offset = op->sym->cipher.data.offset;
 940         if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
 941                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
 942                 if (unlikely((cipher_param->cipher_length % BYTE_LENGTH != 0) ||
 943                                 (cipher_param->cipher_offset
 944                                         % BYTE_LENGTH != 0))) {
 945                         PMD_DRV_LOG(ERR, " For Snow3g/Kasumi, QAT PMD only "
 946                                 "supports byte aligned values");
 947                         op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 948                         return -EINVAL;
 949                 }
 950                 cipher_param->cipher_length >>= 3;
 951                 cipher_param->cipher_offset >>= 3;
 952         }
 953
 954         if (op->sym->cipher.iv.length && (op->sym->cipher.iv.length <=
 955                         sizeof(cipher_param->u.cipher_IV_array))) {
 956                 rte_memcpy(cipher_param->u.cipher_IV_array,
 957                                 op->sym->cipher.iv.data,
 958                                 op->sym->cipher.iv.length);
 959         } else {
 960                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 961                                 qat_req->comn_hdr.serv_specif_flags,
 962                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 963                 cipher_param->u.s.cipher_IV_ptr = op->sym->cipher.iv.phys_addr;
 964         }
 965         if (op->sym->auth.digest.phys_addr) {
 966                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 967                                 qat_req->comn_hdr.serv_specif_flags,
 968                                 ICP_QAT_FW_LA_NO_DIGEST_IN_BUFFER);
 969                 auth_param->auth_res_addr = op->sym->auth.digest.phys_addr;
 970         }
 971         auth_param->auth_off = op->sym->auth.data.offset;
 972         auth_param->auth_len = op->sym->auth.data.length;
 973         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2) {
 974                 if (unlikely((auth_param->auth_off % BYTE_LENGTH != 0) ||
 975                                 (auth_param->auth_len % BYTE_LENGTH != 0))) {
 976                         PMD_DRV_LOG(ERR, " For Snow3g, QAT PMD only "
 977                                 "supports byte aligned values");
 978                         op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 979                         return -EINVAL;
 980                 }
 981                 auth_param->auth_off >>= 3;
 982                 auth_param->auth_len >>= 3;
 983         }
 984         if ((ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
 985                         ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) &&
 986                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
 987                 auth_param->auth_len = (auth_param->auth_len >> 3)
 988                                 + (auth_param->auth_off >> 3)
 989                                 + (BYTE_LENGTH >> 3)
 990                                 - 8;
 991                 auth_param->auth_off = 8;
 992         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH
 993                         && ctx->qat_hash_alg ==
 994                                         ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
 995                 auth_param->auth_len = (auth_param->auth_len >> 3)
 996                                 + (auth_param->auth_off >> 3)
 997                                 + (BYTE_LENGTH >> 3);
 998                 auth_param->auth_off = 0;
 999         }
1000         auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
1001
1002         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
1003                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
1004                 if (op->sym->cipher.iv.length == 12) {
1005                         /*
1006                          * For GCM a 12 bit IV is allowed,
1007                          * but we need to inform the f/w
1008                          */
1009                         ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
1010                                 qat_req->comn_hdr.serv_specif_flags,
1011                                 ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
1012                 }
1013                 if (op->sym->cipher.data.length == 0) {
1014                         /*
1015                          * GMAC
1016                          */
1017                         qat_req->comn_mid.dest_data_addr =
1018                                 qat_req->comn_mid.src_data_addr =
1019                                         op->sym->auth.aad.phys_addr;
1020                         auth_param->u1.aad_adr = 0;
1021                         auth_param->auth_len = op->sym->auth.aad.length;
1022                         auth_param->u2.aad_sz = 0;
1023
1024                 }
1025
1026         }
1027
1028 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
1029         rte_hexdump(stdout, "qat_req:", qat_req,
1030                         sizeof(struct icp_qat_fw_la_bulk_req));
1031         rte_hexdump(stdout, "src_data:",
1032                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
1033                         rte_pktmbuf_data_len(op->sym->m_src));
1034         rte_hexdump(stdout, "iv:", op->sym->cipher.iv.data,
1035                         op->sym->cipher.iv.length);
1036         rte_hexdump(stdout, "digest:", op->sym->auth.digest.data,
1037                         op->sym->auth.digest.length);
1038         rte_hexdump(stdout, "aad:", op->sym->auth.aad.data,
1039                         op->sym->auth.aad.length);
1040 #endif
1041         return 0;
1042 }
1043
1044 static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
1045 {
1046         uint32_t div = data >> shift;
1047         uint32_t mult = div << shift;
1048
1049         return data - mult;
1050 }
1051
1052 void qat_crypto_sym_session_init(struct rte_mempool *mp, void *sym_sess)
1053 {
1054         struct rte_cryptodev_sym_session *sess = sym_sess;
1055         struct qat_session *s = (void *)sess->_private;
1056
1057         PMD_INIT_FUNC_TRACE();
1058         s->cd_paddr = rte_mempool_virt2phy(mp, sess) +
1059                 offsetof(struct qat_session, cd) +
1060                 offsetof(struct rte_cryptodev_sym_session, _private);
1061 }
1062
1063 int qat_dev_config(__rte_unused struct rte_cryptodev *dev)
1064 {
1065         PMD_INIT_FUNC_TRACE();
1066         return -ENOTSUP;
1067 }
1068
1069 int qat_dev_start(__rte_unused struct rte_cryptodev *dev)
1070 {
1071         PMD_INIT_FUNC_TRACE();
1072         return 0;
1073 }
1074
1075 void qat_dev_stop(__rte_unused struct rte_cryptodev *dev)
1076 {
1077         PMD_INIT_FUNC_TRACE();
1078 }
1079
1080 int qat_dev_close(struct rte_cryptodev *dev)
1081 {
1082         int i, ret;
1083
1084         PMD_INIT_FUNC_TRACE();
1085
1086         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1087                 ret = qat_crypto_sym_qp_release(dev, i);
1088                 if (ret < 0)
1089                         return ret;
1090         }
1091
1092         return 0;
1093 }
1094
1095 void qat_dev_info_get(__rte_unused struct rte_cryptodev *dev,
1096                                 struct rte_cryptodev_info *info)
1097 {
1098         struct qat_pmd_private *internals = dev->data->dev_private;
1099
1100         PMD_INIT_FUNC_TRACE();
1101         if (info != NULL) {
1102                 info->max_nb_queue_pairs =
1103                                 ADF_NUM_SYM_QPS_PER_BUNDLE *
1104                                 ADF_NUM_BUNDLES_PER_DEV;
1105                 info->feature_flags = dev->feature_flags;
1106                 info->capabilities = qat_pmd_capabilities;
1107                 info->sym.max_nb_sessions = internals->max_nb_sessions;
1108                 info->dev_type = RTE_CRYPTODEV_QAT_SYM_PMD;
1109         }
1110 }
1111
1112 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
1113                 struct rte_cryptodev_stats *stats)
1114 {
1115         int i;
1116         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
1117
1118         PMD_INIT_FUNC_TRACE();
1119         if (stats == NULL) {
1120                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
1121                 return;
1122         }
1123         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1124                 if (qp[i] == NULL) {
1125                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1126                         continue;
1127                 }
1128
1129                 stats->enqueued_count += qp[i]->stats.enqueued_count;
1130                 stats->dequeued_count += qp[i]->stats.enqueued_count;
1131                 stats->enqueue_err_count += qp[i]->stats.enqueue_err_count;
1132                 stats->dequeue_err_count += qp[i]->stats.enqueue_err_count;
1133         }
1134 }
1135
1136 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev)
1137 {
1138         int i;
1139         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
1140
1141         PMD_INIT_FUNC_TRACE();
1142         for (i = 0; i < dev->data->nb_queue_pairs; i++)
1143                 memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
1144         PMD_DRV_LOG(DEBUG, "QAT crypto: stats cleared");
1145 }