1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2018 Intel Corporation
8 #include <rte_cryptodev_pmd.h>
9 #include <rte_memzone.h>
11 #include "qat_common.h"
12 #include "qat_device.h"
13 #include "qat_crypto_capabilities.h"
16 * This macro rounds up a number to a be a multiple of
17 * the alignment when the alignment is a power of 2
19 #define ALIGN_POW2_ROUNDUP(num, align) \
20 (((num) + (align) - 1) & ~((align) - 1))
21 #define QAT_64_BTYE_ALIGN_MASK (~0x3f)
23 #define QAT_CSR_HEAD_WRITE_THRESH 32U
24 /* number of requests to accumulate before writing head CSR */
25 #define QAT_CSR_TAIL_WRITE_THRESH 32U
26 /* number of requests to accumulate before writing tail CSR */
27 #define QAT_CSR_TAIL_FORCE_WRITE_THRESH 256U
28 /* number of inflights below which no tail write coalescing should occur */
33 * Structure associated with each queue.
36 char memz_name[RTE_MEMZONE_NAMESIZE];
37 void *base_addr; /* Base address */
38 rte_iova_t base_phys_addr; /* Queue physical address */
39 uint32_t head; /* Shadow copy of the head */
40 uint32_t tail; /* Shadow copy of the tail */
43 uint16_t max_inflights;
45 uint8_t hw_bundle_number;
46 uint8_t hw_queue_number;
47 /* HW queue aka ring offset on bundle */
48 uint32_t csr_head; /* last written head value */
49 uint32_t csr_tail; /* last written tail value */
50 uint16_t nb_processed_responses;
51 /* number of responses processed since last CSR head write */
52 uint16_t nb_pending_requests;
53 /* number of requests pending since last CSR tail write */
59 struct qat_queue tx_q;
60 struct qat_queue rx_q;
61 struct rte_cryptodev_stats stats;
62 struct rte_mempool *op_cookie_pool;
64 uint32_t nb_descriptors;
65 enum qat_device_gen qat_dev_gen;
66 } __rte_cache_aligned;
68 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
69 struct rte_cryptodev_stats *stats);
70 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev);
72 int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
73 const struct rte_cryptodev_qp_conf *rx_conf, int socket_id,
74 struct rte_mempool *session_pool);
75 int qat_crypto_sym_qp_release(struct rte_cryptodev *dev,
76 uint16_t queue_pair_id);
79 qat_pmd_session_mempool_create(struct rte_cryptodev *dev,
80 unsigned nb_objs, unsigned obj_cache_size, int socket_id);
83 qat_crypto_sym_get_session_private_size(struct rte_cryptodev *dev);
86 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
87 struct rte_crypto_sym_xform *xform,
88 struct rte_cryptodev_sym_session *sess,
89 struct rte_mempool *mempool);
93 qat_crypto_set_session_parameters(struct rte_cryptodev *dev,
94 struct rte_crypto_sym_xform *xform, void *session_private);
97 qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,
98 struct qat_session *session);
101 qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
102 struct rte_crypto_sym_xform *xform,
103 struct qat_session *session);
106 qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
107 struct rte_crypto_sym_xform *xform,
108 struct qat_session *session);
112 qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
113 struct rte_cryptodev_sym_session *session);
116 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
120 qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
123 #endif /* _QAT_CRYPTO_H_ */