crypto/qat: enable Rx head writes coalescing
[dpdk.git] / drivers / crypto / qat / qat_crypto.h
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
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13  *     * Redistributions in binary form must reproduce the above copyright
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32  */
33
34 #ifndef _QAT_CRYPTO_H_
35 #define _QAT_CRYPTO_H_
36
37 #include <rte_cryptodev_pmd.h>
38 #include <rte_memzone.h>
39
40 #include "qat_crypto_capabilities.h"
41
42 #define CRYPTODEV_NAME_QAT_SYM_PMD      crypto_qat
43 /**< Intel QAT Symmetric Crypto PMD device name */
44
45 /*
46  * This macro rounds up a number to a be a multiple of
47  * the alignment when the alignment is a power of 2
48  */
49 #define ALIGN_POW2_ROUNDUP(num, align) \
50         (((num) + (align) - 1) & ~((align) - 1))
51 #define QAT_64_BTYE_ALIGN_MASK (~0x3f)
52
53 #define QAT_CSR_HEAD_WRITE_THRESH 32U
54 /* number of requests to accumulate before writing head CSR */
55
56 struct qat_session;
57
58 enum qat_device_gen {
59         QAT_GEN1 = 1,
60         QAT_GEN2,
61 };
62
63 /**
64  * Structure associated with each queue.
65  */
66 struct qat_queue {
67         char            memz_name[RTE_MEMZONE_NAMESIZE];
68         void            *base_addr;             /* Base address */
69         phys_addr_t     base_phys_addr;         /* Queue physical address */
70         uint32_t        head;                   /* Shadow copy of the head */
71         uint32_t        tail;                   /* Shadow copy of the tail */
72         uint32_t        modulo;
73         uint32_t        msg_size;
74         uint16_t        max_inflights;
75         uint32_t        queue_size;
76         uint8_t         hw_bundle_number;
77         uint8_t         hw_queue_number;
78         /* HW queue aka ring offset on bundle */
79         uint32_t        csr_head;               /* last written head value */
80         uint16_t        nb_processed_responses;
81         /* number of responses processed since last CSR head write */
82 };
83
84 struct qat_qp {
85         void                    *mmap_bar_addr;
86         uint16_t                inflights16;
87         struct  qat_queue       tx_q;
88         struct  qat_queue       rx_q;
89         struct  rte_cryptodev_stats stats;
90         struct rte_mempool *op_cookie_pool;
91         void **op_cookies;
92         uint32_t nb_descriptors;
93         enum qat_device_gen qat_dev_gen;
94 } __rte_cache_aligned;
95
96 /** private data structure for each QAT device */
97 struct qat_pmd_private {
98         unsigned max_nb_queue_pairs;
99         /**< Max number of queue pairs supported by device */
100         unsigned max_nb_sessions;
101         /**< Max number of sessions supported by device */
102         enum qat_device_gen qat_dev_gen;
103         /**< QAT device generation */
104         const struct rte_cryptodev_capabilities *qat_dev_capabilities;
105 };
106
107 extern uint8_t cryptodev_qat_driver_id;
108
109 int qat_dev_config(struct rte_cryptodev *dev,
110                 struct rte_cryptodev_config *config);
111 int qat_dev_start(struct rte_cryptodev *dev);
112 void qat_dev_stop(struct rte_cryptodev *dev);
113 int qat_dev_close(struct rte_cryptodev *dev);
114 void qat_dev_info_get(struct rte_cryptodev *dev,
115         struct rte_cryptodev_info *info);
116
117 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
118         struct rte_cryptodev_stats *stats);
119 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev);
120
121 int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
122         const struct rte_cryptodev_qp_conf *rx_conf, int socket_id,
123         struct rte_mempool *session_pool);
124 int qat_crypto_sym_qp_release(struct rte_cryptodev *dev,
125         uint16_t queue_pair_id);
126
127 int
128 qat_pmd_session_mempool_create(struct rte_cryptodev *dev,
129         unsigned nb_objs, unsigned obj_cache_size, int socket_id);
130
131 extern unsigned
132 qat_crypto_sym_get_session_private_size(struct rte_cryptodev *dev);
133
134 extern int
135 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
136                 struct rte_crypto_sym_xform *xform,
137                 struct rte_cryptodev_sym_session *sess,
138                 struct rte_mempool *mempool);
139
140
141 int
142 qat_crypto_set_session_parameters(struct rte_cryptodev *dev,
143                 struct rte_crypto_sym_xform *xform, void *session_private);
144
145 int
146 qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,
147                                 struct qat_session *session);
148
149 int
150 qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
151                                 struct rte_crypto_sym_xform *xform,
152                                 struct qat_session *session);
153
154 int
155 qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
156                 struct rte_crypto_sym_xform *xform,
157                 struct qat_session *session);
158
159
160 extern void
161 qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
162                 struct rte_cryptodev_sym_session *session);
163
164 extern uint16_t
165 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
166                 uint16_t nb_ops);
167
168 extern uint16_t
169 qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
170                 uint16_t nb_ops);
171
172 #endif /* _QAT_CRYPTO_H_ */