1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2021 Intel Corporation
8 #include <rte_cryptodev.h>
9 #ifdef RTE_LIB_SECURITY
10 #include <rte_security.h>
13 #include "qat_device.h"
15 extern uint8_t qat_sym_driver_id;
16 extern uint8_t qat_asym_driver_id;
18 /** helper macro to set cryptodev capability range **/
19 #define CAP_RNG(n, l, r, i) .n = {.min = l, .max = r, .increment = i}
21 #define CAP_RNG_ZERO(n) .n = {.min = 0, .max = 0, .increment = 0}
22 /** helper macro to set cryptodev capability value **/
23 #define CAP_SET(n, v) .n = v
25 /** private data structure for a QAT device.
26 * there can be one of these on each qat_pci_device (VF).
28 struct qat_cryptodev_private {
29 struct qat_pci_device *qat_dev;
30 /**< The qat pci device hosting the service */
32 /**< Device instance for this rte_cryptodev */
33 const struct rte_cryptodev_capabilities *qat_dev_capabilities;
34 /* QAT device symmetric crypto capabilities */
35 const struct rte_memzone *capa_mz;
36 /* Shared memzone for storing capabilities */
37 uint16_t min_enq_burst_threshold;
38 uint32_t internal_capabilities; /* see flags QAT_SYM_CAP_xxx */
39 enum qat_service_type service_type;
42 struct qat_capabilities_info {
43 struct rte_cryptodev_capabilities *data;
48 qat_cryptodev_config(struct rte_cryptodev *dev,
49 struct rte_cryptodev_config *config);
52 qat_cryptodev_start(struct rte_cryptodev *dev);
55 qat_cryptodev_stop(struct rte_cryptodev *dev);
58 qat_cryptodev_close(struct rte_cryptodev *dev);
61 qat_cryptodev_info_get(struct rte_cryptodev *dev,
62 struct rte_cryptodev_info *info);
65 qat_cryptodev_stats_get(struct rte_cryptodev *dev,
66 struct rte_cryptodev_stats *stats);
69 qat_cryptodev_stats_reset(struct rte_cryptodev *dev);
72 qat_cryptodev_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
73 const struct rte_cryptodev_qp_conf *qp_conf, int socket_id);
76 qat_cryptodev_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id);