drivers/crypto/qat/qat_sym.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2015-2019 Intel Corporation
   3  */
   4
   5 #include <openssl/evp.h>
   6
   7 #include <rte_mempool.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_crypto_sym.h>
  10 #include <rte_bus_pci.h>
  11 #include <rte_byteorder.h>
  12
  13 #include "qat_sym.h"
  14
  15
  16 /** Decrypt a single partial block
  17  *  Depends on openssl libcrypto
  18  *  Uses ECB+XOR to do CFB encryption, same result, more performant
  19  */
  20 static inline int
  21 bpi_cipher_decrypt(uint8_t *src, uint8_t *dst,
  22                 uint8_t *iv, int ivlen, int srclen,
  23                 void *bpi_ctx)
  24 {
  25         EVP_CIPHER_CTX *ctx = (EVP_CIPHER_CTX *)bpi_ctx;
  26         int encrypted_ivlen;
  27         uint8_t encrypted_iv[BPI_MAX_ENCR_IV_LEN];
  28         uint8_t *encr = encrypted_iv;
  29
  30         /* ECB method: encrypt (not decrypt!) the IV, then XOR with plaintext */
  31         if (EVP_EncryptUpdate(ctx, encrypted_iv, &encrypted_ivlen, iv, ivlen)
  32                                                                 <= 0)
  33                 goto cipher_decrypt_err;
  34
  35         for (; srclen != 0; --srclen, ++dst, ++src, ++encr)
  36                 *dst = *src ^ *encr;
  37
  38         return 0;
  39
  40 cipher_decrypt_err:
  41         QAT_DP_LOG(ERR, "libcrypto ECB cipher decrypt for BPI IV failed");
  42         return -EINVAL;
  43 }
  44
  45
  46 static inline uint32_t
  47 qat_bpicipher_preprocess(struct qat_sym_session *ctx,
  48                                 struct rte_crypto_op *op)
  49 {
  50         int block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
  51         struct rte_crypto_sym_op *sym_op = op->sym;
  52         uint8_t last_block_len = block_len > 0 ?
  53                         sym_op->cipher.data.length % block_len : 0;
  54
  55         if (last_block_len &&
  56                         ctx->qat_dir == ICP_QAT_HW_CIPHER_DECRYPT) {
  57
  58                 /* Decrypt last block */
  59                 uint8_t *last_block, *dst, *iv;
  60                 uint32_t last_block_offset = sym_op->cipher.data.offset +
  61                                 sym_op->cipher.data.length - last_block_len;
  62                 last_block = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_src,
  63                                 uint8_t *, last_block_offset);
  64
  65                 if (unlikely(sym_op->m_dst != NULL))
  66                         /* out-of-place operation (OOP) */
  67                         dst = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_dst,
  68                                                 uint8_t *, last_block_offset);
  69                 else
  70                         dst = last_block;
  71
  72                 if (last_block_len < sym_op->cipher.data.length)
  73                         /* use previous block ciphertext as IV */
  74                         iv = last_block - block_len;
  75                 else
  76                         /* runt block, i.e. less than one full block */
  77                         iv = rte_crypto_op_ctod_offset(op, uint8_t *,
  78                                         ctx->cipher_iv.offset);
  79
  80 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
  81                 QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: src before pre-process:",
  82                         last_block, last_block_len);
  83                 if (sym_op->m_dst != NULL)
  84                         QAT_DP_HEXDUMP_LOG(DEBUG, "BPI:dst before pre-process:",
  85                         dst, last_block_len);
  86 #endif
  87                 bpi_cipher_decrypt(last_block, dst, iv, block_len,
  88                                 last_block_len, ctx->bpi_ctx);
  89 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
  90                 QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: src after pre-process:",
  91                         last_block, last_block_len);
  92                 if (sym_op->m_dst != NULL)
  93                         QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: dst after pre-process:",
  94                         dst, last_block_len);
  95 #endif
  96         }
  97
  98         return sym_op->cipher.data.length - last_block_len;
  99 }
 100
 101 static inline void
 102 set_cipher_iv(uint16_t iv_length, uint16_t iv_offset,
 103                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
 104                 struct rte_crypto_op *op,
 105                 struct icp_qat_fw_la_bulk_req *qat_req)
 106 {
 107         /* copy IV into request if it fits */
 108         if (iv_length <= sizeof(cipher_param->u.cipher_IV_array)) {
 109                 rte_memcpy(cipher_param->u.cipher_IV_array,
 110                                 rte_crypto_op_ctod_offset(op, uint8_t *,
 111                                         iv_offset),
 112                                 iv_length);
 113         } else {
 114                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 115                                 qat_req->comn_hdr.serv_specif_flags,
 116                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 117                 cipher_param->u.s.cipher_IV_ptr =
 118                                 rte_crypto_op_ctophys_offset(op,
 119                                         iv_offset);
 120         }
 121 }
 122
 123 /** Set IV for CCM is special case, 0th byte is set to q-1
 124  *  where q is padding of nonce in 16 byte block
 125  */
 126 static inline void
 127 set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,
 128                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
 129                 struct rte_crypto_op *op, uint8_t q, uint8_t aad_len_field_sz)
 130 {
 131         rte_memcpy(((uint8_t *)cipher_param->u.cipher_IV_array) +
 132                         ICP_QAT_HW_CCM_NONCE_OFFSET,
 133                         rte_crypto_op_ctod_offset(op, uint8_t *,
 134                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
 135                         iv_length);
 136         *(uint8_t *)&cipher_param->u.cipher_IV_array[0] =
 137                         q - ICP_QAT_HW_CCM_NONCE_OFFSET;
 138
 139         if (aad_len_field_sz)
 140                 rte_memcpy(&op->sym->aead.aad.data[ICP_QAT_HW_CCM_NONCE_OFFSET],
 141                         rte_crypto_op_ctod_offset(op, uint8_t *,
 142                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
 143                         iv_length);
 144 }
 145
 146 int
 147 qat_sym_build_request(void *in_op, uint8_t *out_msg,
 148                 void *op_cookie, enum qat_device_gen qat_dev_gen)
 149 {
 150         int ret = 0;
 151         struct qat_sym_session *ctx;
 152         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 153         struct icp_qat_fw_la_auth_req_params *auth_param;
 154         register struct icp_qat_fw_la_bulk_req *qat_req;
 155         uint8_t do_auth = 0, do_cipher = 0, do_aead = 0;
 156         uint32_t cipher_len = 0, cipher_ofs = 0;
 157         uint32_t auth_len = 0, auth_ofs = 0;
 158         uint32_t min_ofs = 0;
 159         uint64_t src_buf_start = 0, dst_buf_start = 0;
 160         uint64_t auth_data_end = 0;
 161         uint8_t do_sgl = 0;
 162         uint8_t in_place = 1;
 163         int alignment_adjustment = 0;
 164         struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
 165         struct qat_sym_op_cookie *cookie =
 166                                 (struct qat_sym_op_cookie *)op_cookie;
 167
 168         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 169                 QAT_DP_LOG(ERR, "QAT PMD only supports symmetric crypto "
 170                                 "operation requests, op (%p) is not a "
 171                                 "symmetric operation.", op);
 172                 return -EINVAL;
 173         }
 174
 175         if (unlikely(op->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 176                 QAT_DP_LOG(ERR, "QAT PMD only supports session oriented"
 177                                 " requests, op (%p) is sessionless.", op);
 178                 return -EINVAL;
 179         }
 180
 181         ctx = (struct qat_sym_session *)get_sym_session_private_data(
 182                         op->sym->session, cryptodev_qat_driver_id);
 183
 184         if (unlikely(ctx == NULL)) {
 185                 QAT_DP_LOG(ERR, "Session was not created for this device");
 186                 return -EINVAL;
 187         }
 188
 189         if (unlikely(ctx->min_qat_dev_gen > qat_dev_gen)) {
 190                 QAT_DP_LOG(ERR, "Session alg not supported on this device gen");
 191                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
 192                 return -EINVAL;
 193         }
 194
 195         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 196         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
 197         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 198         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 199         auth_param = (void *)((uint8_t *)cipher_param +
 200                         ICP_QAT_FW_HASH_REQUEST_PARAMETERS_OFFSET);
 201
 202         if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
 203                         ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) {
 204                 /* AES-GCM or AES-CCM */
 205                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 206                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||
 207                         (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128
 208                         && ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE
 209                         && ctx->qat_hash_alg ==
 210                                         ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {
 211                         do_aead = 1;
 212                 } else {
 213                         do_auth = 1;
 214                         do_cipher = 1;
 215                 }
 216         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH) {
 217                 do_auth = 1;
 218                 do_cipher = 0;
 219         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
 220                 do_auth = 0;
 221                 do_cipher = 1;
 222         }
 223
 224         if (do_cipher) {
 225
 226                 if (ctx->qat_cipher_alg ==
 227                                          ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
 228                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI ||
 229                         ctx->qat_cipher_alg ==
 230                                 ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3) {
 231
 232                         if (unlikely(
 233                             (op->sym->cipher.data.length % BYTE_LENGTH != 0) ||
 234                             (op->sym->cipher.data.offset % BYTE_LENGTH != 0))) {
 235                                 QAT_DP_LOG(ERR,
 236                   "SNOW3G/KASUMI/ZUC in QAT PMD only supports byte aligned values");
 237                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 238                                 return -EINVAL;
 239                         }
 240                         cipher_len = op->sym->cipher.data.length >> 3;
 241                         cipher_ofs = op->sym->cipher.data.offset >> 3;
 242
 243                 } else if (ctx->bpi_ctx) {
 244                         /* DOCSIS - only send complete blocks to device
 245                          * Process any partial block using CFB mode.
 246                          * Even if 0 complete blocks, still send this to device
 247                          * to get into rx queue for post-process and dequeuing
 248                          */
 249                         cipher_len = qat_bpicipher_preprocess(ctx, op);
 250                         cipher_ofs = op->sym->cipher.data.offset;
 251                 } else {
 252                         cipher_len = op->sym->cipher.data.length;
 253                         cipher_ofs = op->sym->cipher.data.offset;
 254                 }
 255
 256                 set_cipher_iv(ctx->cipher_iv.length, ctx->cipher_iv.offset,
 257                                 cipher_param, op, qat_req);
 258                 min_ofs = cipher_ofs;
 259         }
 260
 261         if (do_auth) {
 262
 263                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 ||
 264                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 ||
 265                         ctx->qat_hash_alg ==
 266                                 ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3) {
 267                         if (unlikely(
 268                             (op->sym->auth.data.offset % BYTE_LENGTH != 0) ||
 269                             (op->sym->auth.data.length % BYTE_LENGTH != 0))) {
 270                                 QAT_DP_LOG(ERR,
 271                 "For SNOW3G/KASUMI/ZUC, QAT PMD only supports byte aligned values");
 272                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 273                                 return -EINVAL;
 274                         }
 275                         auth_ofs = op->sym->auth.data.offset >> 3;
 276                         auth_len = op->sym->auth.data.length >> 3;
 277
 278                         auth_param->u1.aad_adr =
 279                                         rte_crypto_op_ctophys_offset(op,
 280                                                         ctx->auth_iv.offset);
 281
 282                 } else if (ctx->qat_hash_alg ==
 283                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 284                                 ctx->qat_hash_alg ==
 285                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 286                         /* AES-GMAC */
 287                         set_cipher_iv(ctx->auth_iv.length,
 288                                 ctx->auth_iv.offset,
 289                                 cipher_param, op, qat_req);
 290                         auth_ofs = op->sym->auth.data.offset;
 291                         auth_len = op->sym->auth.data.length;
 292
 293                         auth_param->u1.aad_adr = 0;
 294                         auth_param->u2.aad_sz = 0;
 295
 296                         /*
 297                          * If len(iv)==12B fw computes J0
 298                          */
 299                         if (ctx->auth_iv.length == 12) {
 300                                 ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
 301                                         qat_req->comn_hdr.serv_specif_flags,
 302                                         ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
 303
 304                         }
 305                 } else {
 306                         auth_ofs = op->sym->auth.data.offset;
 307                         auth_len = op->sym->auth.data.length;
 308
 309                 }
 310                 min_ofs = auth_ofs;
 311
 312                 auth_param->auth_res_addr =
 313                         op->sym->auth.digest.phys_addr;
 314
 315         }
 316
 317         if (do_aead) {
 318                 /*
 319                  * This address may used for setting AAD physical pointer
 320                  * into IV offset from op
 321                  */
 322                 rte_iova_t aad_phys_addr_aead = op->sym->aead.aad.phys_addr;
 323                 if (ctx->qat_hash_alg ==
 324                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 325                                 ctx->qat_hash_alg ==
 326                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 327                         /*
 328                          * If len(iv)==12B fw computes J0
 329                          */
 330                         if (ctx->cipher_iv.length == 12) {
 331                                 ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
 332                                         qat_req->comn_hdr.serv_specif_flags,
 333                                         ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
 334                         }
 335                         set_cipher_iv(ctx->cipher_iv.length,
 336                                         ctx->cipher_iv.offset,
 337                                         cipher_param, op, qat_req);
 338
 339                 } else if (ctx->qat_hash_alg ==
 340                                 ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC) {
 341
 342                         /* In case of AES-CCM this may point to user selected
 343                          * memory or iv offset in cypto_op
 344                          */
 345                         uint8_t *aad_data = op->sym->aead.aad.data;
 346                         /* This is true AAD length, it not includes 18 bytes of
 347                          * preceding data
 348                          */
 349                         uint8_t aad_ccm_real_len = 0;
 350                         uint8_t aad_len_field_sz = 0;
 351                         uint32_t msg_len_be =
 352                                         rte_bswap32(op->sym->aead.data.length);
 353
 354                         if (ctx->aad_len > ICP_QAT_HW_CCM_AAD_DATA_OFFSET) {
 355                                 aad_len_field_sz = ICP_QAT_HW_CCM_AAD_LEN_INFO;
 356                                 aad_ccm_real_len = ctx->aad_len -
 357                                         ICP_QAT_HW_CCM_AAD_B0_LEN -
 358                                         ICP_QAT_HW_CCM_AAD_LEN_INFO;
 359                         } else {
 360                                 /*
 361                                  * aad_len not greater than 18, so no actual aad
 362                                  *  data, then use IV after op for B0 block
 363                                  */
 364                                 aad_data = rte_crypto_op_ctod_offset(op,
 365                                                 uint8_t *,
 366                                                 ctx->cipher_iv.offset);
 367                                 aad_phys_addr_aead =
 368                                                 rte_crypto_op_ctophys_offset(op,
 369                                                         ctx->cipher_iv.offset);
 370                         }
 371
 372                         uint8_t q = ICP_QAT_HW_CCM_NQ_CONST -
 373                                                         ctx->cipher_iv.length;
 374
 375                         aad_data[0] = ICP_QAT_HW_CCM_BUILD_B0_FLAGS(
 376                                                         aad_len_field_sz,
 377                                                         ctx->digest_length, q);
 378
 379                         if (q > ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE) {
 380                                 memcpy(aad_data + ctx->cipher_iv.length +
 381                                     ICP_QAT_HW_CCM_NONCE_OFFSET +
 382                                     (q - ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE),
 383                                     (uint8_t *)&msg_len_be,
 384                                     ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE);
 385                         } else {
 386                                 memcpy(aad_data + ctx->cipher_iv.length +
 387                                     ICP_QAT_HW_CCM_NONCE_OFFSET,
 388                                     (uint8_t *)&msg_len_be
 389                                     + (ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE
 390                                     - q), q);
 391                         }
 392
 393                         if (aad_len_field_sz > 0) {
 394                                 *(uint16_t *)&aad_data[ICP_QAT_HW_CCM_AAD_B0_LEN]
 395                                                 = rte_bswap16(aad_ccm_real_len);
 396
 397                                 if ((aad_ccm_real_len + aad_len_field_sz)
 398                                                 % ICP_QAT_HW_CCM_AAD_B0_LEN) {
 399                                         uint8_t pad_len = 0;
 400                                         uint8_t pad_idx = 0;
 401
 402                                         pad_len = ICP_QAT_HW_CCM_AAD_B0_LEN -
 403                                         ((aad_ccm_real_len + aad_len_field_sz) %
 404                                                 ICP_QAT_HW_CCM_AAD_B0_LEN);
 405                                         pad_idx = ICP_QAT_HW_CCM_AAD_B0_LEN +
 406                                             aad_ccm_real_len + aad_len_field_sz;
 407                                         memset(&aad_data[pad_idx],
 408                                                         0, pad_len);
 409                                 }
 410
 411                         }
 412
 413                         set_cipher_iv_ccm(ctx->cipher_iv.length,
 414                                         ctx->cipher_iv.offset,
 415                                         cipher_param, op, q,
 416                                         aad_len_field_sz);
 417
 418                 }
 419
 420                 cipher_len = op->sym->aead.data.length;
 421                 cipher_ofs = op->sym->aead.data.offset;
 422                 auth_len = op->sym->aead.data.length;
 423                 auth_ofs = op->sym->aead.data.offset;
 424
 425                 auth_param->u1.aad_adr = aad_phys_addr_aead;
 426                 auth_param->auth_res_addr = op->sym->aead.digest.phys_addr;
 427                 min_ofs = op->sym->aead.data.offset;
 428         }
 429
 430         if (op->sym->m_src->next || (op->sym->m_dst && op->sym->m_dst->next))
 431                 do_sgl = 1;
 432
 433         /* adjust for chain case */
 434         if (do_cipher && do_auth)
 435                 min_ofs = cipher_ofs < auth_ofs ? cipher_ofs : auth_ofs;
 436
 437         if (unlikely(min_ofs >= rte_pktmbuf_data_len(op->sym->m_src) && do_sgl))
 438                 min_ofs = 0;
 439
 440         if (unlikely(op->sym->m_dst != NULL)) {
 441                 /* Out-of-place operation (OOP)
 442                  * Don't align DMA start. DMA the minimum data-set
 443                  * so as not to overwrite data in dest buffer
 444                  */
 445                 in_place = 0;
 446                 src_buf_start =
 447                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 448                 dst_buf_start =
 449                         rte_pktmbuf_iova_offset(op->sym->m_dst, min_ofs);
 450
 451         } else {
 452                 /* In-place operation
 453                  * Start DMA at nearest aligned address below min_ofs
 454                  */
 455                 src_buf_start =
 456                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs)
 457                                                 & QAT_64_BTYE_ALIGN_MASK;
 458
 459                 if (unlikely((rte_pktmbuf_iova(op->sym->m_src) -
 460                                         rte_pktmbuf_headroom(op->sym->m_src))
 461                                                         > src_buf_start)) {
 462                         /* alignment has pushed addr ahead of start of mbuf
 463                          * so revert and take the performance hit
 464                          */
 465                         src_buf_start =
 466                                 rte_pktmbuf_iova_offset(op->sym->m_src,
 467                                                                 min_ofs);
 468                 }
 469                 dst_buf_start = src_buf_start;
 470
 471                 /* remember any adjustment for later, note, can be +/- */
 472                 alignment_adjustment = src_buf_start -
 473                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 474         }
 475
 476         if (do_cipher || do_aead) {
 477                 cipher_param->cipher_offset =
 478                                 (uint32_t)rte_pktmbuf_iova_offset(
 479                                 op->sym->m_src, cipher_ofs) - src_buf_start;
 480                 cipher_param->cipher_length = cipher_len;
 481         } else {
 482                 cipher_param->cipher_offset = 0;
 483                 cipher_param->cipher_length = 0;
 484         }
 485
 486         if (do_auth || do_aead) {
 487                 auth_param->auth_off = (uint32_t)rte_pktmbuf_iova_offset(
 488                                 op->sym->m_src, auth_ofs) - src_buf_start;
 489                 auth_param->auth_len = auth_len;
 490         } else {
 491                 auth_param->auth_off = 0;
 492                 auth_param->auth_len = 0;
 493         }
 494
 495         qat_req->comn_mid.dst_length =
 496                 qat_req->comn_mid.src_length =
 497                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 498                 > (auth_param->auth_off + auth_param->auth_len) ?
 499                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 500                 : (auth_param->auth_off + auth_param->auth_len);
 501
 502         if (do_auth && do_cipher) {
 503                 /* Handle digest-encrypted cases, i.e.
 504                  * auth-gen-then-cipher-encrypt and
 505                  * cipher-decrypt-then-auth-verify
 506                  */
 507                  /* First find the end of the data */
 508                 if (do_sgl) {
 509                         uint32_t remaining_off = auth_param->auth_off +
 510                                 auth_param->auth_len + alignment_adjustment;
 511                         struct rte_mbuf *sgl_buf =
 512                                 (in_place ?
 513                                         op->sym->m_src : op->sym->m_dst);
 514
 515                         while (remaining_off >= rte_pktmbuf_data_len(sgl_buf)
 516                                         && sgl_buf->next != NULL) {
 517                                 remaining_off -= rte_pktmbuf_data_len(sgl_buf);
 518                                 sgl_buf = sgl_buf->next;
 519                         }
 520
 521                         auth_data_end = (uint64_t)rte_pktmbuf_iova_offset(
 522                                 sgl_buf, remaining_off);
 523                 } else {
 524                         auth_data_end = (in_place ?
 525                                 src_buf_start : dst_buf_start) +
 526                                 auth_param->auth_off + auth_param->auth_len;
 527                 }
 528                 /* Then check if digest-encrypted conditions are met */
 529                 if ((auth_param->auth_off + auth_param->auth_len <
 530                                         cipher_param->cipher_offset +
 531                                         cipher_param->cipher_length) &&
 532                                 (op->sym->auth.digest.phys_addr ==
 533                                         auth_data_end)) {
 534                         /* Handle partial digest encryption */
 535                         if (cipher_param->cipher_offset +
 536                                         cipher_param->cipher_length <
 537                                         auth_param->auth_off +
 538                                         auth_param->auth_len +
 539                                         ctx->digest_length)
 540                                 qat_req->comn_mid.dst_length =
 541                                         qat_req->comn_mid.src_length =
 542                                         auth_param->auth_off +
 543                                         auth_param->auth_len +
 544                                         ctx->digest_length;
 545                         struct icp_qat_fw_comn_req_hdr *header =
 546                                 &qat_req->comn_hdr;
 547                         ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 548                                 header->serv_specif_flags,
 549                                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER);
 550                 }
 551         }
 552
 553         if (do_sgl) {
 554
 555                 ICP_QAT_FW_COMN_PTR_TYPE_SET(qat_req->comn_hdr.comn_req_flags,
 556                                 QAT_COMN_PTR_TYPE_SGL);
 557                 ret = qat_sgl_fill_array(op->sym->m_src,
 558                    (int64_t)(src_buf_start - rte_pktmbuf_iova(op->sym->m_src)),
 559                    &cookie->qat_sgl_src,
 560                    qat_req->comn_mid.src_length,
 561                    QAT_SYM_SGL_MAX_NUMBER);
 562
 563                 if (unlikely(ret)) {
 564                         QAT_DP_LOG(ERR, "QAT PMD Cannot fill sgl array");
 565                         return ret;
 566                 }
 567
 568                 if (likely(op->sym->m_dst == NULL))
 569                         qat_req->comn_mid.dest_data_addr =
 570                                 qat_req->comn_mid.src_data_addr =
 571                                 cookie->qat_sgl_src_phys_addr;
 572                 else {
 573                         ret = qat_sgl_fill_array(op->sym->m_dst,
 574                                 (int64_t)(dst_buf_start -
 575                                           rte_pktmbuf_iova(op->sym->m_dst)),
 576                                  &cookie->qat_sgl_dst,
 577                                  qat_req->comn_mid.dst_length,
 578                                  QAT_SYM_SGL_MAX_NUMBER);
 579
 580                         if (unlikely(ret)) {
 581                                 QAT_DP_LOG(ERR, "QAT PMD can't fill sgl array");
 582                                 return ret;
 583                         }
 584
 585                         qat_req->comn_mid.src_data_addr =
 586                                 cookie->qat_sgl_src_phys_addr;
 587                         qat_req->comn_mid.dest_data_addr =
 588                                         cookie->qat_sgl_dst_phys_addr;
 589                 }
 590                 qat_req->comn_mid.src_length = 0;
 591                 qat_req->comn_mid.dst_length = 0;
 592         } else {
 593                 qat_req->comn_mid.src_data_addr = src_buf_start;
 594                 qat_req->comn_mid.dest_data_addr = dst_buf_start;
 595         }
 596
 597         /* Handle Single-Pass GCM */
 598         if (ctx->is_single_pass) {
 599                 cipher_param->spc_aad_addr = op->sym->aead.aad.phys_addr;
 600                 cipher_param->spc_auth_res_addr =
 601                                 op->sym->aead.digest.phys_addr;
 602         }
 603
 604 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
 605         QAT_DP_HEXDUMP_LOG(DEBUG, "qat_req:", qat_req,
 606                         sizeof(struct icp_qat_fw_la_bulk_req));
 607         QAT_DP_HEXDUMP_LOG(DEBUG, "src_data:",
 608                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 609                         rte_pktmbuf_data_len(op->sym->m_src));
 610         if (do_cipher) {
 611                 uint8_t *cipher_iv_ptr = rte_crypto_op_ctod_offset(op,
 612                                                 uint8_t *,
 613                                                 ctx->cipher_iv.offset);
 614                 QAT_DP_HEXDUMP_LOG(DEBUG, "cipher iv:", cipher_iv_ptr,
 615                                 ctx->cipher_iv.length);
 616         }
 617
 618         if (do_auth) {
 619                 if (ctx->auth_iv.length) {
 620                         uint8_t *auth_iv_ptr = rte_crypto_op_ctod_offset(op,
 621                                                         uint8_t *,
 622                                                         ctx->auth_iv.offset);
 623                         QAT_DP_HEXDUMP_LOG(DEBUG, "auth iv:", auth_iv_ptr,
 624                                                 ctx->auth_iv.length);
 625                 }
 626                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->auth.digest.data,
 627                                 ctx->digest_length);
 628         }
 629
 630         if (do_aead) {
 631                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->aead.digest.data,
 632                                 ctx->digest_length);
 633                 QAT_DP_HEXDUMP_LOG(DEBUG, "aad:", op->sym->aead.aad.data,
 634                                 ctx->aad_len);
 635         }
 636 #endif
 637         return 0;
 638 }