drivers/crypto/qat/qat_sym.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2015-2019 Intel Corporation
   3  */
   4
   5 #include <openssl/evp.h>
   6
   7 #include <rte_mempool.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_crypto_sym.h>
  10 #include <rte_bus_pci.h>
  11 #include <rte_byteorder.h>
  12 #ifdef RTE_LIBRTE_SECURITY
  13 #include <rte_net_crc.h>
  14 #endif
  15
  16 #include "qat_sym.h"
  17
  18
  19 /** Decrypt a single partial block
  20  *  Depends on openssl libcrypto
  21  *  Uses ECB+XOR to do CFB encryption, same result, more performant
  22  */
  23 static inline int
  24 bpi_cipher_decrypt(uint8_t *src, uint8_t *dst,
  25                 uint8_t *iv, int ivlen, int srclen,
  26                 void *bpi_ctx)
  27 {
  28         EVP_CIPHER_CTX *ctx = (EVP_CIPHER_CTX *)bpi_ctx;
  29         int encrypted_ivlen;
  30         uint8_t encrypted_iv[BPI_MAX_ENCR_IV_LEN];
  31         uint8_t *encr = encrypted_iv;
  32
  33         /* ECB method: encrypt (not decrypt!) the IV, then XOR with plaintext */
  34         if (EVP_EncryptUpdate(ctx, encrypted_iv, &encrypted_ivlen, iv, ivlen)
  35                                                                 <= 0)
  36                 goto cipher_decrypt_err;
  37
  38         for (; srclen != 0; --srclen, ++dst, ++src, ++encr)
  39                 *dst = *src ^ *encr;
  40
  41         return 0;
  42
  43 cipher_decrypt_err:
  44         QAT_DP_LOG(ERR, "libcrypto ECB cipher decrypt for BPI IV failed");
  45         return -EINVAL;
  46 }
  47
  48
  49 static inline uint32_t
  50 qat_bpicipher_preprocess(struct qat_sym_session *ctx,
  51                                 struct rte_crypto_op *op)
  52 {
  53         int block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
  54         struct rte_crypto_sym_op *sym_op = op->sym;
  55         uint8_t last_block_len = block_len > 0 ?
  56                         sym_op->cipher.data.length % block_len : 0;
  57
  58         if (last_block_len &&
  59                         ctx->qat_dir == ICP_QAT_HW_CIPHER_DECRYPT) {
  60
  61                 /* Decrypt last block */
  62                 uint8_t *last_block, *dst, *iv;
  63                 uint32_t last_block_offset = sym_op->cipher.data.offset +
  64                                 sym_op->cipher.data.length - last_block_len;
  65                 last_block = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_src,
  66                                 uint8_t *, last_block_offset);
  67
  68                 if (unlikely((sym_op->m_dst != NULL)
  69                                 && (sym_op->m_dst != sym_op->m_src)))
  70                         /* out-of-place operation (OOP) */
  71                         dst = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_dst,
  72                                                 uint8_t *, last_block_offset);
  73                 else
  74                         dst = last_block;
  75
  76                 if (last_block_len < sym_op->cipher.data.length)
  77                         /* use previous block ciphertext as IV */
  78                         iv = last_block - block_len;
  79                 else
  80                         /* runt block, i.e. less than one full block */
  81                         iv = rte_crypto_op_ctod_offset(op, uint8_t *,
  82                                         ctx->cipher_iv.offset);
  83
  84 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
  85                 QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: src before pre-process:",
  86                         last_block, last_block_len);
  87                 if (sym_op->m_dst != NULL)
  88                         QAT_DP_HEXDUMP_LOG(DEBUG, "BPI:dst before pre-process:",
  89                         dst, last_block_len);
  90 #endif
  91                 bpi_cipher_decrypt(last_block, dst, iv, block_len,
  92                                 last_block_len, ctx->bpi_ctx);
  93 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
  94                 QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: src after pre-process:",
  95                         last_block, last_block_len);
  96                 if (sym_op->m_dst != NULL)
  97                         QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: dst after pre-process:",
  98                         dst, last_block_len);
  99 #endif
 100         }
 101
 102         return sym_op->cipher.data.length - last_block_len;
 103 }
 104
 105 #ifdef RTE_LIBRTE_SECURITY
 106 static inline void
 107 qat_crc_generate(struct qat_sym_session *ctx,
 108                         struct rte_crypto_op *op)
 109 {
 110         struct rte_crypto_sym_op *sym_op = op->sym;
 111         uint32_t *crc, crc_length;
 112         uint8_t *crc_data;
 113
 114         if (ctx->qat_dir == ICP_QAT_HW_CIPHER_ENCRYPT &&
 115                         sym_op->auth.data.length != 0) {
 116
 117                 crc_length = sym_op->auth.data.length;
 118                 crc_data = rte_pktmbuf_mtod_offset(sym_op->m_src, uint8_t *,
 119                                 sym_op->auth.data.offset);
 120                 crc = (uint32_t *)(crc_data + crc_length);
 121
 122                 *crc = rte_net_crc_calc(crc_data, crc_length,
 123                                 RTE_NET_CRC32_ETH);
 124         }
 125 }
 126 #endif
 127
 128 static inline void
 129 set_cipher_iv(uint16_t iv_length, uint16_t iv_offset,
 130                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
 131                 struct rte_crypto_op *op,
 132                 struct icp_qat_fw_la_bulk_req *qat_req)
 133 {
 134         /* copy IV into request if it fits */
 135         if (iv_length <= sizeof(cipher_param->u.cipher_IV_array)) {
 136                 rte_memcpy(cipher_param->u.cipher_IV_array,
 137                                 rte_crypto_op_ctod_offset(op, uint8_t *,
 138                                         iv_offset),
 139                                 iv_length);
 140         } else {
 141                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 142                                 qat_req->comn_hdr.serv_specif_flags,
 143                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 144                 cipher_param->u.s.cipher_IV_ptr =
 145                                 rte_crypto_op_ctophys_offset(op,
 146                                         iv_offset);
 147         }
 148 }
 149
 150 /** Set IV for CCM is special case, 0th byte is set to q-1
 151  *  where q is padding of nonce in 16 byte block
 152  */
 153 static inline void
 154 set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,
 155                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
 156                 struct rte_crypto_op *op, uint8_t q, uint8_t aad_len_field_sz)
 157 {
 158         rte_memcpy(((uint8_t *)cipher_param->u.cipher_IV_array) +
 159                         ICP_QAT_HW_CCM_NONCE_OFFSET,
 160                         rte_crypto_op_ctod_offset(op, uint8_t *,
 161                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
 162                         iv_length);
 163         *(uint8_t *)&cipher_param->u.cipher_IV_array[0] =
 164                         q - ICP_QAT_HW_CCM_NONCE_OFFSET;
 165
 166         if (aad_len_field_sz)
 167                 rte_memcpy(&op->sym->aead.aad.data[ICP_QAT_HW_CCM_NONCE_OFFSET],
 168                         rte_crypto_op_ctod_offset(op, uint8_t *,
 169                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
 170                         iv_length);
 171 }
 172
 173 int
 174 qat_sym_build_request(void *in_op, uint8_t *out_msg,
 175                 void *op_cookie, enum qat_device_gen qat_dev_gen)
 176 {
 177         int ret = 0;
 178         struct qat_sym_session *ctx = NULL;
 179         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 180         struct icp_qat_fw_la_auth_req_params *auth_param;
 181         register struct icp_qat_fw_la_bulk_req *qat_req;
 182         uint8_t do_auth = 0, do_cipher = 0, do_aead = 0;
 183         uint32_t cipher_len = 0, cipher_ofs = 0;
 184         uint32_t auth_len = 0, auth_ofs = 0;
 185         uint32_t min_ofs = 0;
 186         uint64_t src_buf_start = 0, dst_buf_start = 0;
 187         uint64_t auth_data_end = 0;
 188         uint8_t do_sgl = 0;
 189         uint8_t in_place = 1;
 190         uint8_t is_docsis_sec = 0;
 191         int alignment_adjustment = 0;
 192         struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
 193         struct qat_sym_op_cookie *cookie =
 194                                 (struct qat_sym_op_cookie *)op_cookie;
 195
 196         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 197                 QAT_DP_LOG(ERR, "QAT PMD only supports symmetric crypto "
 198                                 "operation requests, op (%p) is not a "
 199                                 "symmetric operation.", op);
 200                 return -EINVAL;
 201         }
 202
 203         if (unlikely(op->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 204                 QAT_DP_LOG(ERR, "QAT PMD only supports session oriented"
 205                                 " requests, op (%p) is sessionless.", op);
 206                 return -EINVAL;
 207         } else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
 208                 ctx = (struct qat_sym_session *)get_sym_session_private_data(
 209                                 op->sym->session, qat_sym_driver_id);
 210 #ifdef RTE_LIBRTE_SECURITY
 211         } else {
 212                 ctx = (struct qat_sym_session *)get_sec_session_private_data(
 213                                 op->sym->sec_session);
 214                 if (ctx && ctx->bpi_ctx == NULL) {
 215                         QAT_DP_LOG(ERR, "QAT PMD only supports security"
 216                                         " operation requests for DOCSIS, op"
 217                                         " (%p) is not for DOCSIS.", op);
 218                         return -EINVAL;
 219                 }
 220                 is_docsis_sec = 1;
 221 #endif
 222         }
 223
 224         if (unlikely(ctx == NULL)) {
 225                 QAT_DP_LOG(ERR, "Session was not created for this device");
 226                 return -EINVAL;
 227         }
 228
 229         if (unlikely(ctx->min_qat_dev_gen > qat_dev_gen)) {
 230                 QAT_DP_LOG(ERR, "Session alg not supported on this device gen");
 231                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
 232                 return -EINVAL;
 233         }
 234
 235         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 236         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
 237         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 238         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 239         auth_param = (void *)((uint8_t *)cipher_param +
 240                         ICP_QAT_FW_HASH_REQUEST_PARAMETERS_OFFSET);
 241
 242         if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
 243                         ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) {
 244                 /* AES-GCM or AES-CCM */
 245                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 246                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||
 247                         (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128
 248                         && ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE
 249                         && ctx->qat_hash_alg ==
 250                                         ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {
 251                         do_aead = 1;
 252                 } else {
 253                         do_auth = 1;
 254                         do_cipher = 1;
 255                 }
 256         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH) {
 257                 do_auth = 1;
 258                 do_cipher = 0;
 259         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
 260                 do_auth = 0;
 261                 do_cipher = 1;
 262         }
 263
 264         if (do_cipher) {
 265
 266                 if (ctx->qat_cipher_alg ==
 267                                          ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
 268                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI ||
 269                         ctx->qat_cipher_alg ==
 270                                 ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3) {
 271
 272                         if (unlikely(
 273                             (op->sym->cipher.data.length % BYTE_LENGTH != 0) ||
 274                             (op->sym->cipher.data.offset % BYTE_LENGTH != 0))) {
 275                                 QAT_DP_LOG(ERR,
 276                   "SNOW3G/KASUMI/ZUC in QAT PMD only supports byte aligned values");
 277                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 278                                 return -EINVAL;
 279                         }
 280                         cipher_len = op->sym->cipher.data.length >> 3;
 281                         cipher_ofs = op->sym->cipher.data.offset >> 3;
 282
 283                 } else if (ctx->bpi_ctx) {
 284                         /* DOCSIS processing */
 285 #ifdef RTE_LIBRTE_SECURITY
 286                         if (is_docsis_sec) {
 287                                 /* Check for OOP */
 288                                 if (unlikely((op->sym->m_dst != NULL) &&
 289                                                 (op->sym->m_dst !=
 290                                                 op->sym->m_src))) {
 291                                         QAT_DP_LOG(ERR,
 292                                                 "OOP not supported for DOCSIS "
 293                                                 "security");
 294                                         op->status =
 295                                         RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 296                                         return -EINVAL;
 297                                 }
 298
 299                                 /* Calculate CRC */
 300                                 qat_crc_generate(ctx, op);
 301                         }
 302 #else
 303                         RTE_SET_USED(is_docsis_sec);
 304 #endif
 305
 306                         /* Only send complete blocks to device.
 307                          * Process any partial block using CFB mode.
 308                          * Even if 0 complete blocks, still send this to device
 309                          * to get into rx queue for post-process and dequeuing
 310                          */
 311                         cipher_len = qat_bpicipher_preprocess(ctx, op);
 312                         cipher_ofs = op->sym->cipher.data.offset;
 313                 } else {
 314                         cipher_len = op->sym->cipher.data.length;
 315                         cipher_ofs = op->sym->cipher.data.offset;
 316                 }
 317
 318                 set_cipher_iv(ctx->cipher_iv.length, ctx->cipher_iv.offset,
 319                                 cipher_param, op, qat_req);
 320                 min_ofs = cipher_ofs;
 321         }
 322
 323         if (do_auth) {
 324
 325                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 ||
 326                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 ||
 327                         ctx->qat_hash_alg ==
 328                                 ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3) {
 329                         if (unlikely(
 330                             (op->sym->auth.data.offset % BYTE_LENGTH != 0) ||
 331                             (op->sym->auth.data.length % BYTE_LENGTH != 0))) {
 332                                 QAT_DP_LOG(ERR,
 333                 "For SNOW3G/KASUMI/ZUC, QAT PMD only supports byte aligned values");
 334                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 335                                 return -EINVAL;
 336                         }
 337                         auth_ofs = op->sym->auth.data.offset >> 3;
 338                         auth_len = op->sym->auth.data.length >> 3;
 339
 340                         auth_param->u1.aad_adr =
 341                                         rte_crypto_op_ctophys_offset(op,
 342                                                         ctx->auth_iv.offset);
 343
 344                 } else if (ctx->qat_hash_alg ==
 345                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 346                                 ctx->qat_hash_alg ==
 347                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 348                         /* AES-GMAC */
 349                         set_cipher_iv(ctx->auth_iv.length,
 350                                 ctx->auth_iv.offset,
 351                                 cipher_param, op, qat_req);
 352                         auth_ofs = op->sym->auth.data.offset;
 353                         auth_len = op->sym->auth.data.length;
 354
 355                         auth_param->u1.aad_adr = 0;
 356                         auth_param->u2.aad_sz = 0;
 357
 358                         /*
 359                          * If len(iv)==12B fw computes J0
 360                          */
 361                         if (ctx->auth_iv.length == 12) {
 362                                 ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
 363                                         qat_req->comn_hdr.serv_specif_flags,
 364                                         ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
 365
 366                         }
 367                 } else {
 368                         auth_ofs = op->sym->auth.data.offset;
 369                         auth_len = op->sym->auth.data.length;
 370
 371                 }
 372                 min_ofs = auth_ofs;
 373
 374                 auth_param->auth_res_addr =
 375                         op->sym->auth.digest.phys_addr;
 376
 377         }
 378
 379         if (do_aead) {
 380                 /*
 381                  * This address may used for setting AAD physical pointer
 382                  * into IV offset from op
 383                  */
 384                 rte_iova_t aad_phys_addr_aead = op->sym->aead.aad.phys_addr;
 385                 if (ctx->qat_hash_alg ==
 386                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 387                                 ctx->qat_hash_alg ==
 388                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 389                         /*
 390                          * If len(iv)==12B fw computes J0
 391                          */
 392                         if (ctx->cipher_iv.length == 12) {
 393                                 ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
 394                                         qat_req->comn_hdr.serv_specif_flags,
 395                                         ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
 396                         }
 397                         set_cipher_iv(ctx->cipher_iv.length,
 398                                         ctx->cipher_iv.offset,
 399                                         cipher_param, op, qat_req);
 400
 401                 } else if (ctx->qat_hash_alg ==
 402                                 ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC) {
 403
 404                         /* In case of AES-CCM this may point to user selected
 405                          * memory or iv offset in cypto_op
 406                          */
 407                         uint8_t *aad_data = op->sym->aead.aad.data;
 408                         /* This is true AAD length, it not includes 18 bytes of
 409                          * preceding data
 410                          */
 411                         uint8_t aad_ccm_real_len = 0;
 412                         uint8_t aad_len_field_sz = 0;
 413                         uint32_t msg_len_be =
 414                                         rte_bswap32(op->sym->aead.data.length);
 415
 416                         if (ctx->aad_len > ICP_QAT_HW_CCM_AAD_DATA_OFFSET) {
 417                                 aad_len_field_sz = ICP_QAT_HW_CCM_AAD_LEN_INFO;
 418                                 aad_ccm_real_len = ctx->aad_len -
 419                                         ICP_QAT_HW_CCM_AAD_B0_LEN -
 420                                         ICP_QAT_HW_CCM_AAD_LEN_INFO;
 421                         } else {
 422                                 /*
 423                                  * aad_len not greater than 18, so no actual aad
 424                                  *  data, then use IV after op for B0 block
 425                                  */
 426                                 aad_data = rte_crypto_op_ctod_offset(op,
 427                                                 uint8_t *,
 428                                                 ctx->cipher_iv.offset);
 429                                 aad_phys_addr_aead =
 430                                                 rte_crypto_op_ctophys_offset(op,
 431                                                         ctx->cipher_iv.offset);
 432                         }
 433
 434                         uint8_t q = ICP_QAT_HW_CCM_NQ_CONST -
 435                                                         ctx->cipher_iv.length;
 436
 437                         aad_data[0] = ICP_QAT_HW_CCM_BUILD_B0_FLAGS(
 438                                                         aad_len_field_sz,
 439                                                         ctx->digest_length, q);
 440
 441                         if (q > ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE) {
 442                                 memcpy(aad_data + ctx->cipher_iv.length +
 443                                     ICP_QAT_HW_CCM_NONCE_OFFSET +
 444                                     (q - ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE),
 445                                     (uint8_t *)&msg_len_be,
 446                                     ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE);
 447                         } else {
 448                                 memcpy(aad_data + ctx->cipher_iv.length +
 449                                     ICP_QAT_HW_CCM_NONCE_OFFSET,
 450                                     (uint8_t *)&msg_len_be
 451                                     + (ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE
 452                                     - q), q);
 453                         }
 454
 455                         if (aad_len_field_sz > 0) {
 456                                 *(uint16_t *)&aad_data[ICP_QAT_HW_CCM_AAD_B0_LEN]
 457                                                 = rte_bswap16(aad_ccm_real_len);
 458
 459                                 if ((aad_ccm_real_len + aad_len_field_sz)
 460                                                 % ICP_QAT_HW_CCM_AAD_B0_LEN) {
 461                                         uint8_t pad_len = 0;
 462                                         uint8_t pad_idx = 0;
 463
 464                                         pad_len = ICP_QAT_HW_CCM_AAD_B0_LEN -
 465                                         ((aad_ccm_real_len + aad_len_field_sz) %
 466                                                 ICP_QAT_HW_CCM_AAD_B0_LEN);
 467                                         pad_idx = ICP_QAT_HW_CCM_AAD_B0_LEN +
 468                                             aad_ccm_real_len + aad_len_field_sz;
 469                                         memset(&aad_data[pad_idx],
 470                                                         0, pad_len);
 471                                 }
 472
 473                         }
 474
 475                         set_cipher_iv_ccm(ctx->cipher_iv.length,
 476                                         ctx->cipher_iv.offset,
 477                                         cipher_param, op, q,
 478                                         aad_len_field_sz);
 479
 480                 }
 481
 482                 cipher_len = op->sym->aead.data.length;
 483                 cipher_ofs = op->sym->aead.data.offset;
 484                 auth_len = op->sym->aead.data.length;
 485                 auth_ofs = op->sym->aead.data.offset;
 486
 487                 auth_param->u1.aad_adr = aad_phys_addr_aead;
 488                 auth_param->auth_res_addr = op->sym->aead.digest.phys_addr;
 489                 min_ofs = op->sym->aead.data.offset;
 490         }
 491
 492         if (op->sym->m_src->nb_segs > 1 ||
 493                         (op->sym->m_dst && op->sym->m_dst->nb_segs > 1))
 494                 do_sgl = 1;
 495
 496         /* adjust for chain case */
 497         if (do_cipher && do_auth)
 498                 min_ofs = cipher_ofs < auth_ofs ? cipher_ofs : auth_ofs;
 499
 500         if (unlikely(min_ofs >= rte_pktmbuf_data_len(op->sym->m_src) && do_sgl))
 501                 min_ofs = 0;
 502
 503         if (unlikely((op->sym->m_dst != NULL) &&
 504                         (op->sym->m_dst != op->sym->m_src))) {
 505                 /* Out-of-place operation (OOP)
 506                  * Don't align DMA start. DMA the minimum data-set
 507                  * so as not to overwrite data in dest buffer
 508                  */
 509                 in_place = 0;
 510                 src_buf_start =
 511                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 512                 dst_buf_start =
 513                         rte_pktmbuf_iova_offset(op->sym->m_dst, min_ofs);
 514
 515         } else {
 516                 /* In-place operation
 517                  * Start DMA at nearest aligned address below min_ofs
 518                  */
 519                 src_buf_start =
 520                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs)
 521                                                 & QAT_64_BTYE_ALIGN_MASK;
 522
 523                 if (unlikely((rte_pktmbuf_iova(op->sym->m_src) -
 524                                         rte_pktmbuf_headroom(op->sym->m_src))
 525                                                         > src_buf_start)) {
 526                         /* alignment has pushed addr ahead of start of mbuf
 527                          * so revert and take the performance hit
 528                          */
 529                         src_buf_start =
 530                                 rte_pktmbuf_iova_offset(op->sym->m_src,
 531                                                                 min_ofs);
 532                 }
 533                 dst_buf_start = src_buf_start;
 534
 535                 /* remember any adjustment for later, note, can be +/- */
 536                 alignment_adjustment = src_buf_start -
 537                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 538         }
 539
 540         if (do_cipher || do_aead) {
 541                 cipher_param->cipher_offset =
 542                                 (uint32_t)rte_pktmbuf_iova_offset(
 543                                 op->sym->m_src, cipher_ofs) - src_buf_start;
 544                 cipher_param->cipher_length = cipher_len;
 545         } else {
 546                 cipher_param->cipher_offset = 0;
 547                 cipher_param->cipher_length = 0;
 548         }
 549
 550         if (do_auth || do_aead) {
 551                 auth_param->auth_off = (uint32_t)rte_pktmbuf_iova_offset(
 552                                 op->sym->m_src, auth_ofs) - src_buf_start;
 553                 auth_param->auth_len = auth_len;
 554         } else {
 555                 auth_param->auth_off = 0;
 556                 auth_param->auth_len = 0;
 557         }
 558
 559         qat_req->comn_mid.dst_length =
 560                 qat_req->comn_mid.src_length =
 561                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 562                 > (auth_param->auth_off + auth_param->auth_len) ?
 563                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 564                 : (auth_param->auth_off + auth_param->auth_len);
 565
 566         if (do_auth && do_cipher) {
 567                 /* Handle digest-encrypted cases, i.e.
 568                  * auth-gen-then-cipher-encrypt and
 569                  * cipher-decrypt-then-auth-verify
 570                  */
 571                  /* First find the end of the data */
 572                 if (do_sgl) {
 573                         uint32_t remaining_off = auth_param->auth_off +
 574                                 auth_param->auth_len + alignment_adjustment;
 575                         struct rte_mbuf *sgl_buf =
 576                                 (in_place ?
 577                                         op->sym->m_src : op->sym->m_dst);
 578
 579                         while (remaining_off >= rte_pktmbuf_data_len(sgl_buf)
 580                                         && sgl_buf->next != NULL) {
 581                                 remaining_off -= rte_pktmbuf_data_len(sgl_buf);
 582                                 sgl_buf = sgl_buf->next;
 583                         }
 584
 585                         auth_data_end = (uint64_t)rte_pktmbuf_iova_offset(
 586                                 sgl_buf, remaining_off);
 587                 } else {
 588                         auth_data_end = (in_place ?
 589                                 src_buf_start : dst_buf_start) +
 590                                 auth_param->auth_off + auth_param->auth_len;
 591                 }
 592                 /* Then check if digest-encrypted conditions are met */
 593                 if ((auth_param->auth_off + auth_param->auth_len <
 594                                         cipher_param->cipher_offset +
 595                                         cipher_param->cipher_length) &&
 596                                 (op->sym->auth.digest.phys_addr ==
 597                                         auth_data_end)) {
 598                         /* Handle partial digest encryption */
 599                         if (cipher_param->cipher_offset +
 600                                         cipher_param->cipher_length <
 601                                         auth_param->auth_off +
 602                                         auth_param->auth_len +
 603                                         ctx->digest_length)
 604                                 qat_req->comn_mid.dst_length =
 605                                         qat_req->comn_mid.src_length =
 606                                         auth_param->auth_off +
 607                                         auth_param->auth_len +
 608                                         ctx->digest_length;
 609                         struct icp_qat_fw_comn_req_hdr *header =
 610                                 &qat_req->comn_hdr;
 611                         ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 612                                 header->serv_specif_flags,
 613                                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER);
 614                 }
 615         }
 616
 617         if (do_sgl) {
 618
 619                 ICP_QAT_FW_COMN_PTR_TYPE_SET(qat_req->comn_hdr.comn_req_flags,
 620                                 QAT_COMN_PTR_TYPE_SGL);
 621                 ret = qat_sgl_fill_array(op->sym->m_src,
 622                    (int64_t)(src_buf_start - rte_pktmbuf_iova(op->sym->m_src)),
 623                    &cookie->qat_sgl_src,
 624                    qat_req->comn_mid.src_length,
 625                    QAT_SYM_SGL_MAX_NUMBER);
 626
 627                 if (unlikely(ret)) {
 628                         QAT_DP_LOG(ERR, "QAT PMD Cannot fill sgl array");
 629                         return ret;
 630                 }
 631
 632                 if (in_place)
 633                         qat_req->comn_mid.dest_data_addr =
 634                                 qat_req->comn_mid.src_data_addr =
 635                                 cookie->qat_sgl_src_phys_addr;
 636                 else {
 637                         ret = qat_sgl_fill_array(op->sym->m_dst,
 638                                 (int64_t)(dst_buf_start -
 639                                           rte_pktmbuf_iova(op->sym->m_dst)),
 640                                  &cookie->qat_sgl_dst,
 641                                  qat_req->comn_mid.dst_length,
 642                                  QAT_SYM_SGL_MAX_NUMBER);
 643
 644                         if (unlikely(ret)) {
 645                                 QAT_DP_LOG(ERR, "QAT PMD can't fill sgl array");
 646                                 return ret;
 647                         }
 648
 649                         qat_req->comn_mid.src_data_addr =
 650                                 cookie->qat_sgl_src_phys_addr;
 651                         qat_req->comn_mid.dest_data_addr =
 652                                         cookie->qat_sgl_dst_phys_addr;
 653                 }
 654                 qat_req->comn_mid.src_length = 0;
 655                 qat_req->comn_mid.dst_length = 0;
 656         } else {
 657                 qat_req->comn_mid.src_data_addr = src_buf_start;
 658                 qat_req->comn_mid.dest_data_addr = dst_buf_start;
 659         }
 660
 661         /* Handle Single-Pass GCM */
 662         if (ctx->is_single_pass) {
 663                 cipher_param->spc_aad_addr = op->sym->aead.aad.phys_addr;
 664                 cipher_param->spc_auth_res_addr =
 665                                 op->sym->aead.digest.phys_addr;
 666         }
 667
 668 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
 669         QAT_DP_HEXDUMP_LOG(DEBUG, "qat_req:", qat_req,
 670                         sizeof(struct icp_qat_fw_la_bulk_req));
 671         QAT_DP_HEXDUMP_LOG(DEBUG, "src_data:",
 672                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 673                         rte_pktmbuf_data_len(op->sym->m_src));
 674         if (do_cipher) {
 675                 uint8_t *cipher_iv_ptr = rte_crypto_op_ctod_offset(op,
 676                                                 uint8_t *,
 677                                                 ctx->cipher_iv.offset);
 678                 QAT_DP_HEXDUMP_LOG(DEBUG, "cipher iv:", cipher_iv_ptr,
 679                                 ctx->cipher_iv.length);
 680         }
 681
 682         if (do_auth) {
 683                 if (ctx->auth_iv.length) {
 684                         uint8_t *auth_iv_ptr = rte_crypto_op_ctod_offset(op,
 685                                                         uint8_t *,
 686                                                         ctx->auth_iv.offset);
 687                         QAT_DP_HEXDUMP_LOG(DEBUG, "auth iv:", auth_iv_ptr,
 688                                                 ctx->auth_iv.length);
 689                 }
 690                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->auth.digest.data,
 691                                 ctx->digest_length);
 692         }
 693
 694         if (do_aead) {
 695                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->aead.digest.data,
 696                                 ctx->digest_length);
 697                 QAT_DP_HEXDUMP_LOG(DEBUG, "aad:", op->sym->aead.aad.data,
 698                                 ctx->aad_len);
 699         }
 700 #endif
 701         return 0;
 702 }