drivers/crypto/qat/qat_sym.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2015-2022 Intel Corporation
   3  */
   4
   5 #include <openssl/evp.h>
   6
   7 #include <rte_mempool.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_crypto_sym.h>
  10 #include <rte_bus_pci.h>
  11 #include <rte_byteorder.h>
  12
  13 #include "qat_sym.h"
  14 #include "dev/qat_crypto_pmd_gens.h"
  15
  16 uint8_t qat_sym_driver_id;
  17
  18 struct qat_crypto_gen_dev_ops qat_sym_gen_dev_ops[QAT_N_GENS];
  19
  20 static inline void
  21 set_cipher_iv(uint16_t iv_length, uint16_t iv_offset,
  22                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
  23                 struct rte_crypto_op *op,
  24                 struct icp_qat_fw_la_bulk_req *qat_req)
  25 {
  26         /* copy IV into request if it fits */
  27         if (iv_length <= sizeof(cipher_param->u.cipher_IV_array)) {
  28                 rte_memcpy(cipher_param->u.cipher_IV_array,
  29                                 rte_crypto_op_ctod_offset(op, uint8_t *,
  30                                         iv_offset),
  31                                 iv_length);
  32         } else {
  33                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
  34                                 qat_req->comn_hdr.serv_specif_flags,
  35                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
  36                 cipher_param->u.s.cipher_IV_ptr =
  37                                 rte_crypto_op_ctophys_offset(op,
  38                                         iv_offset);
  39         }
  40 }
  41
  42 /** Set IV for CCM is special case, 0th byte is set to q-1
  43  *  where q is padding of nonce in 16 byte block
  44  */
  45 static inline void
  46 set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,
  47                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
  48                 struct rte_crypto_op *op, uint8_t q, uint8_t aad_len_field_sz)
  49 {
  50         rte_memcpy(((uint8_t *)cipher_param->u.cipher_IV_array) +
  51                         ICP_QAT_HW_CCM_NONCE_OFFSET,
  52                         rte_crypto_op_ctod_offset(op, uint8_t *,
  53                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
  54                         iv_length);
  55         *(uint8_t *)&cipher_param->u.cipher_IV_array[0] =
  56                         q - ICP_QAT_HW_CCM_NONCE_OFFSET;
  57
  58         if (aad_len_field_sz)
  59                 rte_memcpy(&op->sym->aead.aad.data[ICP_QAT_HW_CCM_NONCE_OFFSET],
  60                         rte_crypto_op_ctod_offset(op, uint8_t *,
  61                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
  62                         iv_length);
  63 }
  64
  65 /** Handle Single-Pass AES-GMAC on QAT GEN3 */
  66 static inline void
  67 handle_spc_gmac(struct qat_sym_session *ctx, struct rte_crypto_op *op,
  68                 struct qat_sym_op_cookie *cookie,
  69                 struct icp_qat_fw_la_bulk_req *qat_req)
  70 {
  71         static const uint32_t ver_key_offset =
  72                         sizeof(struct icp_qat_hw_auth_setup) +
  73                         ICP_QAT_HW_GALOIS_128_STATE1_SZ +
  74                         ICP_QAT_HW_GALOIS_H_SZ + ICP_QAT_HW_GALOIS_LEN_A_SZ +
  75                         ICP_QAT_HW_GALOIS_E_CTR0_SZ +
  76                         sizeof(struct icp_qat_hw_cipher_config);
  77         struct icp_qat_fw_cipher_cd_ctrl_hdr *cipher_cd_ctrl =
  78                         (void *) &qat_req->cd_ctrl;
  79         struct icp_qat_fw_la_cipher_req_params *cipher_param =
  80                         (void *) &qat_req->serv_specif_rqpars;
  81         uint32_t data_length = op->sym->auth.data.length;
  82
  83         /* Fill separate Content Descriptor for this op */
  84         rte_memcpy(cookie->opt.spc_gmac.cd_cipher.key,
  85                         ctx->auth_op == ICP_QAT_HW_AUTH_GENERATE ?
  86                                 ctx->cd.cipher.key :
  87                                 RTE_PTR_ADD(&ctx->cd, ver_key_offset),
  88                         ctx->auth_key_length);
  89         cookie->opt.spc_gmac.cd_cipher.cipher_config.val =
  90                         ICP_QAT_HW_CIPHER_CONFIG_BUILD(
  91                                 ICP_QAT_HW_CIPHER_AEAD_MODE,
  92                                 ctx->qat_cipher_alg,
  93                                 ICP_QAT_HW_CIPHER_NO_CONVERT,
  94                                 (ctx->auth_op == ICP_QAT_HW_AUTH_GENERATE ?
  95                                         ICP_QAT_HW_CIPHER_ENCRYPT :
  96                                         ICP_QAT_HW_CIPHER_DECRYPT));
  97         QAT_FIELD_SET(cookie->opt.spc_gmac.cd_cipher.cipher_config.val,
  98                         ctx->digest_length,
  99                         QAT_CIPHER_AEAD_HASH_CMP_LEN_BITPOS,
 100                         QAT_CIPHER_AEAD_HASH_CMP_LEN_MASK);
 101         cookie->opt.spc_gmac.cd_cipher.cipher_config.reserved =
 102                         ICP_QAT_HW_CIPHER_CONFIG_BUILD_UPPER(data_length);
 103
 104         /* Update the request */
 105         qat_req->cd_pars.u.s.content_desc_addr =
 106                         cookie->opt.spc_gmac.cd_phys_addr;
 107         qat_req->cd_pars.u.s.content_desc_params_sz = RTE_ALIGN_CEIL(
 108                         sizeof(struct icp_qat_hw_cipher_config) +
 109                         ctx->auth_key_length, 8) >> 3;
 110         qat_req->comn_mid.src_length = data_length;
 111         qat_req->comn_mid.dst_length = 0;
 112
 113         cipher_param->spc_aad_addr = 0;
 114         cipher_param->spc_auth_res_addr = op->sym->auth.digest.phys_addr;
 115         cipher_param->spc_aad_sz = data_length;
 116         cipher_param->reserved = 0;
 117         cipher_param->spc_auth_res_sz = ctx->digest_length;
 118
 119         qat_req->comn_hdr.service_cmd_id = ICP_QAT_FW_LA_CMD_CIPHER;
 120         cipher_cd_ctrl->cipher_cfg_offset = 0;
 121         ICP_QAT_FW_COMN_CURR_ID_SET(cipher_cd_ctrl, ICP_QAT_FW_SLICE_CIPHER);
 122         ICP_QAT_FW_COMN_NEXT_ID_SET(cipher_cd_ctrl, ICP_QAT_FW_SLICE_DRAM_WR);
 123         ICP_QAT_FW_LA_SINGLE_PASS_PROTO_FLAG_SET(
 124                         qat_req->comn_hdr.serv_specif_flags,
 125                         ICP_QAT_FW_LA_SINGLE_PASS_PROTO);
 126         ICP_QAT_FW_LA_PROTO_SET(
 127                         qat_req->comn_hdr.serv_specif_flags,
 128                         ICP_QAT_FW_LA_NO_PROTO);
 129 }
 130
 131 int
 132 qat_sym_build_request(void *in_op, uint8_t *out_msg,
 133                 void *op_cookie, __rte_unused enum qat_device_gen qat_dev_gen)
 134 {
 135         int ret = 0;
 136         struct qat_sym_session *ctx = NULL;
 137         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 138         struct icp_qat_fw_la_cipher_20_req_params *cipher_param20;
 139         struct icp_qat_fw_la_auth_req_params *auth_param;
 140         register struct icp_qat_fw_la_bulk_req *qat_req;
 141         uint8_t do_auth = 0, do_cipher = 0, do_aead = 0;
 142         uint32_t cipher_len = 0, cipher_ofs = 0;
 143         uint32_t auth_len = 0, auth_ofs = 0;
 144         uint32_t min_ofs = 0;
 145         uint64_t src_buf_start = 0, dst_buf_start = 0;
 146         uint64_t auth_data_end = 0;
 147         uint8_t do_sgl = 0;
 148         uint8_t in_place = 1;
 149         int alignment_adjustment = 0;
 150         int oop_shift = 0;
 151         struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
 152         struct qat_sym_op_cookie *cookie =
 153                                 (struct qat_sym_op_cookie *)op_cookie;
 154
 155         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 156                 QAT_DP_LOG(ERR, "QAT PMD only supports symmetric crypto "
 157                                 "operation requests, op (%p) is not a "
 158                                 "symmetric operation.", op);
 159                 return -EINVAL;
 160         }
 161
 162         if (unlikely(op->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 163                 QAT_DP_LOG(ERR, "QAT PMD only supports session oriented"
 164                                 " requests, op (%p) is sessionless.", op);
 165                 return -EINVAL;
 166         } else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
 167                 ctx = (struct qat_sym_session *)get_sym_session_private_data(
 168                                 op->sym->session, qat_sym_driver_id);
 169 #ifdef RTE_LIB_SECURITY
 170         } else {
 171                 ctx = (struct qat_sym_session *)get_sec_session_private_data(
 172                                 op->sym->sec_session);
 173                 if (likely(ctx)) {
 174                         if (unlikely(ctx->bpi_ctx == NULL)) {
 175                                 QAT_DP_LOG(ERR, "QAT PMD only supports security"
 176                                                 " operation requests for"
 177                                                 " DOCSIS, op (%p) is not for"
 178                                                 " DOCSIS.", op);
 179                                 return -EINVAL;
 180                         } else if (unlikely(((op->sym->m_dst != NULL) &&
 181                                         (op->sym->m_dst != op->sym->m_src)) ||
 182                                         op->sym->m_src->nb_segs > 1)) {
 183                                 QAT_DP_LOG(ERR, "OOP and/or multi-segment"
 184                                                 " buffers not supported for"
 185                                                 " DOCSIS security.");
 186                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 187                                 return -EINVAL;
 188                         }
 189                 }
 190 #endif
 191         }
 192
 193         if (unlikely(ctx == NULL)) {
 194                 QAT_DP_LOG(ERR, "Session was not created for this device");
 195                 return -EINVAL;
 196         }
 197
 198         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 199         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
 200         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 201         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 202         cipher_param20 = (void *)&qat_req->serv_specif_rqpars;
 203         auth_param = (void *)((uint8_t *)cipher_param +
 204                         ICP_QAT_FW_HASH_REQUEST_PARAMETERS_OFFSET);
 205
 206         if ((ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
 207                         ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) &&
 208                         !ctx->is_gmac) {
 209                 /* AES-GCM or AES-CCM */
 210                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 211                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||
 212                         (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128
 213                         && ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE
 214                         && ctx->qat_hash_alg ==
 215                                         ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {
 216                         do_aead = 1;
 217                 } else {
 218                         do_auth = 1;
 219                         do_cipher = 1;
 220                 }
 221         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH || ctx->is_gmac) {
 222                 do_auth = 1;
 223                 do_cipher = 0;
 224         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
 225                 do_auth = 0;
 226                 do_cipher = 1;
 227         }
 228
 229         if (do_cipher) {
 230
 231                 if (ctx->qat_cipher_alg ==
 232                                          ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
 233                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI ||
 234                         ctx->qat_cipher_alg ==
 235                                 ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3) {
 236
 237                         if (unlikely(
 238                             (op->sym->cipher.data.length % BYTE_LENGTH != 0) ||
 239                             (op->sym->cipher.data.offset % BYTE_LENGTH != 0))) {
 240                                 QAT_DP_LOG(ERR,
 241                   "SNOW3G/KASUMI/ZUC in QAT PMD only supports byte aligned values");
 242                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 243                                 return -EINVAL;
 244                         }
 245                         cipher_len = op->sym->cipher.data.length >> 3;
 246                         cipher_ofs = op->sym->cipher.data.offset >> 3;
 247
 248                 } else if (ctx->bpi_ctx) {
 249                         /* DOCSIS - only send complete blocks to device.
 250                          * Process any partial block using CFB mode.
 251                          * Even if 0 complete blocks, still send this to device
 252                          * to get into rx queue for post-process and dequeuing
 253                          */
 254                         cipher_len = qat_bpicipher_preprocess(ctx, op);
 255                         cipher_ofs = op->sym->cipher.data.offset;
 256                 } else {
 257                         cipher_len = op->sym->cipher.data.length;
 258                         cipher_ofs = op->sym->cipher.data.offset;
 259                 }
 260
 261                 set_cipher_iv(ctx->cipher_iv.length, ctx->cipher_iv.offset,
 262                                 cipher_param, op, qat_req);
 263                 min_ofs = cipher_ofs;
 264         }
 265
 266         if (do_auth) {
 267
 268                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 ||
 269                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 ||
 270                         ctx->qat_hash_alg ==
 271                                 ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3) {
 272                         if (unlikely(
 273                             (op->sym->auth.data.offset % BYTE_LENGTH != 0) ||
 274                             (op->sym->auth.data.length % BYTE_LENGTH != 0))) {
 275                                 QAT_DP_LOG(ERR,
 276                 "For SNOW3G/KASUMI/ZUC, QAT PMD only supports byte aligned values");
 277                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 278                                 return -EINVAL;
 279                         }
 280                         auth_ofs = op->sym->auth.data.offset >> 3;
 281                         auth_len = op->sym->auth.data.length >> 3;
 282
 283                         auth_param->u1.aad_adr =
 284                                         rte_crypto_op_ctophys_offset(op,
 285                                                         ctx->auth_iv.offset);
 286
 287                 } else if (ctx->qat_hash_alg ==
 288                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 289                                 ctx->qat_hash_alg ==
 290                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 291                         /* AES-GMAC */
 292                         set_cipher_iv(ctx->auth_iv.length,
 293                                 ctx->auth_iv.offset,
 294                                 cipher_param, op, qat_req);
 295                         auth_ofs = op->sym->auth.data.offset;
 296                         auth_len = op->sym->auth.data.length;
 297
 298                         auth_param->u1.aad_adr = 0;
 299                         auth_param->u2.aad_sz = 0;
 300
 301                 } else {
 302                         auth_ofs = op->sym->auth.data.offset;
 303                         auth_len = op->sym->auth.data.length;
 304
 305                 }
 306                 min_ofs = auth_ofs;
 307
 308                 if (ctx->qat_hash_alg != ICP_QAT_HW_AUTH_ALGO_NULL ||
 309                                 ctx->auth_op == ICP_QAT_HW_AUTH_VERIFY)
 310                         auth_param->auth_res_addr =
 311                                         op->sym->auth.digest.phys_addr;
 312
 313         }
 314
 315         if (do_aead) {
 316                 /*
 317                  * This address may used for setting AAD physical pointer
 318                  * into IV offset from op
 319                  */
 320                 rte_iova_t aad_phys_addr_aead = op->sym->aead.aad.phys_addr;
 321                 if (ctx->qat_hash_alg ==
 322                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 323                                 ctx->qat_hash_alg ==
 324                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 325
 326                         set_cipher_iv(ctx->cipher_iv.length,
 327                                         ctx->cipher_iv.offset,
 328                                         cipher_param, op, qat_req);
 329
 330                 } else if (ctx->qat_hash_alg ==
 331                                 ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC) {
 332
 333                         /* In case of AES-CCM this may point to user selected
 334                          * memory or iv offset in crypto_op
 335                          */
 336                         uint8_t *aad_data = op->sym->aead.aad.data;
 337                         /* This is true AAD length, it not includes 18 bytes of
 338                          * preceding data
 339                          */
 340                         uint8_t aad_ccm_real_len = 0;
 341                         uint8_t aad_len_field_sz = 0;
 342                         uint32_t msg_len_be =
 343                                         rte_bswap32(op->sym->aead.data.length);
 344
 345                         if (ctx->aad_len > ICP_QAT_HW_CCM_AAD_DATA_OFFSET) {
 346                                 aad_len_field_sz = ICP_QAT_HW_CCM_AAD_LEN_INFO;
 347                                 aad_ccm_real_len = ctx->aad_len -
 348                                         ICP_QAT_HW_CCM_AAD_B0_LEN -
 349                                         ICP_QAT_HW_CCM_AAD_LEN_INFO;
 350                         } else {
 351                                 /*
 352                                  * aad_len not greater than 18, so no actual aad
 353                                  *  data, then use IV after op for B0 block
 354                                  */
 355                                 aad_data = rte_crypto_op_ctod_offset(op,
 356                                                 uint8_t *,
 357                                                 ctx->cipher_iv.offset);
 358                                 aad_phys_addr_aead =
 359                                                 rte_crypto_op_ctophys_offset(op,
 360                                                         ctx->cipher_iv.offset);
 361                         }
 362
 363                         uint8_t q = ICP_QAT_HW_CCM_NQ_CONST -
 364                                                         ctx->cipher_iv.length;
 365
 366                         aad_data[0] = ICP_QAT_HW_CCM_BUILD_B0_FLAGS(
 367                                                         aad_len_field_sz,
 368                                                         ctx->digest_length, q);
 369
 370                         if (q > ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE) {
 371                                 memcpy(aad_data + ctx->cipher_iv.length +
 372                                     ICP_QAT_HW_CCM_NONCE_OFFSET +
 373                                     (q - ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE),
 374                                     (uint8_t *)&msg_len_be,
 375                                     ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE);
 376                         } else {
 377                                 memcpy(aad_data + ctx->cipher_iv.length +
 378                                     ICP_QAT_HW_CCM_NONCE_OFFSET,
 379                                     (uint8_t *)&msg_len_be
 380                                     + (ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE
 381                                     - q), q);
 382                         }
 383
 384                         if (aad_len_field_sz > 0) {
 385                                 *(uint16_t *)&aad_data[ICP_QAT_HW_CCM_AAD_B0_LEN]
 386                                                 = rte_bswap16(aad_ccm_real_len);
 387
 388                                 if ((aad_ccm_real_len + aad_len_field_sz)
 389                                                 % ICP_QAT_HW_CCM_AAD_B0_LEN) {
 390                                         uint8_t pad_len = 0;
 391                                         uint8_t pad_idx = 0;
 392
 393                                         pad_len = ICP_QAT_HW_CCM_AAD_B0_LEN -
 394                                         ((aad_ccm_real_len + aad_len_field_sz) %
 395                                                 ICP_QAT_HW_CCM_AAD_B0_LEN);
 396                                         pad_idx = ICP_QAT_HW_CCM_AAD_B0_LEN +
 397                                             aad_ccm_real_len + aad_len_field_sz;
 398                                         memset(&aad_data[pad_idx],
 399                                                         0, pad_len);
 400                                 }
 401
 402                         }
 403
 404                         set_cipher_iv_ccm(ctx->cipher_iv.length,
 405                                         ctx->cipher_iv.offset,
 406                                         cipher_param, op, q,
 407                                         aad_len_field_sz);
 408
 409                 }
 410
 411                 cipher_len = op->sym->aead.data.length;
 412                 cipher_ofs = op->sym->aead.data.offset;
 413                 auth_len = op->sym->aead.data.length;
 414                 auth_ofs = op->sym->aead.data.offset;
 415
 416                 auth_param->u1.aad_adr = aad_phys_addr_aead;
 417                 auth_param->auth_res_addr = op->sym->aead.digest.phys_addr;
 418                 min_ofs = op->sym->aead.data.offset;
 419         }
 420
 421         if (op->sym->m_src->nb_segs > 1 ||
 422                         (op->sym->m_dst && op->sym->m_dst->nb_segs > 1))
 423                 do_sgl = 1;
 424
 425         /* adjust for chain case */
 426         if (do_cipher && do_auth)
 427                 min_ofs = cipher_ofs < auth_ofs ? cipher_ofs : auth_ofs;
 428
 429         if (unlikely(min_ofs >= rte_pktmbuf_data_len(op->sym->m_src) && do_sgl))
 430                 min_ofs = 0;
 431
 432         if (unlikely((op->sym->m_dst != NULL) &&
 433                         (op->sym->m_dst != op->sym->m_src))) {
 434                 /* Out-of-place operation (OOP)
 435                  * Don't align DMA start. DMA the minimum data-set
 436                  * so as not to overwrite data in dest buffer
 437                  */
 438                 in_place = 0;
 439                 src_buf_start =
 440                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 441                 dst_buf_start =
 442                         rte_pktmbuf_iova_offset(op->sym->m_dst, min_ofs);
 443                 oop_shift = min_ofs;
 444
 445         } else {
 446                 /* In-place operation
 447                  * Start DMA at nearest aligned address below min_ofs
 448                  */
 449                 src_buf_start =
 450                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs)
 451                                                 & QAT_64_BTYE_ALIGN_MASK;
 452
 453                 if (unlikely((rte_pktmbuf_iova(op->sym->m_src) -
 454                                         rte_pktmbuf_headroom(op->sym->m_src))
 455                                                         > src_buf_start)) {
 456                         /* alignment has pushed addr ahead of start of mbuf
 457                          * so revert and take the performance hit
 458                          */
 459                         src_buf_start =
 460                                 rte_pktmbuf_iova_offset(op->sym->m_src,
 461                                                                 min_ofs);
 462                 }
 463                 dst_buf_start = src_buf_start;
 464
 465                 /* remember any adjustment for later, note, can be +/- */
 466                 alignment_adjustment = src_buf_start -
 467                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 468         }
 469
 470         if (do_cipher || do_aead) {
 471                 cipher_param->cipher_offset =
 472                                 (uint32_t)rte_pktmbuf_iova_offset(
 473                                 op->sym->m_src, cipher_ofs) - src_buf_start;
 474                 cipher_param->cipher_length = cipher_len;
 475         } else {
 476                 cipher_param->cipher_offset = 0;
 477                 cipher_param->cipher_length = 0;
 478         }
 479
 480         if (!ctx->is_single_pass) {
 481                 /* Do not let to overwrite spc_aad len */
 482                 if (do_auth || do_aead) {
 483                         auth_param->auth_off =
 484                                 (uint32_t)rte_pktmbuf_iova_offset(
 485                                 op->sym->m_src, auth_ofs) - src_buf_start;
 486                         auth_param->auth_len = auth_len;
 487                 } else {
 488                         auth_param->auth_off = 0;
 489                         auth_param->auth_len = 0;
 490                 }
 491         }
 492
 493         qat_req->comn_mid.dst_length =
 494                 qat_req->comn_mid.src_length =
 495                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 496                 > (auth_param->auth_off + auth_param->auth_len) ?
 497                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 498                 : (auth_param->auth_off + auth_param->auth_len);
 499
 500         if (do_auth && do_cipher) {
 501                 /* Handle digest-encrypted cases, i.e.
 502                  * auth-gen-then-cipher-encrypt and
 503                  * cipher-decrypt-then-auth-verify
 504                  */
 505                  /* First find the end of the data */
 506                 if (do_sgl) {
 507                         uint32_t remaining_off = auth_param->auth_off +
 508                                 auth_param->auth_len + alignment_adjustment + oop_shift;
 509                         struct rte_mbuf *sgl_buf =
 510                                 (in_place ?
 511                                         op->sym->m_src : op->sym->m_dst);
 512
 513                         while (remaining_off >= rte_pktmbuf_data_len(sgl_buf)
 514                                         && sgl_buf->next != NULL) {
 515                                 remaining_off -= rte_pktmbuf_data_len(sgl_buf);
 516                                 sgl_buf = sgl_buf->next;
 517                         }
 518
 519                         auth_data_end = (uint64_t)rte_pktmbuf_iova_offset(
 520                                 sgl_buf, remaining_off);
 521                 } else {
 522                         auth_data_end = (in_place ?
 523                                 src_buf_start : dst_buf_start) +
 524                                 auth_param->auth_off + auth_param->auth_len;
 525                 }
 526                 /* Then check if digest-encrypted conditions are met */
 527                 if ((auth_param->auth_off + auth_param->auth_len <
 528                                         cipher_param->cipher_offset +
 529                                         cipher_param->cipher_length) &&
 530                                 (op->sym->auth.digest.phys_addr ==
 531                                         auth_data_end)) {
 532                         /* Handle partial digest encryption */
 533                         if (cipher_param->cipher_offset +
 534                                         cipher_param->cipher_length <
 535                                         auth_param->auth_off +
 536                                         auth_param->auth_len +
 537                                         ctx->digest_length)
 538                                 qat_req->comn_mid.dst_length =
 539                                         qat_req->comn_mid.src_length =
 540                                         auth_param->auth_off +
 541                                         auth_param->auth_len +
 542                                         ctx->digest_length;
 543                         struct icp_qat_fw_comn_req_hdr *header =
 544                                 &qat_req->comn_hdr;
 545                         ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 546                                 header->serv_specif_flags,
 547                                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER);
 548                 }
 549         }
 550
 551         if (do_sgl) {
 552
 553                 ICP_QAT_FW_COMN_PTR_TYPE_SET(qat_req->comn_hdr.comn_req_flags,
 554                                 QAT_COMN_PTR_TYPE_SGL);
 555                 ret = qat_sgl_fill_array(op->sym->m_src,
 556                    (int64_t)(src_buf_start - rte_pktmbuf_iova(op->sym->m_src)),
 557                    &cookie->qat_sgl_src,
 558                    qat_req->comn_mid.src_length,
 559                    QAT_SYM_SGL_MAX_NUMBER);
 560
 561                 if (unlikely(ret)) {
 562                         QAT_DP_LOG(ERR, "QAT PMD Cannot fill sgl array");
 563                         return ret;
 564                 }
 565
 566                 if (in_place)
 567                         qat_req->comn_mid.dest_data_addr =
 568                                 qat_req->comn_mid.src_data_addr =
 569                                 cookie->qat_sgl_src_phys_addr;
 570                 else {
 571                         ret = qat_sgl_fill_array(op->sym->m_dst,
 572                                 (int64_t)(dst_buf_start -
 573                                           rte_pktmbuf_iova(op->sym->m_dst)),
 574                                  &cookie->qat_sgl_dst,
 575                                  qat_req->comn_mid.dst_length,
 576                                  QAT_SYM_SGL_MAX_NUMBER);
 577
 578                         if (unlikely(ret)) {
 579                                 QAT_DP_LOG(ERR, "QAT PMD can't fill sgl array");
 580                                 return ret;
 581                         }
 582
 583                         qat_req->comn_mid.src_data_addr =
 584                                 cookie->qat_sgl_src_phys_addr;
 585                         qat_req->comn_mid.dest_data_addr =
 586                                         cookie->qat_sgl_dst_phys_addr;
 587                 }
 588                 qat_req->comn_mid.src_length = 0;
 589                 qat_req->comn_mid.dst_length = 0;
 590         } else {
 591                 qat_req->comn_mid.src_data_addr = src_buf_start;
 592                 qat_req->comn_mid.dest_data_addr = dst_buf_start;
 593         }
 594
 595         if (ctx->is_single_pass) {
 596                 if (ctx->is_ucs) {
 597                         /* GEN 4 */
 598                         cipher_param20->spc_aad_addr =
 599                                 op->sym->aead.aad.phys_addr;
 600                         cipher_param20->spc_auth_res_addr =
 601                                 op->sym->aead.digest.phys_addr;
 602                 } else {
 603                         cipher_param->spc_aad_addr =
 604                                 op->sym->aead.aad.phys_addr;
 605                         cipher_param->spc_auth_res_addr =
 606                                         op->sym->aead.digest.phys_addr;
 607                 }
 608         } else if (ctx->is_single_pass_gmac &&
 609                        op->sym->auth.data.length <= QAT_AES_GMAC_SPC_MAX_SIZE) {
 610                 /* Handle Single-Pass AES-GMAC */
 611                 handle_spc_gmac(ctx, op, cookie, qat_req);
 612         }
 613
 614 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
 615         QAT_DP_HEXDUMP_LOG(DEBUG, "qat_req:", qat_req,
 616                         sizeof(struct icp_qat_fw_la_bulk_req));
 617         QAT_DP_HEXDUMP_LOG(DEBUG, "src_data:",
 618                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 619                         rte_pktmbuf_data_len(op->sym->m_src));
 620         if (do_cipher) {
 621                 uint8_t *cipher_iv_ptr = rte_crypto_op_ctod_offset(op,
 622                                                 uint8_t *,
 623                                                 ctx->cipher_iv.offset);
 624                 QAT_DP_HEXDUMP_LOG(DEBUG, "cipher iv:", cipher_iv_ptr,
 625                                 ctx->cipher_iv.length);
 626         }
 627
 628         if (do_auth) {
 629                 if (ctx->auth_iv.length) {
 630                         uint8_t *auth_iv_ptr = rte_crypto_op_ctod_offset(op,
 631                                                         uint8_t *,
 632                                                         ctx->auth_iv.offset);
 633                         QAT_DP_HEXDUMP_LOG(DEBUG, "auth iv:", auth_iv_ptr,
 634                                                 ctx->auth_iv.length);
 635                 }
 636                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->auth.digest.data,
 637                                 ctx->digest_length);
 638         }
 639
 640         if (do_aead) {
 641                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->aead.digest.data,
 642                                 ctx->digest_length);
 643                 QAT_DP_HEXDUMP_LOG(DEBUG, "aad:", op->sym->aead.aad.data,
 644                                 ctx->aad_len);
 645         }
 646 #endif
 647         return 0;
 648 }