crypto/qat: fix null authentication request
[dpdk.git] / drivers / crypto / qat / qat_sym.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2015-2019 Intel Corporation
3  */
4
5 #include <openssl/evp.h>
6
7 #include <rte_mempool.h>
8 #include <rte_mbuf.h>
9 #include <rte_crypto_sym.h>
10 #include <rte_bus_pci.h>
11 #include <rte_byteorder.h>
12
13 #include "qat_sym.h"
14
15
16 /** Decrypt a single partial block
17  *  Depends on openssl libcrypto
18  *  Uses ECB+XOR to do CFB encryption, same result, more performant
19  */
20 static inline int
21 bpi_cipher_decrypt(uint8_t *src, uint8_t *dst,
22                 uint8_t *iv, int ivlen, int srclen,
23                 void *bpi_ctx)
24 {
25         EVP_CIPHER_CTX *ctx = (EVP_CIPHER_CTX *)bpi_ctx;
26         int encrypted_ivlen;
27         uint8_t encrypted_iv[BPI_MAX_ENCR_IV_LEN];
28         uint8_t *encr = encrypted_iv;
29
30         /* ECB method: encrypt (not decrypt!) the IV, then XOR with plaintext */
31         if (EVP_EncryptUpdate(ctx, encrypted_iv, &encrypted_ivlen, iv, ivlen)
32                                                                 <= 0)
33                 goto cipher_decrypt_err;
34
35         for (; srclen != 0; --srclen, ++dst, ++src, ++encr)
36                 *dst = *src ^ *encr;
37
38         return 0;
39
40 cipher_decrypt_err:
41         QAT_DP_LOG(ERR, "libcrypto ECB cipher decrypt for BPI IV failed");
42         return -EINVAL;
43 }
44
45
46 static inline uint32_t
47 qat_bpicipher_preprocess(struct qat_sym_session *ctx,
48                                 struct rte_crypto_op *op)
49 {
50         int block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
51         struct rte_crypto_sym_op *sym_op = op->sym;
52         uint8_t last_block_len = block_len > 0 ?
53                         sym_op->cipher.data.length % block_len : 0;
54
55         if (last_block_len &&
56                         ctx->qat_dir == ICP_QAT_HW_CIPHER_DECRYPT) {
57
58                 /* Decrypt last block */
59                 uint8_t *last_block, *dst, *iv;
60                 uint32_t last_block_offset = sym_op->cipher.data.offset +
61                                 sym_op->cipher.data.length - last_block_len;
62                 last_block = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_src,
63                                 uint8_t *, last_block_offset);
64
65                 if (unlikely((sym_op->m_dst != NULL)
66                                 && (sym_op->m_dst != sym_op->m_src)))
67                         /* out-of-place operation (OOP) */
68                         dst = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_dst,
69                                                 uint8_t *, last_block_offset);
70                 else
71                         dst = last_block;
72
73                 if (last_block_len < sym_op->cipher.data.length)
74                         /* use previous block ciphertext as IV */
75                         iv = last_block - block_len;
76                 else
77                         /* runt block, i.e. less than one full block */
78                         iv = rte_crypto_op_ctod_offset(op, uint8_t *,
79                                         ctx->cipher_iv.offset);
80
81 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
82                 QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: src before pre-process:",
83                         last_block, last_block_len);
84                 if (sym_op->m_dst != NULL)
85                         QAT_DP_HEXDUMP_LOG(DEBUG, "BPI:dst before pre-process:",
86                         dst, last_block_len);
87 #endif
88                 bpi_cipher_decrypt(last_block, dst, iv, block_len,
89                                 last_block_len, ctx->bpi_ctx);
90 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
91                 QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: src after pre-process:",
92                         last_block, last_block_len);
93                 if (sym_op->m_dst != NULL)
94                         QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: dst after pre-process:",
95                         dst, last_block_len);
96 #endif
97         }
98
99         return sym_op->cipher.data.length - last_block_len;
100 }
101
102 static inline void
103 set_cipher_iv(uint16_t iv_length, uint16_t iv_offset,
104                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
105                 struct rte_crypto_op *op,
106                 struct icp_qat_fw_la_bulk_req *qat_req)
107 {
108         /* copy IV into request if it fits */
109         if (iv_length <= sizeof(cipher_param->u.cipher_IV_array)) {
110                 rte_memcpy(cipher_param->u.cipher_IV_array,
111                                 rte_crypto_op_ctod_offset(op, uint8_t *,
112                                         iv_offset),
113                                 iv_length);
114         } else {
115                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
116                                 qat_req->comn_hdr.serv_specif_flags,
117                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
118                 cipher_param->u.s.cipher_IV_ptr =
119                                 rte_crypto_op_ctophys_offset(op,
120                                         iv_offset);
121         }
122 }
123
124 /** Set IV for CCM is special case, 0th byte is set to q-1
125  *  where q is padding of nonce in 16 byte block
126  */
127 static inline void
128 set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,
129                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
130                 struct rte_crypto_op *op, uint8_t q, uint8_t aad_len_field_sz)
131 {
132         rte_memcpy(((uint8_t *)cipher_param->u.cipher_IV_array) +
133                         ICP_QAT_HW_CCM_NONCE_OFFSET,
134                         rte_crypto_op_ctod_offset(op, uint8_t *,
135                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
136                         iv_length);
137         *(uint8_t *)&cipher_param->u.cipher_IV_array[0] =
138                         q - ICP_QAT_HW_CCM_NONCE_OFFSET;
139
140         if (aad_len_field_sz)
141                 rte_memcpy(&op->sym->aead.aad.data[ICP_QAT_HW_CCM_NONCE_OFFSET],
142                         rte_crypto_op_ctod_offset(op, uint8_t *,
143                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
144                         iv_length);
145 }
146
147 /** Handle Single-Pass AES-GMAC on QAT GEN3 */
148 static inline void
149 handle_spc_gmac(struct qat_sym_session *ctx, struct rte_crypto_op *op,
150                 struct qat_sym_op_cookie *cookie,
151                 struct icp_qat_fw_la_bulk_req *qat_req)
152 {
153         static const uint32_t ver_key_offset =
154                         sizeof(struct icp_qat_hw_auth_setup) +
155                         ICP_QAT_HW_GALOIS_128_STATE1_SZ +
156                         ICP_QAT_HW_GALOIS_H_SZ + ICP_QAT_HW_GALOIS_LEN_A_SZ +
157                         ICP_QAT_HW_GALOIS_E_CTR0_SZ +
158                         sizeof(struct icp_qat_hw_cipher_config);
159         struct icp_qat_fw_cipher_cd_ctrl_hdr *cipher_cd_ctrl =
160                         (void *) &qat_req->cd_ctrl;
161         struct icp_qat_fw_la_cipher_req_params *cipher_param =
162                         (void *) &qat_req->serv_specif_rqpars;
163         uint32_t data_length = op->sym->auth.data.length;
164
165         /* Fill separate Content Descriptor for this op */
166         rte_memcpy(cookie->opt.spc_gmac.cd_cipher.key,
167                         ctx->auth_op == ICP_QAT_HW_AUTH_GENERATE ?
168                                 ctx->cd.cipher.key :
169                                 RTE_PTR_ADD(&ctx->cd, ver_key_offset),
170                         ctx->auth_key_length);
171         cookie->opt.spc_gmac.cd_cipher.cipher_config.val =
172                         ICP_QAT_HW_CIPHER_CONFIG_BUILD(
173                                 ICP_QAT_HW_CIPHER_AEAD_MODE,
174                                 ctx->qat_cipher_alg,
175                                 ICP_QAT_HW_CIPHER_NO_CONVERT,
176                                 (ctx->auth_op == ICP_QAT_HW_AUTH_GENERATE ?
177                                         ICP_QAT_HW_CIPHER_ENCRYPT :
178                                         ICP_QAT_HW_CIPHER_DECRYPT));
179         QAT_FIELD_SET(cookie->opt.spc_gmac.cd_cipher.cipher_config.val,
180                         ctx->digest_length,
181                         QAT_CIPHER_AEAD_HASH_CMP_LEN_BITPOS,
182                         QAT_CIPHER_AEAD_HASH_CMP_LEN_MASK);
183         cookie->opt.spc_gmac.cd_cipher.cipher_config.reserved =
184                         ICP_QAT_HW_CIPHER_CONFIG_BUILD_UPPER(data_length);
185
186         /* Update the request */
187         qat_req->cd_pars.u.s.content_desc_addr =
188                         cookie->opt.spc_gmac.cd_phys_addr;
189         qat_req->cd_pars.u.s.content_desc_params_sz = RTE_ALIGN_CEIL(
190                         sizeof(struct icp_qat_hw_cipher_config) +
191                         ctx->auth_key_length, 8) >> 3;
192         qat_req->comn_mid.src_length = data_length;
193         qat_req->comn_mid.dst_length = 0;
194
195         cipher_param->spc_aad_addr = 0;
196         cipher_param->spc_auth_res_addr = op->sym->auth.digest.phys_addr;
197         cipher_param->spc_aad_sz = data_length;
198         cipher_param->reserved = 0;
199         cipher_param->spc_auth_res_sz = ctx->digest_length;
200
201         qat_req->comn_hdr.service_cmd_id = ICP_QAT_FW_LA_CMD_CIPHER;
202         cipher_cd_ctrl->cipher_cfg_offset = 0;
203         ICP_QAT_FW_COMN_CURR_ID_SET(cipher_cd_ctrl, ICP_QAT_FW_SLICE_CIPHER);
204         ICP_QAT_FW_COMN_NEXT_ID_SET(cipher_cd_ctrl, ICP_QAT_FW_SLICE_DRAM_WR);
205         ICP_QAT_FW_LA_SINGLE_PASS_PROTO_FLAG_SET(
206                         qat_req->comn_hdr.serv_specif_flags,
207                         ICP_QAT_FW_LA_SINGLE_PASS_PROTO);
208         ICP_QAT_FW_LA_PROTO_SET(
209                         qat_req->comn_hdr.serv_specif_flags,
210                         ICP_QAT_FW_LA_NO_PROTO);
211 }
212
213 int
214 qat_sym_build_request(void *in_op, uint8_t *out_msg,
215                 void *op_cookie, enum qat_device_gen qat_dev_gen)
216 {
217         int ret = 0;
218         struct qat_sym_session *ctx = NULL;
219         struct icp_qat_fw_la_cipher_req_params *cipher_param;
220         struct icp_qat_fw_la_auth_req_params *auth_param;
221         register struct icp_qat_fw_la_bulk_req *qat_req;
222         uint8_t do_auth = 0, do_cipher = 0, do_aead = 0;
223         uint32_t cipher_len = 0, cipher_ofs = 0;
224         uint32_t auth_len = 0, auth_ofs = 0;
225         uint32_t min_ofs = 0;
226         uint64_t src_buf_start = 0, dst_buf_start = 0;
227         uint64_t auth_data_end = 0;
228         uint8_t do_sgl = 0;
229         uint8_t in_place = 1;
230         int alignment_adjustment = 0;
231         int oop_shift = 0;
232         struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
233         struct qat_sym_op_cookie *cookie =
234                                 (struct qat_sym_op_cookie *)op_cookie;
235
236         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
237                 QAT_DP_LOG(ERR, "QAT PMD only supports symmetric crypto "
238                                 "operation requests, op (%p) is not a "
239                                 "symmetric operation.", op);
240                 return -EINVAL;
241         }
242
243         if (unlikely(op->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
244                 QAT_DP_LOG(ERR, "QAT PMD only supports session oriented"
245                                 " requests, op (%p) is sessionless.", op);
246                 return -EINVAL;
247         } else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
248                 ctx = (struct qat_sym_session *)get_sym_session_private_data(
249                                 op->sym->session, qat_sym_driver_id);
250 #ifdef RTE_LIB_SECURITY
251         } else {
252                 ctx = (struct qat_sym_session *)get_sec_session_private_data(
253                                 op->sym->sec_session);
254                 if (likely(ctx)) {
255                         if (unlikely(ctx->bpi_ctx == NULL)) {
256                                 QAT_DP_LOG(ERR, "QAT PMD only supports security"
257                                                 " operation requests for"
258                                                 " DOCSIS, op (%p) is not for"
259                                                 " DOCSIS.", op);
260                                 return -EINVAL;
261                         } else if (unlikely(((op->sym->m_dst != NULL) &&
262                                         (op->sym->m_dst != op->sym->m_src)) ||
263                                         op->sym->m_src->nb_segs > 1)) {
264                                 QAT_DP_LOG(ERR, "OOP and/or multi-segment"
265                                                 " buffers not supported for"
266                                                 " DOCSIS security.");
267                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
268                                 return -EINVAL;
269                         }
270                 }
271 #endif
272         }
273
274         if (unlikely(ctx == NULL)) {
275                 QAT_DP_LOG(ERR, "Session was not created for this device");
276                 return -EINVAL;
277         }
278
279         if (unlikely(ctx->min_qat_dev_gen > qat_dev_gen)) {
280                 QAT_DP_LOG(ERR, "Session alg not supported on this device gen");
281                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
282                 return -EINVAL;
283         }
284
285         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
286         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
287         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
288         cipher_param = (void *)&qat_req->serv_specif_rqpars;
289         auth_param = (void *)((uint8_t *)cipher_param +
290                         ICP_QAT_FW_HASH_REQUEST_PARAMETERS_OFFSET);
291
292         if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
293                         ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) {
294                 /* AES-GCM or AES-CCM */
295                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
296                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||
297                         (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128
298                         && ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE
299                         && ctx->qat_hash_alg ==
300                                         ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {
301                         do_aead = 1;
302                 } else {
303                         do_auth = 1;
304                         do_cipher = 1;
305                 }
306         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH) {
307                 do_auth = 1;
308                 do_cipher = 0;
309         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
310                 do_auth = 0;
311                 do_cipher = 1;
312         }
313
314         if (do_cipher) {
315
316                 if (ctx->qat_cipher_alg ==
317                                          ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
318                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI ||
319                         ctx->qat_cipher_alg ==
320                                 ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3) {
321
322                         if (unlikely(
323                             (op->sym->cipher.data.length % BYTE_LENGTH != 0) ||
324                             (op->sym->cipher.data.offset % BYTE_LENGTH != 0))) {
325                                 QAT_DP_LOG(ERR,
326                   "SNOW3G/KASUMI/ZUC in QAT PMD only supports byte aligned values");
327                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
328                                 return -EINVAL;
329                         }
330                         cipher_len = op->sym->cipher.data.length >> 3;
331                         cipher_ofs = op->sym->cipher.data.offset >> 3;
332
333                 } else if (ctx->bpi_ctx) {
334                         /* DOCSIS - only send complete blocks to device.
335                          * Process any partial block using CFB mode.
336                          * Even if 0 complete blocks, still send this to device
337                          * to get into rx queue for post-process and dequeuing
338                          */
339                         cipher_len = qat_bpicipher_preprocess(ctx, op);
340                         cipher_ofs = op->sym->cipher.data.offset;
341                 } else {
342                         cipher_len = op->sym->cipher.data.length;
343                         cipher_ofs = op->sym->cipher.data.offset;
344                 }
345
346                 set_cipher_iv(ctx->cipher_iv.length, ctx->cipher_iv.offset,
347                                 cipher_param, op, qat_req);
348                 min_ofs = cipher_ofs;
349         }
350
351         if (do_auth) {
352
353                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 ||
354                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 ||
355                         ctx->qat_hash_alg ==
356                                 ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3) {
357                         if (unlikely(
358                             (op->sym->auth.data.offset % BYTE_LENGTH != 0) ||
359                             (op->sym->auth.data.length % BYTE_LENGTH != 0))) {
360                                 QAT_DP_LOG(ERR,
361                 "For SNOW3G/KASUMI/ZUC, QAT PMD only supports byte aligned values");
362                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
363                                 return -EINVAL;
364                         }
365                         auth_ofs = op->sym->auth.data.offset >> 3;
366                         auth_len = op->sym->auth.data.length >> 3;
367
368                         auth_param->u1.aad_adr =
369                                         rte_crypto_op_ctophys_offset(op,
370                                                         ctx->auth_iv.offset);
371
372                 } else if (ctx->qat_hash_alg ==
373                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
374                                 ctx->qat_hash_alg ==
375                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
376                         /* AES-GMAC */
377                         set_cipher_iv(ctx->auth_iv.length,
378                                 ctx->auth_iv.offset,
379                                 cipher_param, op, qat_req);
380                         auth_ofs = op->sym->auth.data.offset;
381                         auth_len = op->sym->auth.data.length;
382
383                         auth_param->u1.aad_adr = 0;
384                         auth_param->u2.aad_sz = 0;
385
386                         /*
387                          * If len(iv)==12B fw computes J0
388                          */
389                         if (ctx->auth_iv.length == 12) {
390                                 ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
391                                         qat_req->comn_hdr.serv_specif_flags,
392                                         ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
393
394                         }
395                 } else {
396                         auth_ofs = op->sym->auth.data.offset;
397                         auth_len = op->sym->auth.data.length;
398
399                 }
400                 min_ofs = auth_ofs;
401
402                 if (ctx->qat_hash_alg != ICP_QAT_HW_AUTH_ALGO_NULL ||
403                                 ctx->auth_op == ICP_QAT_HW_AUTH_VERIFY)
404                         auth_param->auth_res_addr =
405                                         op->sym->auth.digest.phys_addr;
406
407         }
408
409         if (do_aead) {
410                 /*
411                  * This address may used for setting AAD physical pointer
412                  * into IV offset from op
413                  */
414                 rte_iova_t aad_phys_addr_aead = op->sym->aead.aad.phys_addr;
415                 if (ctx->qat_hash_alg ==
416                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
417                                 ctx->qat_hash_alg ==
418                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
419                         /*
420                          * If len(iv)==12B fw computes J0
421                          */
422                         if (ctx->cipher_iv.length == 12) {
423                                 ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
424                                         qat_req->comn_hdr.serv_specif_flags,
425                                         ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
426                         }
427                         set_cipher_iv(ctx->cipher_iv.length,
428                                         ctx->cipher_iv.offset,
429                                         cipher_param, op, qat_req);
430
431                 } else if (ctx->qat_hash_alg ==
432                                 ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC) {
433
434                         /* In case of AES-CCM this may point to user selected
435                          * memory or iv offset in cypto_op
436                          */
437                         uint8_t *aad_data = op->sym->aead.aad.data;
438                         /* This is true AAD length, it not includes 18 bytes of
439                          * preceding data
440                          */
441                         uint8_t aad_ccm_real_len = 0;
442                         uint8_t aad_len_field_sz = 0;
443                         uint32_t msg_len_be =
444                                         rte_bswap32(op->sym->aead.data.length);
445
446                         if (ctx->aad_len > ICP_QAT_HW_CCM_AAD_DATA_OFFSET) {
447                                 aad_len_field_sz = ICP_QAT_HW_CCM_AAD_LEN_INFO;
448                                 aad_ccm_real_len = ctx->aad_len -
449                                         ICP_QAT_HW_CCM_AAD_B0_LEN -
450                                         ICP_QAT_HW_CCM_AAD_LEN_INFO;
451                         } else {
452                                 /*
453                                  * aad_len not greater than 18, so no actual aad
454                                  *  data, then use IV after op for B0 block
455                                  */
456                                 aad_data = rte_crypto_op_ctod_offset(op,
457                                                 uint8_t *,
458                                                 ctx->cipher_iv.offset);
459                                 aad_phys_addr_aead =
460                                                 rte_crypto_op_ctophys_offset(op,
461                                                         ctx->cipher_iv.offset);
462                         }
463
464                         uint8_t q = ICP_QAT_HW_CCM_NQ_CONST -
465                                                         ctx->cipher_iv.length;
466
467                         aad_data[0] = ICP_QAT_HW_CCM_BUILD_B0_FLAGS(
468                                                         aad_len_field_sz,
469                                                         ctx->digest_length, q);
470
471                         if (q > ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE) {
472                                 memcpy(aad_data + ctx->cipher_iv.length +
473                                     ICP_QAT_HW_CCM_NONCE_OFFSET +
474                                     (q - ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE),
475                                     (uint8_t *)&msg_len_be,
476                                     ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE);
477                         } else {
478                                 memcpy(aad_data + ctx->cipher_iv.length +
479                                     ICP_QAT_HW_CCM_NONCE_OFFSET,
480                                     (uint8_t *)&msg_len_be
481                                     + (ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE
482                                     - q), q);
483                         }
484
485                         if (aad_len_field_sz > 0) {
486                                 *(uint16_t *)&aad_data[ICP_QAT_HW_CCM_AAD_B0_LEN]
487                                                 = rte_bswap16(aad_ccm_real_len);
488
489                                 if ((aad_ccm_real_len + aad_len_field_sz)
490                                                 % ICP_QAT_HW_CCM_AAD_B0_LEN) {
491                                         uint8_t pad_len = 0;
492                                         uint8_t pad_idx = 0;
493
494                                         pad_len = ICP_QAT_HW_CCM_AAD_B0_LEN -
495                                         ((aad_ccm_real_len + aad_len_field_sz) %
496                                                 ICP_QAT_HW_CCM_AAD_B0_LEN);
497                                         pad_idx = ICP_QAT_HW_CCM_AAD_B0_LEN +
498                                             aad_ccm_real_len + aad_len_field_sz;
499                                         memset(&aad_data[pad_idx],
500                                                         0, pad_len);
501                                 }
502
503                         }
504
505                         set_cipher_iv_ccm(ctx->cipher_iv.length,
506                                         ctx->cipher_iv.offset,
507                                         cipher_param, op, q,
508                                         aad_len_field_sz);
509
510                 }
511
512                 cipher_len = op->sym->aead.data.length;
513                 cipher_ofs = op->sym->aead.data.offset;
514                 auth_len = op->sym->aead.data.length;
515                 auth_ofs = op->sym->aead.data.offset;
516
517                 auth_param->u1.aad_adr = aad_phys_addr_aead;
518                 auth_param->auth_res_addr = op->sym->aead.digest.phys_addr;
519                 min_ofs = op->sym->aead.data.offset;
520         }
521
522         if (op->sym->m_src->nb_segs > 1 ||
523                         (op->sym->m_dst && op->sym->m_dst->nb_segs > 1))
524                 do_sgl = 1;
525
526         /* adjust for chain case */
527         if (do_cipher && do_auth)
528                 min_ofs = cipher_ofs < auth_ofs ? cipher_ofs : auth_ofs;
529
530         if (unlikely(min_ofs >= rte_pktmbuf_data_len(op->sym->m_src) && do_sgl))
531                 min_ofs = 0;
532
533         if (unlikely((op->sym->m_dst != NULL) &&
534                         (op->sym->m_dst != op->sym->m_src))) {
535                 /* Out-of-place operation (OOP)
536                  * Don't align DMA start. DMA the minimum data-set
537                  * so as not to overwrite data in dest buffer
538                  */
539                 in_place = 0;
540                 src_buf_start =
541                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
542                 dst_buf_start =
543                         rte_pktmbuf_iova_offset(op->sym->m_dst, min_ofs);
544                 oop_shift = min_ofs;
545
546         } else {
547                 /* In-place operation
548                  * Start DMA at nearest aligned address below min_ofs
549                  */
550                 src_buf_start =
551                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs)
552                                                 & QAT_64_BTYE_ALIGN_MASK;
553
554                 if (unlikely((rte_pktmbuf_iova(op->sym->m_src) -
555                                         rte_pktmbuf_headroom(op->sym->m_src))
556                                                         > src_buf_start)) {
557                         /* alignment has pushed addr ahead of start of mbuf
558                          * so revert and take the performance hit
559                          */
560                         src_buf_start =
561                                 rte_pktmbuf_iova_offset(op->sym->m_src,
562                                                                 min_ofs);
563                 }
564                 dst_buf_start = src_buf_start;
565
566                 /* remember any adjustment for later, note, can be +/- */
567                 alignment_adjustment = src_buf_start -
568                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
569         }
570
571         if (do_cipher || do_aead) {
572                 cipher_param->cipher_offset =
573                                 (uint32_t)rte_pktmbuf_iova_offset(
574                                 op->sym->m_src, cipher_ofs) - src_buf_start;
575                 cipher_param->cipher_length = cipher_len;
576         } else {
577                 cipher_param->cipher_offset = 0;
578                 cipher_param->cipher_length = 0;
579         }
580
581         if (do_auth || do_aead) {
582                 auth_param->auth_off = (uint32_t)rte_pktmbuf_iova_offset(
583                                 op->sym->m_src, auth_ofs) - src_buf_start;
584                 auth_param->auth_len = auth_len;
585         } else {
586                 auth_param->auth_off = 0;
587                 auth_param->auth_len = 0;
588         }
589
590         qat_req->comn_mid.dst_length =
591                 qat_req->comn_mid.src_length =
592                 (cipher_param->cipher_offset + cipher_param->cipher_length)
593                 > (auth_param->auth_off + auth_param->auth_len) ?
594                 (cipher_param->cipher_offset + cipher_param->cipher_length)
595                 : (auth_param->auth_off + auth_param->auth_len);
596
597         if (do_auth && do_cipher) {
598                 /* Handle digest-encrypted cases, i.e.
599                  * auth-gen-then-cipher-encrypt and
600                  * cipher-decrypt-then-auth-verify
601                  */
602                  /* First find the end of the data */
603                 if (do_sgl) {
604                         uint32_t remaining_off = auth_param->auth_off +
605                                 auth_param->auth_len + alignment_adjustment + oop_shift;
606                         struct rte_mbuf *sgl_buf =
607                                 (in_place ?
608                                         op->sym->m_src : op->sym->m_dst);
609
610                         while (remaining_off >= rte_pktmbuf_data_len(sgl_buf)
611                                         && sgl_buf->next != NULL) {
612                                 remaining_off -= rte_pktmbuf_data_len(sgl_buf);
613                                 sgl_buf = sgl_buf->next;
614                         }
615
616                         auth_data_end = (uint64_t)rte_pktmbuf_iova_offset(
617                                 sgl_buf, remaining_off);
618                 } else {
619                         auth_data_end = (in_place ?
620                                 src_buf_start : dst_buf_start) +
621                                 auth_param->auth_off + auth_param->auth_len;
622                 }
623                 /* Then check if digest-encrypted conditions are met */
624                 if ((auth_param->auth_off + auth_param->auth_len <
625                                         cipher_param->cipher_offset +
626                                         cipher_param->cipher_length) &&
627                                 (op->sym->auth.digest.phys_addr ==
628                                         auth_data_end)) {
629                         /* Handle partial digest encryption */
630                         if (cipher_param->cipher_offset +
631                                         cipher_param->cipher_length <
632                                         auth_param->auth_off +
633                                         auth_param->auth_len +
634                                         ctx->digest_length)
635                                 qat_req->comn_mid.dst_length =
636                                         qat_req->comn_mid.src_length =
637                                         auth_param->auth_off +
638                                         auth_param->auth_len +
639                                         ctx->digest_length;
640                         struct icp_qat_fw_comn_req_hdr *header =
641                                 &qat_req->comn_hdr;
642                         ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
643                                 header->serv_specif_flags,
644                                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER);
645                 }
646         }
647
648         if (do_sgl) {
649
650                 ICP_QAT_FW_COMN_PTR_TYPE_SET(qat_req->comn_hdr.comn_req_flags,
651                                 QAT_COMN_PTR_TYPE_SGL);
652                 ret = qat_sgl_fill_array(op->sym->m_src,
653                    (int64_t)(src_buf_start - rte_pktmbuf_iova(op->sym->m_src)),
654                    &cookie->qat_sgl_src,
655                    qat_req->comn_mid.src_length,
656                    QAT_SYM_SGL_MAX_NUMBER);
657
658                 if (unlikely(ret)) {
659                         QAT_DP_LOG(ERR, "QAT PMD Cannot fill sgl array");
660                         return ret;
661                 }
662
663                 if (in_place)
664                         qat_req->comn_mid.dest_data_addr =
665                                 qat_req->comn_mid.src_data_addr =
666                                 cookie->qat_sgl_src_phys_addr;
667                 else {
668                         ret = qat_sgl_fill_array(op->sym->m_dst,
669                                 (int64_t)(dst_buf_start -
670                                           rte_pktmbuf_iova(op->sym->m_dst)),
671                                  &cookie->qat_sgl_dst,
672                                  qat_req->comn_mid.dst_length,
673                                  QAT_SYM_SGL_MAX_NUMBER);
674
675                         if (unlikely(ret)) {
676                                 QAT_DP_LOG(ERR, "QAT PMD can't fill sgl array");
677                                 return ret;
678                         }
679
680                         qat_req->comn_mid.src_data_addr =
681                                 cookie->qat_sgl_src_phys_addr;
682                         qat_req->comn_mid.dest_data_addr =
683                                         cookie->qat_sgl_dst_phys_addr;
684                 }
685                 qat_req->comn_mid.src_length = 0;
686                 qat_req->comn_mid.dst_length = 0;
687         } else {
688                 qat_req->comn_mid.src_data_addr = src_buf_start;
689                 qat_req->comn_mid.dest_data_addr = dst_buf_start;
690         }
691
692         if (ctx->is_single_pass) {
693                 /* Handle Single-Pass GCM */
694                 cipher_param->spc_aad_addr = op->sym->aead.aad.phys_addr;
695                 cipher_param->spc_auth_res_addr =
696                                 op->sym->aead.digest.phys_addr;
697         } else if (ctx->is_single_pass_gmac &&
698                        op->sym->auth.data.length <= QAT_AES_GMAC_SPC_MAX_SIZE) {
699                 /* Handle Single-Pass AES-GMAC */
700                 handle_spc_gmac(ctx, op, cookie, qat_req);
701         }
702
703 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
704         QAT_DP_HEXDUMP_LOG(DEBUG, "qat_req:", qat_req,
705                         sizeof(struct icp_qat_fw_la_bulk_req));
706         QAT_DP_HEXDUMP_LOG(DEBUG, "src_data:",
707                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
708                         rte_pktmbuf_data_len(op->sym->m_src));
709         if (do_cipher) {
710                 uint8_t *cipher_iv_ptr = rte_crypto_op_ctod_offset(op,
711                                                 uint8_t *,
712                                                 ctx->cipher_iv.offset);
713                 QAT_DP_HEXDUMP_LOG(DEBUG, "cipher iv:", cipher_iv_ptr,
714                                 ctx->cipher_iv.length);
715         }
716
717         if (do_auth) {
718                 if (ctx->auth_iv.length) {
719                         uint8_t *auth_iv_ptr = rte_crypto_op_ctod_offset(op,
720                                                         uint8_t *,
721                                                         ctx->auth_iv.offset);
722                         QAT_DP_HEXDUMP_LOG(DEBUG, "auth iv:", auth_iv_ptr,
723                                                 ctx->auth_iv.length);
724                 }
725                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->auth.digest.data,
726                                 ctx->digest_length);
727         }
728
729         if (do_aead) {
730                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->aead.digest.data,
731                                 ctx->digest_length);
732                 QAT_DP_HEXDUMP_LOG(DEBUG, "aad:", op->sym->aead.aad.data,
733                                 ctx->aad_len);
734         }
735 #endif
736         return 0;
737 }