drivers/crypto/qat/qat_sym.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2015-2019 Intel Corporation
   3  */
   4
   5 #include <openssl/evp.h>
   6
   7 #include <rte_mempool.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_crypto_sym.h>
  10 #include <rte_bus_pci.h>
  11 #include <rte_byteorder.h>
  12
  13 #include "qat_sym.h"
  14
  15
  16 /** Decrypt a single partial block
  17  *  Depends on openssl libcrypto
  18  *  Uses ECB+XOR to do CFB encryption, same result, more performant
  19  */
  20 static inline int
  21 bpi_cipher_decrypt(uint8_t *src, uint8_t *dst,
  22                 uint8_t *iv, int ivlen, int srclen,
  23                 void *bpi_ctx)
  24 {
  25         EVP_CIPHER_CTX *ctx = (EVP_CIPHER_CTX *)bpi_ctx;
  26         int encrypted_ivlen;
  27         uint8_t encrypted_iv[BPI_MAX_ENCR_IV_LEN];
  28         uint8_t *encr = encrypted_iv;
  29
  30         /* ECB method: encrypt (not decrypt!) the IV, then XOR with plaintext */
  31         if (EVP_EncryptUpdate(ctx, encrypted_iv, &encrypted_ivlen, iv, ivlen)
  32                                                                 <= 0)
  33                 goto cipher_decrypt_err;
  34
  35         for (; srclen != 0; --srclen, ++dst, ++src, ++encr)
  36                 *dst = *src ^ *encr;
  37
  38         return 0;
  39
  40 cipher_decrypt_err:
  41         QAT_DP_LOG(ERR, "libcrypto ECB cipher decrypt for BPI IV failed");
  42         return -EINVAL;
  43 }
  44
  45
  46 static inline uint32_t
  47 qat_bpicipher_preprocess(struct qat_sym_session *ctx,
  48                                 struct rte_crypto_op *op)
  49 {
  50         int block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
  51         struct rte_crypto_sym_op *sym_op = op->sym;
  52         uint8_t last_block_len = block_len > 0 ?
  53                         sym_op->cipher.data.length % block_len : 0;
  54
  55         if (last_block_len &&
  56                         ctx->qat_dir == ICP_QAT_HW_CIPHER_DECRYPT) {
  57
  58                 /* Decrypt last block */
  59                 uint8_t *last_block, *dst, *iv;
  60                 uint32_t last_block_offset = sym_op->cipher.data.offset +
  61                                 sym_op->cipher.data.length - last_block_len;
  62                 last_block = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_src,
  63                                 uint8_t *, last_block_offset);
  64
  65                 if (unlikely((sym_op->m_dst != NULL)
  66                                 && (sym_op->m_dst != sym_op->m_src)))
  67                         /* out-of-place operation (OOP) */
  68                         dst = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_dst,
  69                                                 uint8_t *, last_block_offset);
  70                 else
  71                         dst = last_block;
  72
  73                 if (last_block_len < sym_op->cipher.data.length)
  74                         /* use previous block ciphertext as IV */
  75                         iv = last_block - block_len;
  76                 else
  77                         /* runt block, i.e. less than one full block */
  78                         iv = rte_crypto_op_ctod_offset(op, uint8_t *,
  79                                         ctx->cipher_iv.offset);
  80
  81 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
  82                 QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: src before pre-process:",
  83                         last_block, last_block_len);
  84                 if (sym_op->m_dst != NULL)
  85                         QAT_DP_HEXDUMP_LOG(DEBUG, "BPI:dst before pre-process:",
  86                         dst, last_block_len);
  87 #endif
  88                 bpi_cipher_decrypt(last_block, dst, iv, block_len,
  89                                 last_block_len, ctx->bpi_ctx);
  90 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
  91                 QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: src after pre-process:",
  92                         last_block, last_block_len);
  93                 if (sym_op->m_dst != NULL)
  94                         QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: dst after pre-process:",
  95                         dst, last_block_len);
  96 #endif
  97         }
  98
  99         return sym_op->cipher.data.length - last_block_len;
 100 }
 101
 102 static inline void
 103 set_cipher_iv(uint16_t iv_length, uint16_t iv_offset,
 104                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
 105                 struct rte_crypto_op *op,
 106                 struct icp_qat_fw_la_bulk_req *qat_req)
 107 {
 108         /* copy IV into request if it fits */
 109         if (iv_length <= sizeof(cipher_param->u.cipher_IV_array)) {
 110                 rte_memcpy(cipher_param->u.cipher_IV_array,
 111                                 rte_crypto_op_ctod_offset(op, uint8_t *,
 112                                         iv_offset),
 113                                 iv_length);
 114         } else {
 115                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 116                                 qat_req->comn_hdr.serv_specif_flags,
 117                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 118                 cipher_param->u.s.cipher_IV_ptr =
 119                                 rte_crypto_op_ctophys_offset(op,
 120                                         iv_offset);
 121         }
 122 }
 123
 124 /** Set IV for CCM is special case, 0th byte is set to q-1
 125  *  where q is padding of nonce in 16 byte block
 126  */
 127 static inline void
 128 set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,
 129                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
 130                 struct rte_crypto_op *op, uint8_t q, uint8_t aad_len_field_sz)
 131 {
 132         rte_memcpy(((uint8_t *)cipher_param->u.cipher_IV_array) +
 133                         ICP_QAT_HW_CCM_NONCE_OFFSET,
 134                         rte_crypto_op_ctod_offset(op, uint8_t *,
 135                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
 136                         iv_length);
 137         *(uint8_t *)&cipher_param->u.cipher_IV_array[0] =
 138                         q - ICP_QAT_HW_CCM_NONCE_OFFSET;
 139
 140         if (aad_len_field_sz)
 141                 rte_memcpy(&op->sym->aead.aad.data[ICP_QAT_HW_CCM_NONCE_OFFSET],
 142                         rte_crypto_op_ctod_offset(op, uint8_t *,
 143                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
 144                         iv_length);
 145 }
 146
 147 /** Handle Single-Pass AES-GMAC on QAT GEN3 */
 148 static inline void
 149 handle_spc_gmac(struct qat_sym_session *ctx, struct rte_crypto_op *op,
 150                 struct qat_sym_op_cookie *cookie,
 151                 struct icp_qat_fw_la_bulk_req *qat_req)
 152 {
 153         static const uint32_t ver_key_offset =
 154                         sizeof(struct icp_qat_hw_auth_setup) +
 155                         ICP_QAT_HW_GALOIS_128_STATE1_SZ +
 156                         ICP_QAT_HW_GALOIS_H_SZ + ICP_QAT_HW_GALOIS_LEN_A_SZ +
 157                         ICP_QAT_HW_GALOIS_E_CTR0_SZ +
 158                         sizeof(struct icp_qat_hw_cipher_config);
 159         struct icp_qat_fw_cipher_cd_ctrl_hdr *cipher_cd_ctrl =
 160                         (void *) &qat_req->cd_ctrl;
 161         struct icp_qat_fw_la_cipher_req_params *cipher_param =
 162                         (void *) &qat_req->serv_specif_rqpars;
 163         uint32_t data_length = op->sym->auth.data.length;
 164
 165         /* Fill separate Content Descriptor for this op */
 166         rte_memcpy(cookie->opt.spc_gmac.cd_cipher.key,
 167                         ctx->auth_op == ICP_QAT_HW_AUTH_GENERATE ?
 168                                 ctx->cd.cipher.key :
 169                                 RTE_PTR_ADD(&ctx->cd, ver_key_offset),
 170                         ctx->auth_key_length);
 171         cookie->opt.spc_gmac.cd_cipher.cipher_config.val =
 172                         ICP_QAT_HW_CIPHER_CONFIG_BUILD(
 173                                 ICP_QAT_HW_CIPHER_AEAD_MODE,
 174                                 ctx->qat_cipher_alg,
 175                                 ICP_QAT_HW_CIPHER_NO_CONVERT,
 176                                 (ctx->auth_op == ICP_QAT_HW_AUTH_GENERATE ?
 177                                         ICP_QAT_HW_CIPHER_ENCRYPT :
 178                                         ICP_QAT_HW_CIPHER_DECRYPT));
 179         QAT_FIELD_SET(cookie->opt.spc_gmac.cd_cipher.cipher_config.val,
 180                         ctx->digest_length,
 181                         QAT_CIPHER_AEAD_HASH_CMP_LEN_BITPOS,
 182                         QAT_CIPHER_AEAD_HASH_CMP_LEN_MASK);
 183         cookie->opt.spc_gmac.cd_cipher.cipher_config.reserved =
 184                         ICP_QAT_HW_CIPHER_CONFIG_BUILD_UPPER(data_length);
 185
 186         /* Update the request */
 187         qat_req->cd_pars.u.s.content_desc_addr =
 188                         cookie->opt.spc_gmac.cd_phys_addr;
 189         qat_req->cd_pars.u.s.content_desc_params_sz = RTE_ALIGN_CEIL(
 190                         sizeof(struct icp_qat_hw_cipher_config) +
 191                         ctx->auth_key_length, 8) >> 3;
 192         qat_req->comn_mid.src_length = data_length;
 193         qat_req->comn_mid.dst_length = 0;
 194
 195         cipher_param->spc_aad_addr = 0;
 196         cipher_param->spc_auth_res_addr = op->sym->auth.digest.phys_addr;
 197         cipher_param->spc_aad_sz = data_length;
 198         cipher_param->reserved = 0;
 199         cipher_param->spc_auth_res_sz = ctx->digest_length;
 200
 201         qat_req->comn_hdr.service_cmd_id = ICP_QAT_FW_LA_CMD_CIPHER;
 202         cipher_cd_ctrl->cipher_cfg_offset = 0;
 203         ICP_QAT_FW_COMN_CURR_ID_SET(cipher_cd_ctrl, ICP_QAT_FW_SLICE_CIPHER);
 204         ICP_QAT_FW_COMN_NEXT_ID_SET(cipher_cd_ctrl, ICP_QAT_FW_SLICE_DRAM_WR);
 205         ICP_QAT_FW_LA_SINGLE_PASS_PROTO_FLAG_SET(
 206                         qat_req->comn_hdr.serv_specif_flags,
 207                         ICP_QAT_FW_LA_SINGLE_PASS_PROTO);
 208         ICP_QAT_FW_LA_PROTO_SET(
 209                         qat_req->comn_hdr.serv_specif_flags,
 210                         ICP_QAT_FW_LA_NO_PROTO);
 211 }
 212
 213 int
 214 qat_sym_build_request(void *in_op, uint8_t *out_msg,
 215                 void *op_cookie, enum qat_device_gen qat_dev_gen)
 216 {
 217         int ret = 0;
 218         struct qat_sym_session *ctx = NULL;
 219         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 220         struct icp_qat_fw_la_auth_req_params *auth_param;
 221         register struct icp_qat_fw_la_bulk_req *qat_req;
 222         uint8_t do_auth = 0, do_cipher = 0, do_aead = 0;
 223         uint32_t cipher_len = 0, cipher_ofs = 0;
 224         uint32_t auth_len = 0, auth_ofs = 0;
 225         uint32_t min_ofs = 0;
 226         uint64_t src_buf_start = 0, dst_buf_start = 0;
 227         uint64_t auth_data_end = 0;
 228         uint8_t do_sgl = 0;
 229         uint8_t in_place = 1;
 230         int alignment_adjustment = 0;
 231         int oop_shift = 0;
 232         struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
 233         struct qat_sym_op_cookie *cookie =
 234                                 (struct qat_sym_op_cookie *)op_cookie;
 235
 236         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 237                 QAT_DP_LOG(ERR, "QAT PMD only supports symmetric crypto "
 238                                 "operation requests, op (%p) is not a "
 239                                 "symmetric operation.", op);
 240                 return -EINVAL;
 241         }
 242
 243         if (unlikely(op->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 244                 QAT_DP_LOG(ERR, "QAT PMD only supports session oriented"
 245                                 " requests, op (%p) is sessionless.", op);
 246                 return -EINVAL;
 247         } else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
 248                 ctx = (struct qat_sym_session *)get_sym_session_private_data(
 249                                 op->sym->session, qat_sym_driver_id);
 250 #ifdef RTE_LIB_SECURITY
 251         } else {
 252                 ctx = (struct qat_sym_session *)get_sec_session_private_data(
 253                                 op->sym->sec_session);
 254                 if (likely(ctx)) {
 255                         if (unlikely(ctx->bpi_ctx == NULL)) {
 256                                 QAT_DP_LOG(ERR, "QAT PMD only supports security"
 257                                                 " operation requests for"
 258                                                 " DOCSIS, op (%p) is not for"
 259                                                 " DOCSIS.", op);
 260                                 return -EINVAL;
 261                         } else if (unlikely(((op->sym->m_dst != NULL) &&
 262                                         (op->sym->m_dst != op->sym->m_src)) ||
 263                                         op->sym->m_src->nb_segs > 1)) {
 264                                 QAT_DP_LOG(ERR, "OOP and/or multi-segment"
 265                                                 " buffers not supported for"
 266                                                 " DOCSIS security.");
 267                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 268                                 return -EINVAL;
 269                         }
 270                 }
 271 #endif
 272         }
 273
 274         if (unlikely(ctx == NULL)) {
 275                 QAT_DP_LOG(ERR, "Session was not created for this device");
 276                 return -EINVAL;
 277         }
 278
 279         if (unlikely(ctx->min_qat_dev_gen > qat_dev_gen)) {
 280                 QAT_DP_LOG(ERR, "Session alg not supported on this device gen");
 281                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
 282                 return -EINVAL;
 283         }
 284
 285         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 286         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
 287         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 288         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 289         auth_param = (void *)((uint8_t *)cipher_param +
 290                         ICP_QAT_FW_HASH_REQUEST_PARAMETERS_OFFSET);
 291
 292         if ((ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
 293                         ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) &&
 294                         !ctx->is_gmac) {
 295                 /* AES-GCM or AES-CCM */
 296                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 297                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||
 298                         (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128
 299                         && ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE
 300                         && ctx->qat_hash_alg ==
 301                                         ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {
 302                         do_aead = 1;
 303                 } else {
 304                         do_auth = 1;
 305                         do_cipher = 1;
 306                 }
 307         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH || ctx->is_gmac) {
 308                 do_auth = 1;
 309                 do_cipher = 0;
 310         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
 311                 do_auth = 0;
 312                 do_cipher = 1;
 313         }
 314
 315         if (do_cipher) {
 316
 317                 if (ctx->qat_cipher_alg ==
 318                                          ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
 319                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI ||
 320                         ctx->qat_cipher_alg ==
 321                                 ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3) {
 322
 323                         if (unlikely(
 324                             (op->sym->cipher.data.length % BYTE_LENGTH != 0) ||
 325                             (op->sym->cipher.data.offset % BYTE_LENGTH != 0))) {
 326                                 QAT_DP_LOG(ERR,
 327                   "SNOW3G/KASUMI/ZUC in QAT PMD only supports byte aligned values");
 328                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 329                                 return -EINVAL;
 330                         }
 331                         cipher_len = op->sym->cipher.data.length >> 3;
 332                         cipher_ofs = op->sym->cipher.data.offset >> 3;
 333
 334                 } else if (ctx->bpi_ctx) {
 335                         /* DOCSIS - only send complete blocks to device.
 336                          * Process any partial block using CFB mode.
 337                          * Even if 0 complete blocks, still send this to device
 338                          * to get into rx queue for post-process and dequeuing
 339                          */
 340                         cipher_len = qat_bpicipher_preprocess(ctx, op);
 341                         cipher_ofs = op->sym->cipher.data.offset;
 342                 } else {
 343                         cipher_len = op->sym->cipher.data.length;
 344                         cipher_ofs = op->sym->cipher.data.offset;
 345                 }
 346
 347                 set_cipher_iv(ctx->cipher_iv.length, ctx->cipher_iv.offset,
 348                                 cipher_param, op, qat_req);
 349                 min_ofs = cipher_ofs;
 350         }
 351
 352         if (do_auth) {
 353
 354                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 ||
 355                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 ||
 356                         ctx->qat_hash_alg ==
 357                                 ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3) {
 358                         if (unlikely(
 359                             (op->sym->auth.data.offset % BYTE_LENGTH != 0) ||
 360                             (op->sym->auth.data.length % BYTE_LENGTH != 0))) {
 361                                 QAT_DP_LOG(ERR,
 362                 "For SNOW3G/KASUMI/ZUC, QAT PMD only supports byte aligned values");
 363                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 364                                 return -EINVAL;
 365                         }
 366                         auth_ofs = op->sym->auth.data.offset >> 3;
 367                         auth_len = op->sym->auth.data.length >> 3;
 368
 369                         auth_param->u1.aad_adr =
 370                                         rte_crypto_op_ctophys_offset(op,
 371                                                         ctx->auth_iv.offset);
 372
 373                 } else if (ctx->qat_hash_alg ==
 374                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 375                                 ctx->qat_hash_alg ==
 376                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 377                         /* AES-GMAC */
 378                         set_cipher_iv(ctx->auth_iv.length,
 379                                 ctx->auth_iv.offset,
 380                                 cipher_param, op, qat_req);
 381                         auth_ofs = op->sym->auth.data.offset;
 382                         auth_len = op->sym->auth.data.length;
 383
 384                         auth_param->u1.aad_adr = 0;
 385                         auth_param->u2.aad_sz = 0;
 386
 387                 } else {
 388                         auth_ofs = op->sym->auth.data.offset;
 389                         auth_len = op->sym->auth.data.length;
 390
 391                 }
 392                 min_ofs = auth_ofs;
 393
 394                 if (ctx->qat_hash_alg != ICP_QAT_HW_AUTH_ALGO_NULL ||
 395                                 ctx->auth_op == ICP_QAT_HW_AUTH_VERIFY)
 396                         auth_param->auth_res_addr =
 397                                         op->sym->auth.digest.phys_addr;
 398
 399         }
 400
 401         if (do_aead) {
 402                 /*
 403                  * This address may used for setting AAD physical pointer
 404                  * into IV offset from op
 405                  */
 406                 rte_iova_t aad_phys_addr_aead = op->sym->aead.aad.phys_addr;
 407                 if (ctx->qat_hash_alg ==
 408                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 409                                 ctx->qat_hash_alg ==
 410                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 411
 412                         set_cipher_iv(ctx->cipher_iv.length,
 413                                         ctx->cipher_iv.offset,
 414                                         cipher_param, op, qat_req);
 415
 416                 } else if (ctx->qat_hash_alg ==
 417                                 ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC) {
 418
 419                         /* In case of AES-CCM this may point to user selected
 420                          * memory or iv offset in cypto_op
 421                          */
 422                         uint8_t *aad_data = op->sym->aead.aad.data;
 423                         /* This is true AAD length, it not includes 18 bytes of
 424                          * preceding data
 425                          */
 426                         uint8_t aad_ccm_real_len = 0;
 427                         uint8_t aad_len_field_sz = 0;
 428                         uint32_t msg_len_be =
 429                                         rte_bswap32(op->sym->aead.data.length);
 430
 431                         if (ctx->aad_len > ICP_QAT_HW_CCM_AAD_DATA_OFFSET) {
 432                                 aad_len_field_sz = ICP_QAT_HW_CCM_AAD_LEN_INFO;
 433                                 aad_ccm_real_len = ctx->aad_len -
 434                                         ICP_QAT_HW_CCM_AAD_B0_LEN -
 435                                         ICP_QAT_HW_CCM_AAD_LEN_INFO;
 436                         } else {
 437                                 /*
 438                                  * aad_len not greater than 18, so no actual aad
 439                                  *  data, then use IV after op for B0 block
 440                                  */
 441                                 aad_data = rte_crypto_op_ctod_offset(op,
 442                                                 uint8_t *,
 443                                                 ctx->cipher_iv.offset);
 444                                 aad_phys_addr_aead =
 445                                                 rte_crypto_op_ctophys_offset(op,
 446                                                         ctx->cipher_iv.offset);
 447                         }
 448
 449                         uint8_t q = ICP_QAT_HW_CCM_NQ_CONST -
 450                                                         ctx->cipher_iv.length;
 451
 452                         aad_data[0] = ICP_QAT_HW_CCM_BUILD_B0_FLAGS(
 453                                                         aad_len_field_sz,
 454                                                         ctx->digest_length, q);
 455
 456                         if (q > ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE) {
 457                                 memcpy(aad_data + ctx->cipher_iv.length +
 458                                     ICP_QAT_HW_CCM_NONCE_OFFSET +
 459                                     (q - ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE),
 460                                     (uint8_t *)&msg_len_be,
 461                                     ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE);
 462                         } else {
 463                                 memcpy(aad_data + ctx->cipher_iv.length +
 464                                     ICP_QAT_HW_CCM_NONCE_OFFSET,
 465                                     (uint8_t *)&msg_len_be
 466                                     + (ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE
 467                                     - q), q);
 468                         }
 469
 470                         if (aad_len_field_sz > 0) {
 471                                 *(uint16_t *)&aad_data[ICP_QAT_HW_CCM_AAD_B0_LEN]
 472                                                 = rte_bswap16(aad_ccm_real_len);
 473
 474                                 if ((aad_ccm_real_len + aad_len_field_sz)
 475                                                 % ICP_QAT_HW_CCM_AAD_B0_LEN) {
 476                                         uint8_t pad_len = 0;
 477                                         uint8_t pad_idx = 0;
 478
 479                                         pad_len = ICP_QAT_HW_CCM_AAD_B0_LEN -
 480                                         ((aad_ccm_real_len + aad_len_field_sz) %
 481                                                 ICP_QAT_HW_CCM_AAD_B0_LEN);
 482                                         pad_idx = ICP_QAT_HW_CCM_AAD_B0_LEN +
 483                                             aad_ccm_real_len + aad_len_field_sz;
 484                                         memset(&aad_data[pad_idx],
 485                                                         0, pad_len);
 486                                 }
 487
 488                         }
 489
 490                         set_cipher_iv_ccm(ctx->cipher_iv.length,
 491                                         ctx->cipher_iv.offset,
 492                                         cipher_param, op, q,
 493                                         aad_len_field_sz);
 494
 495                 }
 496
 497                 cipher_len = op->sym->aead.data.length;
 498                 cipher_ofs = op->sym->aead.data.offset;
 499                 auth_len = op->sym->aead.data.length;
 500                 auth_ofs = op->sym->aead.data.offset;
 501
 502                 auth_param->u1.aad_adr = aad_phys_addr_aead;
 503                 auth_param->auth_res_addr = op->sym->aead.digest.phys_addr;
 504                 min_ofs = op->sym->aead.data.offset;
 505         }
 506
 507         if (op->sym->m_src->nb_segs > 1 ||
 508                         (op->sym->m_dst && op->sym->m_dst->nb_segs > 1))
 509                 do_sgl = 1;
 510
 511         /* adjust for chain case */
 512         if (do_cipher && do_auth)
 513                 min_ofs = cipher_ofs < auth_ofs ? cipher_ofs : auth_ofs;
 514
 515         if (unlikely(min_ofs >= rte_pktmbuf_data_len(op->sym->m_src) && do_sgl))
 516                 min_ofs = 0;
 517
 518         if (unlikely((op->sym->m_dst != NULL) &&
 519                         (op->sym->m_dst != op->sym->m_src))) {
 520                 /* Out-of-place operation (OOP)
 521                  * Don't align DMA start. DMA the minimum data-set
 522                  * so as not to overwrite data in dest buffer
 523                  */
 524                 in_place = 0;
 525                 src_buf_start =
 526                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 527                 dst_buf_start =
 528                         rte_pktmbuf_iova_offset(op->sym->m_dst, min_ofs);
 529                 oop_shift = min_ofs;
 530
 531         } else {
 532                 /* In-place operation
 533                  * Start DMA at nearest aligned address below min_ofs
 534                  */
 535                 src_buf_start =
 536                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs)
 537                                                 & QAT_64_BTYE_ALIGN_MASK;
 538
 539                 if (unlikely((rte_pktmbuf_iova(op->sym->m_src) -
 540                                         rte_pktmbuf_headroom(op->sym->m_src))
 541                                                         > src_buf_start)) {
 542                         /* alignment has pushed addr ahead of start of mbuf
 543                          * so revert and take the performance hit
 544                          */
 545                         src_buf_start =
 546                                 rte_pktmbuf_iova_offset(op->sym->m_src,
 547                                                                 min_ofs);
 548                 }
 549                 dst_buf_start = src_buf_start;
 550
 551                 /* remember any adjustment for later, note, can be +/- */
 552                 alignment_adjustment = src_buf_start -
 553                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 554         }
 555
 556         if (do_cipher || do_aead) {
 557                 cipher_param->cipher_offset =
 558                                 (uint32_t)rte_pktmbuf_iova_offset(
 559                                 op->sym->m_src, cipher_ofs) - src_buf_start;
 560                 cipher_param->cipher_length = cipher_len;
 561         } else {
 562                 cipher_param->cipher_offset = 0;
 563                 cipher_param->cipher_length = 0;
 564         }
 565
 566         if (do_auth || do_aead) {
 567                 auth_param->auth_off = (uint32_t)rte_pktmbuf_iova_offset(
 568                                 op->sym->m_src, auth_ofs) - src_buf_start;
 569                 auth_param->auth_len = auth_len;
 570         } else {
 571                 auth_param->auth_off = 0;
 572                 auth_param->auth_len = 0;
 573         }
 574
 575         qat_req->comn_mid.dst_length =
 576                 qat_req->comn_mid.src_length =
 577                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 578                 > (auth_param->auth_off + auth_param->auth_len) ?
 579                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 580                 : (auth_param->auth_off + auth_param->auth_len);
 581
 582         if (do_auth && do_cipher) {
 583                 /* Handle digest-encrypted cases, i.e.
 584                  * auth-gen-then-cipher-encrypt and
 585                  * cipher-decrypt-then-auth-verify
 586                  */
 587                  /* First find the end of the data */
 588                 if (do_sgl) {
 589                         uint32_t remaining_off = auth_param->auth_off +
 590                                 auth_param->auth_len + alignment_adjustment + oop_shift;
 591                         struct rte_mbuf *sgl_buf =
 592                                 (in_place ?
 593                                         op->sym->m_src : op->sym->m_dst);
 594
 595                         while (remaining_off >= rte_pktmbuf_data_len(sgl_buf)
 596                                         && sgl_buf->next != NULL) {
 597                                 remaining_off -= rte_pktmbuf_data_len(sgl_buf);
 598                                 sgl_buf = sgl_buf->next;
 599                         }
 600
 601                         auth_data_end = (uint64_t)rte_pktmbuf_iova_offset(
 602                                 sgl_buf, remaining_off);
 603                 } else {
 604                         auth_data_end = (in_place ?
 605                                 src_buf_start : dst_buf_start) +
 606                                 auth_param->auth_off + auth_param->auth_len;
 607                 }
 608                 /* Then check if digest-encrypted conditions are met */
 609                 if ((auth_param->auth_off + auth_param->auth_len <
 610                                         cipher_param->cipher_offset +
 611                                         cipher_param->cipher_length) &&
 612                                 (op->sym->auth.digest.phys_addr ==
 613                                         auth_data_end)) {
 614                         /* Handle partial digest encryption */
 615                         if (cipher_param->cipher_offset +
 616                                         cipher_param->cipher_length <
 617                                         auth_param->auth_off +
 618                                         auth_param->auth_len +
 619                                         ctx->digest_length)
 620                                 qat_req->comn_mid.dst_length =
 621                                         qat_req->comn_mid.src_length =
 622                                         auth_param->auth_off +
 623                                         auth_param->auth_len +
 624                                         ctx->digest_length;
 625                         struct icp_qat_fw_comn_req_hdr *header =
 626                                 &qat_req->comn_hdr;
 627                         ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 628                                 header->serv_specif_flags,
 629                                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER);
 630                 }
 631         }
 632
 633         if (do_sgl) {
 634
 635                 ICP_QAT_FW_COMN_PTR_TYPE_SET(qat_req->comn_hdr.comn_req_flags,
 636                                 QAT_COMN_PTR_TYPE_SGL);
 637                 ret = qat_sgl_fill_array(op->sym->m_src,
 638                    (int64_t)(src_buf_start - rte_pktmbuf_iova(op->sym->m_src)),
 639                    &cookie->qat_sgl_src,
 640                    qat_req->comn_mid.src_length,
 641                    QAT_SYM_SGL_MAX_NUMBER);
 642
 643                 if (unlikely(ret)) {
 644                         QAT_DP_LOG(ERR, "QAT PMD Cannot fill sgl array");
 645                         return ret;
 646                 }
 647
 648                 if (in_place)
 649                         qat_req->comn_mid.dest_data_addr =
 650                                 qat_req->comn_mid.src_data_addr =
 651                                 cookie->qat_sgl_src_phys_addr;
 652                 else {
 653                         ret = qat_sgl_fill_array(op->sym->m_dst,
 654                                 (int64_t)(dst_buf_start -
 655                                           rte_pktmbuf_iova(op->sym->m_dst)),
 656                                  &cookie->qat_sgl_dst,
 657                                  qat_req->comn_mid.dst_length,
 658                                  QAT_SYM_SGL_MAX_NUMBER);
 659
 660                         if (unlikely(ret)) {
 661                                 QAT_DP_LOG(ERR, "QAT PMD can't fill sgl array");
 662                                 return ret;
 663                         }
 664
 665                         qat_req->comn_mid.src_data_addr =
 666                                 cookie->qat_sgl_src_phys_addr;
 667                         qat_req->comn_mid.dest_data_addr =
 668                                         cookie->qat_sgl_dst_phys_addr;
 669                 }
 670                 qat_req->comn_mid.src_length = 0;
 671                 qat_req->comn_mid.dst_length = 0;
 672         } else {
 673                 qat_req->comn_mid.src_data_addr = src_buf_start;
 674                 qat_req->comn_mid.dest_data_addr = dst_buf_start;
 675         }
 676
 677         if (ctx->is_single_pass) {
 678                 /* Handle Single-Pass GCM */
 679                 cipher_param->spc_aad_addr = op->sym->aead.aad.phys_addr;
 680                 cipher_param->spc_auth_res_addr =
 681                                 op->sym->aead.digest.phys_addr;
 682         } else if (ctx->is_single_pass_gmac &&
 683                        op->sym->auth.data.length <= QAT_AES_GMAC_SPC_MAX_SIZE) {
 684                 /* Handle Single-Pass AES-GMAC */
 685                 handle_spc_gmac(ctx, op, cookie, qat_req);
 686         }
 687
 688 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
 689         QAT_DP_HEXDUMP_LOG(DEBUG, "qat_req:", qat_req,
 690                         sizeof(struct icp_qat_fw_la_bulk_req));
 691         QAT_DP_HEXDUMP_LOG(DEBUG, "src_data:",
 692                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 693                         rte_pktmbuf_data_len(op->sym->m_src));
 694         if (do_cipher) {
 695                 uint8_t *cipher_iv_ptr = rte_crypto_op_ctod_offset(op,
 696                                                 uint8_t *,
 697                                                 ctx->cipher_iv.offset);
 698                 QAT_DP_HEXDUMP_LOG(DEBUG, "cipher iv:", cipher_iv_ptr,
 699                                 ctx->cipher_iv.length);
 700         }
 701
 702         if (do_auth) {
 703                 if (ctx->auth_iv.length) {
 704                         uint8_t *auth_iv_ptr = rte_crypto_op_ctod_offset(op,
 705                                                         uint8_t *,
 706                                                         ctx->auth_iv.offset);
 707                         QAT_DP_HEXDUMP_LOG(DEBUG, "auth iv:", auth_iv_ptr,
 708                                                 ctx->auth_iv.length);
 709                 }
 710                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->auth.digest.data,
 711                                 ctx->digest_length);
 712         }
 713
 714         if (do_aead) {
 715                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->aead.digest.data,
 716                                 ctx->digest_length);
 717                 QAT_DP_HEXDUMP_LOG(DEBUG, "aad:", op->sym->aead.aad.data,
 718                                 ctx->aad_len);
 719         }
 720 #endif
 721         return 0;
 722 }