drivers/crypto/qat/qat_sym.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2015-2022 Intel Corporation
   3  */
   4
   5 #include <openssl/evp.h>
   6
   7 #include <rte_mempool.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_crypto_sym.h>
  10 #include <rte_bus_pci.h>
  11 #include <rte_byteorder.h>
  12
  13 #include "qat_sym.h"
  14 #include "dev/qat_crypto_pmd_gens.h"
  15
  16 uint8_t qat_sym_driver_id;
  17
  18 struct qat_crypto_gen_dev_ops qat_sym_gen_dev_ops[QAT_N_GENS];
  19
  20 void
  21 qat_sym_init_op_cookie(void *op_cookie)
  22 {
  23         struct qat_sym_op_cookie *cookie = op_cookie;
  24
  25         cookie->qat_sgl_src_phys_addr =
  26                         rte_mempool_virt2iova(cookie) +
  27                         offsetof(struct qat_sym_op_cookie,
  28                         qat_sgl_src);
  29
  30         cookie->qat_sgl_dst_phys_addr =
  31                         rte_mempool_virt2iova(cookie) +
  32                         offsetof(struct qat_sym_op_cookie,
  33                         qat_sgl_dst);
  34
  35         cookie->opt.spc_gmac.cd_phys_addr =
  36                         rte_mempool_virt2iova(cookie) +
  37                         offsetof(struct qat_sym_op_cookie,
  38                         opt.spc_gmac.cd_cipher);
  39 }
  40
  41 static inline void
  42 set_cipher_iv(uint16_t iv_length, uint16_t iv_offset,
  43                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
  44                 struct rte_crypto_op *op,
  45                 struct icp_qat_fw_la_bulk_req *qat_req)
  46 {
  47         /* copy IV into request if it fits */
  48         if (iv_length <= sizeof(cipher_param->u.cipher_IV_array)) {
  49                 rte_memcpy(cipher_param->u.cipher_IV_array,
  50                                 rte_crypto_op_ctod_offset(op, uint8_t *,
  51                                         iv_offset),
  52                                 iv_length);
  53         } else {
  54                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
  55                                 qat_req->comn_hdr.serv_specif_flags,
  56                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
  57                 cipher_param->u.s.cipher_IV_ptr =
  58                                 rte_crypto_op_ctophys_offset(op,
  59                                         iv_offset);
  60         }
  61 }
  62
  63 /** Set IV for CCM is special case, 0th byte is set to q-1
  64  *  where q is padding of nonce in 16 byte block
  65  */
  66 static inline void
  67 set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,
  68                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
  69                 struct rte_crypto_op *op, uint8_t q, uint8_t aad_len_field_sz)
  70 {
  71         rte_memcpy(((uint8_t *)cipher_param->u.cipher_IV_array) +
  72                         ICP_QAT_HW_CCM_NONCE_OFFSET,
  73                         rte_crypto_op_ctod_offset(op, uint8_t *,
  74                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
  75                         iv_length);
  76         *(uint8_t *)&cipher_param->u.cipher_IV_array[0] =
  77                         q - ICP_QAT_HW_CCM_NONCE_OFFSET;
  78
  79         if (aad_len_field_sz)
  80                 rte_memcpy(&op->sym->aead.aad.data[ICP_QAT_HW_CCM_NONCE_OFFSET],
  81                         rte_crypto_op_ctod_offset(op, uint8_t *,
  82                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
  83                         iv_length);
  84 }
  85
  86 /** Handle Single-Pass AES-GMAC on QAT GEN3 */
  87 static inline void
  88 handle_spc_gmac(struct qat_sym_session *ctx, struct rte_crypto_op *op,
  89                 struct qat_sym_op_cookie *cookie,
  90                 struct icp_qat_fw_la_bulk_req *qat_req)
  91 {
  92         static const uint32_t ver_key_offset =
  93                         sizeof(struct icp_qat_hw_auth_setup) +
  94                         ICP_QAT_HW_GALOIS_128_STATE1_SZ +
  95                         ICP_QAT_HW_GALOIS_H_SZ + ICP_QAT_HW_GALOIS_LEN_A_SZ +
  96                         ICP_QAT_HW_GALOIS_E_CTR0_SZ +
  97                         sizeof(struct icp_qat_hw_cipher_config);
  98         struct icp_qat_fw_cipher_cd_ctrl_hdr *cipher_cd_ctrl =
  99                         (void *) &qat_req->cd_ctrl;
 100         struct icp_qat_fw_la_cipher_req_params *cipher_param =
 101                         (void *) &qat_req->serv_specif_rqpars;
 102         uint32_t data_length = op->sym->auth.data.length;
 103
 104         /* Fill separate Content Descriptor for this op */
 105         rte_memcpy(cookie->opt.spc_gmac.cd_cipher.key,
 106                         ctx->auth_op == ICP_QAT_HW_AUTH_GENERATE ?
 107                                 ctx->cd.cipher.key :
 108                                 RTE_PTR_ADD(&ctx->cd, ver_key_offset),
 109                         ctx->auth_key_length);
 110         cookie->opt.spc_gmac.cd_cipher.cipher_config.val =
 111                         ICP_QAT_HW_CIPHER_CONFIG_BUILD(
 112                                 ICP_QAT_HW_CIPHER_AEAD_MODE,
 113                                 ctx->qat_cipher_alg,
 114                                 ICP_QAT_HW_CIPHER_NO_CONVERT,
 115                                 (ctx->auth_op == ICP_QAT_HW_AUTH_GENERATE ?
 116                                         ICP_QAT_HW_CIPHER_ENCRYPT :
 117                                         ICP_QAT_HW_CIPHER_DECRYPT));
 118         QAT_FIELD_SET(cookie->opt.spc_gmac.cd_cipher.cipher_config.val,
 119                         ctx->digest_length,
 120                         QAT_CIPHER_AEAD_HASH_CMP_LEN_BITPOS,
 121                         QAT_CIPHER_AEAD_HASH_CMP_LEN_MASK);
 122         cookie->opt.spc_gmac.cd_cipher.cipher_config.reserved =
 123                         ICP_QAT_HW_CIPHER_CONFIG_BUILD_UPPER(data_length);
 124
 125         /* Update the request */
 126         qat_req->cd_pars.u.s.content_desc_addr =
 127                         cookie->opt.spc_gmac.cd_phys_addr;
 128         qat_req->cd_pars.u.s.content_desc_params_sz = RTE_ALIGN_CEIL(
 129                         sizeof(struct icp_qat_hw_cipher_config) +
 130                         ctx->auth_key_length, 8) >> 3;
 131         qat_req->comn_mid.src_length = data_length;
 132         qat_req->comn_mid.dst_length = 0;
 133
 134         cipher_param->spc_aad_addr = 0;
 135         cipher_param->spc_auth_res_addr = op->sym->auth.digest.phys_addr;
 136         cipher_param->spc_aad_sz = data_length;
 137         cipher_param->reserved = 0;
 138         cipher_param->spc_auth_res_sz = ctx->digest_length;
 139
 140         qat_req->comn_hdr.service_cmd_id = ICP_QAT_FW_LA_CMD_CIPHER;
 141         cipher_cd_ctrl->cipher_cfg_offset = 0;
 142         ICP_QAT_FW_COMN_CURR_ID_SET(cipher_cd_ctrl, ICP_QAT_FW_SLICE_CIPHER);
 143         ICP_QAT_FW_COMN_NEXT_ID_SET(cipher_cd_ctrl, ICP_QAT_FW_SLICE_DRAM_WR);
 144         ICP_QAT_FW_LA_SINGLE_PASS_PROTO_FLAG_SET(
 145                         qat_req->comn_hdr.serv_specif_flags,
 146                         ICP_QAT_FW_LA_SINGLE_PASS_PROTO);
 147         ICP_QAT_FW_LA_PROTO_SET(
 148                         qat_req->comn_hdr.serv_specif_flags,
 149                         ICP_QAT_FW_LA_NO_PROTO);
 150 }
 151
 152 int
 153 qat_sym_build_request(void *in_op, uint8_t *out_msg,
 154                 void *op_cookie, __rte_unused enum qat_device_gen qat_dev_gen)
 155 {
 156         int ret = 0;
 157         struct qat_sym_session *ctx = NULL;
 158         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 159         struct icp_qat_fw_la_cipher_20_req_params *cipher_param20;
 160         struct icp_qat_fw_la_auth_req_params *auth_param;
 161         register struct icp_qat_fw_la_bulk_req *qat_req;
 162         uint8_t do_auth = 0, do_cipher = 0, do_aead = 0;
 163         uint32_t cipher_len = 0, cipher_ofs = 0;
 164         uint32_t auth_len = 0, auth_ofs = 0;
 165         uint32_t min_ofs = 0;
 166         uint64_t src_buf_start = 0, dst_buf_start = 0;
 167         uint64_t auth_data_end = 0;
 168         uint8_t do_sgl = 0;
 169         uint8_t in_place = 1;
 170         int alignment_adjustment = 0;
 171         int oop_shift = 0;
 172         struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
 173         struct qat_sym_op_cookie *cookie =
 174                                 (struct qat_sym_op_cookie *)op_cookie;
 175
 176         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 177                 QAT_DP_LOG(ERR, "QAT PMD only supports symmetric crypto "
 178                                 "operation requests, op (%p) is not a "
 179                                 "symmetric operation.", op);
 180                 return -EINVAL;
 181         }
 182
 183         if (unlikely(op->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 184                 QAT_DP_LOG(ERR, "QAT PMD only supports session oriented"
 185                                 " requests, op (%p) is sessionless.", op);
 186                 return -EINVAL;
 187         } else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
 188                 ctx = (struct qat_sym_session *)get_sym_session_private_data(
 189                                 op->sym->session, qat_sym_driver_id);
 190 #ifdef RTE_LIB_SECURITY
 191         } else {
 192                 ctx = (struct qat_sym_session *)get_sec_session_private_data(
 193                                 op->sym->sec_session);
 194                 if (likely(ctx)) {
 195                         if (unlikely(ctx->bpi_ctx == NULL)) {
 196                                 QAT_DP_LOG(ERR, "QAT PMD only supports security"
 197                                                 " operation requests for"
 198                                                 " DOCSIS, op (%p) is not for"
 199                                                 " DOCSIS.", op);
 200                                 return -EINVAL;
 201                         } else if (unlikely(((op->sym->m_dst != NULL) &&
 202                                         (op->sym->m_dst != op->sym->m_src)) ||
 203                                         op->sym->m_src->nb_segs > 1)) {
 204                                 QAT_DP_LOG(ERR, "OOP and/or multi-segment"
 205                                                 " buffers not supported for"
 206                                                 " DOCSIS security.");
 207                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 208                                 return -EINVAL;
 209                         }
 210                 }
 211 #endif
 212         }
 213
 214         if (unlikely(ctx == NULL)) {
 215                 QAT_DP_LOG(ERR, "Session was not created for this device");
 216                 return -EINVAL;
 217         }
 218
 219         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 220         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
 221         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 222         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 223         cipher_param20 = (void *)&qat_req->serv_specif_rqpars;
 224         auth_param = (void *)((uint8_t *)cipher_param +
 225                         ICP_QAT_FW_HASH_REQUEST_PARAMETERS_OFFSET);
 226
 227         if ((ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
 228                         ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) &&
 229                         !ctx->is_gmac) {
 230                 /* AES-GCM or AES-CCM */
 231                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 232                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||
 233                         (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128
 234                         && ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE
 235                         && ctx->qat_hash_alg ==
 236                                         ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {
 237                         do_aead = 1;
 238                 } else {
 239                         do_auth = 1;
 240                         do_cipher = 1;
 241                 }
 242         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH || ctx->is_gmac) {
 243                 do_auth = 1;
 244                 do_cipher = 0;
 245         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
 246                 do_auth = 0;
 247                 do_cipher = 1;
 248         }
 249
 250         if (do_cipher) {
 251
 252                 if (ctx->qat_cipher_alg ==
 253                                          ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
 254                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI ||
 255                         ctx->qat_cipher_alg ==
 256                                 ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3) {
 257
 258                         if (unlikely(
 259                             (op->sym->cipher.data.length % BYTE_LENGTH != 0) ||
 260                             (op->sym->cipher.data.offset % BYTE_LENGTH != 0))) {
 261                                 QAT_DP_LOG(ERR,
 262                   "SNOW3G/KASUMI/ZUC in QAT PMD only supports byte aligned values");
 263                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 264                                 return -EINVAL;
 265                         }
 266                         cipher_len = op->sym->cipher.data.length >> 3;
 267                         cipher_ofs = op->sym->cipher.data.offset >> 3;
 268
 269                 } else if (ctx->bpi_ctx) {
 270                         /* DOCSIS - only send complete blocks to device.
 271                          * Process any partial block using CFB mode.
 272                          * Even if 0 complete blocks, still send this to device
 273                          * to get into rx queue for post-process and dequeuing
 274                          */
 275                         cipher_len = qat_bpicipher_preprocess(ctx, op);
 276                         cipher_ofs = op->sym->cipher.data.offset;
 277                 } else {
 278                         cipher_len = op->sym->cipher.data.length;
 279                         cipher_ofs = op->sym->cipher.data.offset;
 280                 }
 281
 282                 set_cipher_iv(ctx->cipher_iv.length, ctx->cipher_iv.offset,
 283                                 cipher_param, op, qat_req);
 284                 min_ofs = cipher_ofs;
 285         }
 286
 287         if (do_auth) {
 288
 289                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 ||
 290                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 ||
 291                         ctx->qat_hash_alg ==
 292                                 ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3) {
 293                         if (unlikely(
 294                             (op->sym->auth.data.offset % BYTE_LENGTH != 0) ||
 295                             (op->sym->auth.data.length % BYTE_LENGTH != 0))) {
 296                                 QAT_DP_LOG(ERR,
 297                 "For SNOW3G/KASUMI/ZUC, QAT PMD only supports byte aligned values");
 298                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 299                                 return -EINVAL;
 300                         }
 301                         auth_ofs = op->sym->auth.data.offset >> 3;
 302                         auth_len = op->sym->auth.data.length >> 3;
 303
 304                         auth_param->u1.aad_adr =
 305                                         rte_crypto_op_ctophys_offset(op,
 306                                                         ctx->auth_iv.offset);
 307
 308                 } else if (ctx->qat_hash_alg ==
 309                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 310                                 ctx->qat_hash_alg ==
 311                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 312                         /* AES-GMAC */
 313                         set_cipher_iv(ctx->auth_iv.length,
 314                                 ctx->auth_iv.offset,
 315                                 cipher_param, op, qat_req);
 316                         auth_ofs = op->sym->auth.data.offset;
 317                         auth_len = op->sym->auth.data.length;
 318
 319                         auth_param->u1.aad_adr = 0;
 320                         auth_param->u2.aad_sz = 0;
 321
 322                 } else {
 323                         auth_ofs = op->sym->auth.data.offset;
 324                         auth_len = op->sym->auth.data.length;
 325
 326                 }
 327                 min_ofs = auth_ofs;
 328
 329                 if (ctx->qat_hash_alg != ICP_QAT_HW_AUTH_ALGO_NULL ||
 330                                 ctx->auth_op == ICP_QAT_HW_AUTH_VERIFY)
 331                         auth_param->auth_res_addr =
 332                                         op->sym->auth.digest.phys_addr;
 333
 334         }
 335
 336         if (do_aead) {
 337                 /*
 338                  * This address may used for setting AAD physical pointer
 339                  * into IV offset from op
 340                  */
 341                 rte_iova_t aad_phys_addr_aead = op->sym->aead.aad.phys_addr;
 342                 if (ctx->qat_hash_alg ==
 343                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 344                                 ctx->qat_hash_alg ==
 345                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 346
 347                         set_cipher_iv(ctx->cipher_iv.length,
 348                                         ctx->cipher_iv.offset,
 349                                         cipher_param, op, qat_req);
 350
 351                 } else if (ctx->qat_hash_alg ==
 352                                 ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC) {
 353
 354                         /* In case of AES-CCM this may point to user selected
 355                          * memory or iv offset in crypto_op
 356                          */
 357                         uint8_t *aad_data = op->sym->aead.aad.data;
 358                         /* This is true AAD length, it not includes 18 bytes of
 359                          * preceding data
 360                          */
 361                         uint8_t aad_ccm_real_len = 0;
 362                         uint8_t aad_len_field_sz = 0;
 363                         uint32_t msg_len_be =
 364                                         rte_bswap32(op->sym->aead.data.length);
 365
 366                         if (ctx->aad_len > ICP_QAT_HW_CCM_AAD_DATA_OFFSET) {
 367                                 aad_len_field_sz = ICP_QAT_HW_CCM_AAD_LEN_INFO;
 368                                 aad_ccm_real_len = ctx->aad_len -
 369                                         ICP_QAT_HW_CCM_AAD_B0_LEN -
 370                                         ICP_QAT_HW_CCM_AAD_LEN_INFO;
 371                         } else {
 372                                 /*
 373                                  * aad_len not greater than 18, so no actual aad
 374                                  *  data, then use IV after op for B0 block
 375                                  */
 376                                 aad_data = rte_crypto_op_ctod_offset(op,
 377                                                 uint8_t *,
 378                                                 ctx->cipher_iv.offset);
 379                                 aad_phys_addr_aead =
 380                                                 rte_crypto_op_ctophys_offset(op,
 381                                                         ctx->cipher_iv.offset);
 382                         }
 383
 384                         uint8_t q = ICP_QAT_HW_CCM_NQ_CONST -
 385                                                         ctx->cipher_iv.length;
 386
 387                         aad_data[0] = ICP_QAT_HW_CCM_BUILD_B0_FLAGS(
 388                                                         aad_len_field_sz,
 389                                                         ctx->digest_length, q);
 390
 391                         if (q > ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE) {
 392                                 memcpy(aad_data + ctx->cipher_iv.length +
 393                                     ICP_QAT_HW_CCM_NONCE_OFFSET +
 394                                     (q - ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE),
 395                                     (uint8_t *)&msg_len_be,
 396                                     ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE);
 397                         } else {
 398                                 memcpy(aad_data + ctx->cipher_iv.length +
 399                                     ICP_QAT_HW_CCM_NONCE_OFFSET,
 400                                     (uint8_t *)&msg_len_be
 401                                     + (ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE
 402                                     - q), q);
 403                         }
 404
 405                         if (aad_len_field_sz > 0) {
 406                                 *(uint16_t *)&aad_data[ICP_QAT_HW_CCM_AAD_B0_LEN]
 407                                                 = rte_bswap16(aad_ccm_real_len);
 408
 409                                 if ((aad_ccm_real_len + aad_len_field_sz)
 410                                                 % ICP_QAT_HW_CCM_AAD_B0_LEN) {
 411                                         uint8_t pad_len = 0;
 412                                         uint8_t pad_idx = 0;
 413
 414                                         pad_len = ICP_QAT_HW_CCM_AAD_B0_LEN -
 415                                         ((aad_ccm_real_len + aad_len_field_sz) %
 416                                                 ICP_QAT_HW_CCM_AAD_B0_LEN);
 417                                         pad_idx = ICP_QAT_HW_CCM_AAD_B0_LEN +
 418                                             aad_ccm_real_len + aad_len_field_sz;
 419                                         memset(&aad_data[pad_idx],
 420                                                         0, pad_len);
 421                                 }
 422
 423                         }
 424
 425                         set_cipher_iv_ccm(ctx->cipher_iv.length,
 426                                         ctx->cipher_iv.offset,
 427                                         cipher_param, op, q,
 428                                         aad_len_field_sz);
 429
 430                 }
 431
 432                 cipher_len = op->sym->aead.data.length;
 433                 cipher_ofs = op->sym->aead.data.offset;
 434                 auth_len = op->sym->aead.data.length;
 435                 auth_ofs = op->sym->aead.data.offset;
 436
 437                 auth_param->u1.aad_adr = aad_phys_addr_aead;
 438                 auth_param->auth_res_addr = op->sym->aead.digest.phys_addr;
 439                 min_ofs = op->sym->aead.data.offset;
 440         }
 441
 442         if (op->sym->m_src->nb_segs > 1 ||
 443                         (op->sym->m_dst && op->sym->m_dst->nb_segs > 1))
 444                 do_sgl = 1;
 445
 446         /* adjust for chain case */
 447         if (do_cipher && do_auth)
 448                 min_ofs = cipher_ofs < auth_ofs ? cipher_ofs : auth_ofs;
 449
 450         if (unlikely(min_ofs >= rte_pktmbuf_data_len(op->sym->m_src) && do_sgl))
 451                 min_ofs = 0;
 452
 453         if (unlikely((op->sym->m_dst != NULL) &&
 454                         (op->sym->m_dst != op->sym->m_src))) {
 455                 /* Out-of-place operation (OOP)
 456                  * Don't align DMA start. DMA the minimum data-set
 457                  * so as not to overwrite data in dest buffer
 458                  */
 459                 in_place = 0;
 460                 src_buf_start =
 461                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 462                 dst_buf_start =
 463                         rte_pktmbuf_iova_offset(op->sym->m_dst, min_ofs);
 464                 oop_shift = min_ofs;
 465
 466         } else {
 467                 /* In-place operation
 468                  * Start DMA at nearest aligned address below min_ofs
 469                  */
 470                 src_buf_start =
 471                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs)
 472                                                 & QAT_64_BTYE_ALIGN_MASK;
 473
 474                 if (unlikely((rte_pktmbuf_iova(op->sym->m_src) -
 475                                         rte_pktmbuf_headroom(op->sym->m_src))
 476                                                         > src_buf_start)) {
 477                         /* alignment has pushed addr ahead of start of mbuf
 478                          * so revert and take the performance hit
 479                          */
 480                         src_buf_start =
 481                                 rte_pktmbuf_iova_offset(op->sym->m_src,
 482                                                                 min_ofs);
 483                 }
 484                 dst_buf_start = src_buf_start;
 485
 486                 /* remember any adjustment for later, note, can be +/- */
 487                 alignment_adjustment = src_buf_start -
 488                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 489         }
 490
 491         if (do_cipher || do_aead) {
 492                 cipher_param->cipher_offset =
 493                                 (uint32_t)rte_pktmbuf_iova_offset(
 494                                 op->sym->m_src, cipher_ofs) - src_buf_start;
 495                 cipher_param->cipher_length = cipher_len;
 496         } else {
 497                 cipher_param->cipher_offset = 0;
 498                 cipher_param->cipher_length = 0;
 499         }
 500
 501         if (!ctx->is_single_pass) {
 502                 /* Do not let to overwrite spc_aad len */
 503                 if (do_auth || do_aead) {
 504                         auth_param->auth_off =
 505                                 (uint32_t)rte_pktmbuf_iova_offset(
 506                                 op->sym->m_src, auth_ofs) - src_buf_start;
 507                         auth_param->auth_len = auth_len;
 508                 } else {
 509                         auth_param->auth_off = 0;
 510                         auth_param->auth_len = 0;
 511                 }
 512         }
 513
 514         qat_req->comn_mid.dst_length =
 515                 qat_req->comn_mid.src_length =
 516                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 517                 > (auth_param->auth_off + auth_param->auth_len) ?
 518                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 519                 : (auth_param->auth_off + auth_param->auth_len);
 520
 521         if (do_auth && do_cipher) {
 522                 /* Handle digest-encrypted cases, i.e.
 523                  * auth-gen-then-cipher-encrypt and
 524                  * cipher-decrypt-then-auth-verify
 525                  */
 526                  /* First find the end of the data */
 527                 if (do_sgl) {
 528                         uint32_t remaining_off = auth_param->auth_off +
 529                                 auth_param->auth_len + alignment_adjustment + oop_shift;
 530                         struct rte_mbuf *sgl_buf =
 531                                 (in_place ?
 532                                         op->sym->m_src : op->sym->m_dst);
 533
 534                         while (remaining_off >= rte_pktmbuf_data_len(sgl_buf)
 535                                         && sgl_buf->next != NULL) {
 536                                 remaining_off -= rte_pktmbuf_data_len(sgl_buf);
 537                                 sgl_buf = sgl_buf->next;
 538                         }
 539
 540                         auth_data_end = (uint64_t)rte_pktmbuf_iova_offset(
 541                                 sgl_buf, remaining_off);
 542                 } else {
 543                         auth_data_end = (in_place ?
 544                                 src_buf_start : dst_buf_start) +
 545                                 auth_param->auth_off + auth_param->auth_len;
 546                 }
 547                 /* Then check if digest-encrypted conditions are met */
 548                 if ((auth_param->auth_off + auth_param->auth_len <
 549                                         cipher_param->cipher_offset +
 550                                         cipher_param->cipher_length) &&
 551                                 (op->sym->auth.digest.phys_addr ==
 552                                         auth_data_end)) {
 553                         /* Handle partial digest encryption */
 554                         if (cipher_param->cipher_offset +
 555                                         cipher_param->cipher_length <
 556                                         auth_param->auth_off +
 557                                         auth_param->auth_len +
 558                                         ctx->digest_length)
 559                                 qat_req->comn_mid.dst_length =
 560                                         qat_req->comn_mid.src_length =
 561                                         auth_param->auth_off +
 562                                         auth_param->auth_len +
 563                                         ctx->digest_length;
 564                         struct icp_qat_fw_comn_req_hdr *header =
 565                                 &qat_req->comn_hdr;
 566                         ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 567                                 header->serv_specif_flags,
 568                                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER);
 569                 }
 570         }
 571
 572         if (do_sgl) {
 573
 574                 ICP_QAT_FW_COMN_PTR_TYPE_SET(qat_req->comn_hdr.comn_req_flags,
 575                                 QAT_COMN_PTR_TYPE_SGL);
 576                 ret = qat_sgl_fill_array(op->sym->m_src,
 577                    (int64_t)(src_buf_start - rte_pktmbuf_iova(op->sym->m_src)),
 578                    &cookie->qat_sgl_src,
 579                    qat_req->comn_mid.src_length,
 580                    QAT_SYM_SGL_MAX_NUMBER);
 581
 582                 if (unlikely(ret)) {
 583                         QAT_DP_LOG(ERR, "QAT PMD Cannot fill sgl array");
 584                         return ret;
 585                 }
 586
 587                 if (in_place)
 588                         qat_req->comn_mid.dest_data_addr =
 589                                 qat_req->comn_mid.src_data_addr =
 590                                 cookie->qat_sgl_src_phys_addr;
 591                 else {
 592                         ret = qat_sgl_fill_array(op->sym->m_dst,
 593                                 (int64_t)(dst_buf_start -
 594                                           rte_pktmbuf_iova(op->sym->m_dst)),
 595                                  &cookie->qat_sgl_dst,
 596                                  qat_req->comn_mid.dst_length,
 597                                  QAT_SYM_SGL_MAX_NUMBER);
 598
 599                         if (unlikely(ret)) {
 600                                 QAT_DP_LOG(ERR, "QAT PMD can't fill sgl array");
 601                                 return ret;
 602                         }
 603
 604                         qat_req->comn_mid.src_data_addr =
 605                                 cookie->qat_sgl_src_phys_addr;
 606                         qat_req->comn_mid.dest_data_addr =
 607                                         cookie->qat_sgl_dst_phys_addr;
 608                 }
 609                 qat_req->comn_mid.src_length = 0;
 610                 qat_req->comn_mid.dst_length = 0;
 611         } else {
 612                 qat_req->comn_mid.src_data_addr = src_buf_start;
 613                 qat_req->comn_mid.dest_data_addr = dst_buf_start;
 614         }
 615
 616         if (ctx->is_single_pass) {
 617                 if (ctx->is_ucs) {
 618                         /* GEN 4 */
 619                         cipher_param20->spc_aad_addr =
 620                                 op->sym->aead.aad.phys_addr;
 621                         cipher_param20->spc_auth_res_addr =
 622                                 op->sym->aead.digest.phys_addr;
 623                 } else {
 624                         cipher_param->spc_aad_addr =
 625                                 op->sym->aead.aad.phys_addr;
 626                         cipher_param->spc_auth_res_addr =
 627                                         op->sym->aead.digest.phys_addr;
 628                 }
 629         } else if (ctx->is_single_pass_gmac &&
 630                        op->sym->auth.data.length <= QAT_AES_GMAC_SPC_MAX_SIZE) {
 631                 /* Handle Single-Pass AES-GMAC */
 632                 handle_spc_gmac(ctx, op, cookie, qat_req);
 633         }
 634
 635 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
 636         QAT_DP_HEXDUMP_LOG(DEBUG, "qat_req:", qat_req,
 637                         sizeof(struct icp_qat_fw_la_bulk_req));
 638         QAT_DP_HEXDUMP_LOG(DEBUG, "src_data:",
 639                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 640                         rte_pktmbuf_data_len(op->sym->m_src));
 641         if (do_cipher) {
 642                 uint8_t *cipher_iv_ptr = rte_crypto_op_ctod_offset(op,
 643                                                 uint8_t *,
 644                                                 ctx->cipher_iv.offset);
 645                 QAT_DP_HEXDUMP_LOG(DEBUG, "cipher iv:", cipher_iv_ptr,
 646                                 ctx->cipher_iv.length);
 647         }
 648
 649         if (do_auth) {
 650                 if (ctx->auth_iv.length) {
 651                         uint8_t *auth_iv_ptr = rte_crypto_op_ctod_offset(op,
 652                                                         uint8_t *,
 653                                                         ctx->auth_iv.offset);
 654                         QAT_DP_HEXDUMP_LOG(DEBUG, "auth iv:", auth_iv_ptr,
 655                                                 ctx->auth_iv.length);
 656                 }
 657                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->auth.digest.data,
 658                                 ctx->digest_length);
 659         }
 660
 661         if (do_aead) {
 662                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->aead.digest.data,
 663                                 ctx->digest_length);
 664                 QAT_DP_HEXDUMP_LOG(DEBUG, "aad:", op->sym->aead.aad.data,
 665                                 ctx->aad_len);
 666         }
 667 #endif
 668         return 0;
 669 }