1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #include "cnxk_eventdev.h"
8 cn10k_sso_set_rsrc(void *arg)
10 struct cnxk_sso_evdev *dev = arg;
12 dev->max_event_ports = dev->sso.max_hws;
13 dev->max_event_queues =
14 dev->sso.max_hwgrp > RTE_EVENT_MAX_QUEUES_PER_DEV ?
15 RTE_EVENT_MAX_QUEUES_PER_DEV :
20 cn10k_sso_rsrc_init(void *arg, uint8_t hws, uint8_t hwgrp)
22 struct cnxk_sso_evdev *dev = arg;
24 return roc_sso_rsrc_init(&dev->sso, hws, hwgrp);
28 cn10k_sso_info_get(struct rte_eventdev *event_dev,
29 struct rte_event_dev_info *dev_info)
31 struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
33 dev_info->driver_name = RTE_STR(EVENTDEV_NAME_CN10K_PMD);
34 cnxk_sso_info_get(dev, dev_info);
38 cn10k_sso_dev_configure(const struct rte_eventdev *event_dev)
40 struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
43 rc = cnxk_sso_dev_validate(event_dev);
45 plt_err("Invalid event device configuration");
49 roc_sso_rsrc_fini(&dev->sso);
51 rc = cn10k_sso_rsrc_init(dev, dev->nb_event_ports,
52 dev->nb_event_queues);
54 plt_err("Failed to initialize SSO resources");
61 static struct rte_eventdev_ops cn10k_sso_dev_ops = {
62 .dev_infos_get = cn10k_sso_info_get,
63 .dev_configure = cn10k_sso_dev_configure,
64 .queue_def_conf = cnxk_sso_queue_def_conf,
65 .port_def_conf = cnxk_sso_port_def_conf,
69 cn10k_sso_init(struct rte_eventdev *event_dev)
71 struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
74 if (RTE_CACHE_LINE_SIZE != 64) {
75 plt_err("Driver not compiled for CN9K");
81 plt_err("Failed to initialize platform model");
85 event_dev->dev_ops = &cn10k_sso_dev_ops;
86 /* For secondary processes, the primary has done all the work */
87 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
90 rc = cnxk_sso_init(event_dev);
94 cn10k_sso_set_rsrc(cnxk_sso_pmd_priv(event_dev));
95 if (!dev->max_event_ports || !dev->max_event_queues) {
96 plt_err("Not enough eventdev resource queues=%d ports=%d",
97 dev->max_event_queues, dev->max_event_ports);
98 cnxk_sso_fini(event_dev);
102 plt_sso_dbg("Initializing %s max_queues=%d max_ports=%d",
103 event_dev->data->name, dev->max_event_queues,
104 dev->max_event_ports);
110 cn10k_sso_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
112 return rte_event_pmd_pci_probe(pci_drv, pci_dev,
113 sizeof(struct cnxk_sso_evdev),
117 static const struct rte_pci_id cn10k_pci_sso_map[] = {
118 CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
119 CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
120 CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
121 CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
127 static struct rte_pci_driver cn10k_pci_sso = {
128 .id_table = cn10k_pci_sso_map,
129 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
130 .probe = cn10k_sso_probe,
131 .remove = cnxk_sso_remove,
134 RTE_PMD_REGISTER_PCI(event_cn10k, cn10k_pci_sso);
135 RTE_PMD_REGISTER_PCI_TABLE(event_cn10k, cn10k_pci_sso_map);
136 RTE_PMD_REGISTER_KMOD_DEP(event_cn10k, "vfio-pci");