drivers/event/cnxk/cn10k_eventdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #include "cnxk_eventdev.h"
   6
   7 static void
   8 cn10k_sso_set_rsrc(void *arg)
   9 {
  10         struct cnxk_sso_evdev *dev = arg;
  11
  12         dev->max_event_ports = dev->sso.max_hws;
  13         dev->max_event_queues =
  14                 dev->sso.max_hwgrp > RTE_EVENT_MAX_QUEUES_PER_DEV ?
  15                               RTE_EVENT_MAX_QUEUES_PER_DEV :
  16                               dev->sso.max_hwgrp;
  17 }
  18
  19 static int
  20 cn10k_sso_rsrc_init(void *arg, uint8_t hws, uint8_t hwgrp)
  21 {
  22         struct cnxk_sso_evdev *dev = arg;
  23
  24         return roc_sso_rsrc_init(&dev->sso, hws, hwgrp);
  25 }
  26
  27 static void
  28 cn10k_sso_info_get(struct rte_eventdev *event_dev,
  29                    struct rte_event_dev_info *dev_info)
  30 {
  31         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
  32
  33         dev_info->driver_name = RTE_STR(EVENTDEV_NAME_CN10K_PMD);
  34         cnxk_sso_info_get(dev, dev_info);
  35 }
  36
  37 static int
  38 cn10k_sso_dev_configure(const struct rte_eventdev *event_dev)
  39 {
  40         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
  41         int rc;
  42
  43         rc = cnxk_sso_dev_validate(event_dev);
  44         if (rc < 0) {
  45                 plt_err("Invalid event device configuration");
  46                 return -EINVAL;
  47         }
  48
  49         roc_sso_rsrc_fini(&dev->sso);
  50
  51         rc = cn10k_sso_rsrc_init(dev, dev->nb_event_ports,
  52                                  dev->nb_event_queues);
  53         if (rc < 0) {
  54                 plt_err("Failed to initialize SSO resources");
  55                 return -ENODEV;
  56         }
  57
  58         return rc;
  59 }
  60
  61 static struct rte_eventdev_ops cn10k_sso_dev_ops = {
  62         .dev_infos_get = cn10k_sso_info_get,
  63         .dev_configure = cn10k_sso_dev_configure,
  64         .queue_def_conf = cnxk_sso_queue_def_conf,
  65         .port_def_conf = cnxk_sso_port_def_conf,
  66 };
  67
  68 static int
  69 cn10k_sso_init(struct rte_eventdev *event_dev)
  70 {
  71         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
  72         int rc;
  73
  74         if (RTE_CACHE_LINE_SIZE != 64) {
  75                 plt_err("Driver not compiled for CN9K");
  76                 return -EFAULT;
  77         }
  78
  79         rc = roc_plt_init();
  80         if (rc < 0) {
  81                 plt_err("Failed to initialize platform model");
  82                 return rc;
  83         }
  84
  85         event_dev->dev_ops = &cn10k_sso_dev_ops;
  86         /* For secondary processes, the primary has done all the work */
  87         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
  88                 return 0;
  89
  90         rc = cnxk_sso_init(event_dev);
  91         if (rc < 0)
  92                 return rc;
  93
  94         cn10k_sso_set_rsrc(cnxk_sso_pmd_priv(event_dev));
  95         if (!dev->max_event_ports || !dev->max_event_queues) {
  96                 plt_err("Not enough eventdev resource queues=%d ports=%d",
  97                         dev->max_event_queues, dev->max_event_ports);
  98                 cnxk_sso_fini(event_dev);
  99                 return -ENODEV;
 100         }
 101
 102         plt_sso_dbg("Initializing %s max_queues=%d max_ports=%d",
 103                     event_dev->data->name, dev->max_event_queues,
 104                     dev->max_event_ports);
 105
 106         return 0;
 107 }
 108
 109 static int
 110 cn10k_sso_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 111 {
 112         return rte_event_pmd_pci_probe(pci_drv, pci_dev,
 113                                        sizeof(struct cnxk_sso_evdev),
 114                                        cn10k_sso_init);
 115 }
 116
 117 static const struct rte_pci_id cn10k_pci_sso_map[] = {
 118         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
 119         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
 120         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
 121         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
 122         {
 123                 .vendor_id = 0,
 124         },
 125 };
 126
 127 static struct rte_pci_driver cn10k_pci_sso = {
 128         .id_table = cn10k_pci_sso_map,
 129         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
 130         .probe = cn10k_sso_probe,
 131         .remove = cnxk_sso_remove,
 132 };
 133
 134 RTE_PMD_REGISTER_PCI(event_cn10k, cn10k_pci_sso);
 135 RTE_PMD_REGISTER_PCI_TABLE(event_cn10k, cn10k_pci_sso_map);
 136 RTE_PMD_REGISTER_KMOD_DEP(event_cn10k, "vfio-pci");