1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #include "cn9k_worker.h"
6 #include "cnxk_eventdev.h"
7 #include "cnxk_worker.h"
9 #define CN9K_DUAL_WS_NB_WS 2
10 #define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id)
13 cn9k_init_hws_ops(struct cn9k_sso_hws_state *ws, uintptr_t base)
15 ws->tag_op = base + SSOW_LF_GWS_TAG;
16 ws->wqp_op = base + SSOW_LF_GWS_WQP;
17 ws->getwrk_op = base + SSOW_LF_GWS_OP_GET_WORK0;
18 ws->swtag_flush_op = base + SSOW_LF_GWS_OP_SWTAG_FLUSH;
19 ws->swtag_norm_op = base + SSOW_LF_GWS_OP_SWTAG_NORM;
20 ws->swtag_desched_op = base + SSOW_LF_GWS_OP_SWTAG_DESCHED;
24 cn9k_sso_hws_link(void *arg, void *port, uint16_t *map, uint16_t nb_link)
26 struct cnxk_sso_evdev *dev = arg;
27 struct cn9k_sso_hws_dual *dws;
28 struct cn9k_sso_hws *ws;
33 rc = roc_sso_hws_link(&dev->sso,
34 CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 0), map,
36 rc |= roc_sso_hws_link(&dev->sso,
37 CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 1),
41 rc = roc_sso_hws_link(&dev->sso, ws->hws_id, map, nb_link);
48 cn9k_sso_hws_unlink(void *arg, void *port, uint16_t *map, uint16_t nb_link)
50 struct cnxk_sso_evdev *dev = arg;
51 struct cn9k_sso_hws_dual *dws;
52 struct cn9k_sso_hws *ws;
57 rc = roc_sso_hws_unlink(&dev->sso,
58 CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 0),
60 rc |= roc_sso_hws_unlink(&dev->sso,
61 CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 1),
65 rc = roc_sso_hws_unlink(&dev->sso, ws->hws_id, map, nb_link);
72 cn9k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)
74 struct cnxk_sso_evdev *dev = arg;
75 struct cn9k_sso_hws_dual *dws;
76 struct cn9k_sso_hws *ws;
79 /* Set get_work tmo for HWS */
80 val = NSEC2USEC(dev->deq_tmo_ns) - 1;
83 rte_memcpy(dws->grps_base, grps_base,
84 sizeof(uintptr_t) * CNXK_SSO_MAX_HWGRP);
85 dws->fc_mem = dev->fc_mem;
86 dws->xaq_lmt = dev->xaq_lmt;
88 plt_write64(val, dws->base[0] + SSOW_LF_GWS_NW_TIM);
89 plt_write64(val, dws->base[1] + SSOW_LF_GWS_NW_TIM);
92 rte_memcpy(ws->grps_base, grps_base,
93 sizeof(uintptr_t) * CNXK_SSO_MAX_HWGRP);
94 ws->fc_mem = dev->fc_mem;
95 ws->xaq_lmt = dev->xaq_lmt;
97 plt_write64(val, ws->base + SSOW_LF_GWS_NW_TIM);
102 cn9k_sso_hws_release(void *arg, void *hws)
104 struct cnxk_sso_evdev *dev = arg;
105 struct cn9k_sso_hws_dual *dws;
106 struct cn9k_sso_hws *ws;
111 for (i = 0; i < dev->nb_event_queues; i++) {
112 roc_sso_hws_unlink(&dev->sso,
113 CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 0),
115 roc_sso_hws_unlink(&dev->sso,
116 CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 1),
119 memset(dws, 0, sizeof(*dws));
122 for (i = 0; i < dev->nb_event_queues; i++)
123 roc_sso_hws_unlink(&dev->sso, ws->hws_id,
125 memset(ws, 0, sizeof(*ws));
130 cn9k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,
131 cnxk_handle_event_t fn, void *arg)
133 struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(arg);
134 struct cn9k_sso_hws_dual *dws;
135 struct cn9k_sso_hws_state *st;
136 struct cn9k_sso_hws *ws;
137 uint64_t cq_ds_cnt = 1;
144 plt_write64(0, base + SSO_LF_GGRP_QCTL);
146 req = queue_id; /* GGRP ID */
147 req |= BIT_ULL(18); /* Grouped */
148 req |= BIT_ULL(16); /* WAIT */
150 aq_cnt = plt_read64(base + SSO_LF_GGRP_AQ_CNT);
151 ds_cnt = plt_read64(base + SSO_LF_GGRP_MISC_CNT);
152 cq_ds_cnt = plt_read64(base + SSO_LF_GGRP_INT_CNT);
153 cq_ds_cnt &= 0x3FFF3FFF0000;
157 st = &dws->ws_state[0];
158 ws_base = dws->base[0];
161 st = (struct cn9k_sso_hws_state *)ws;
165 while (aq_cnt || cq_ds_cnt || ds_cnt) {
166 plt_write64(req, st->getwrk_op);
167 cn9k_sso_hws_get_work_empty(st, &ev);
168 if (fn != NULL && ev.u64 != 0)
170 if (ev.sched_type != SSO_TT_EMPTY)
171 cnxk_sso_hws_swtag_flush(st->tag_op,
174 val = plt_read64(ws_base + SSOW_LF_GWS_PENDSTATE);
175 } while (val & BIT_ULL(56));
176 aq_cnt = plt_read64(base + SSO_LF_GGRP_AQ_CNT);
177 ds_cnt = plt_read64(base + SSO_LF_GGRP_MISC_CNT);
178 cq_ds_cnt = plt_read64(base + SSO_LF_GGRP_INT_CNT);
179 /* Extract cq and ds count */
180 cq_ds_cnt &= 0x3FFF3FFF0000;
183 plt_write64(0, ws_base + SSOW_LF_GWS_OP_GWC_INVAL);
187 cn9k_sso_hws_reset(void *arg, void *hws)
189 struct cnxk_sso_evdev *dev = arg;
190 struct cn9k_sso_hws_dual *dws;
191 struct cn9k_sso_hws *ws;
200 for (i = 0; i < (dev->dual_ws ? CN9K_DUAL_WS_NB_WS : 1); i++) {
201 base = dev->dual_ws ? dws->base[i] : ws->base;
202 /* Wait till getwork/swtp/waitw/desched completes. */
204 pend_state = plt_read64(base + SSOW_LF_GWS_PENDSTATE);
205 } while (pend_state & (BIT_ULL(63) | BIT_ULL(62) | BIT_ULL(58) |
208 tag = plt_read64(base + SSOW_LF_GWS_TAG);
209 pend_tt = (tag >> 32) & 0x3;
210 if (pend_tt != SSO_TT_EMPTY) { /* Work was pending */
211 if (pend_tt == SSO_TT_ATOMIC ||
212 pend_tt == SSO_TT_ORDERED)
213 cnxk_sso_hws_swtag_untag(
214 base + SSOW_LF_GWS_OP_SWTAG_UNTAG);
215 plt_write64(0, base + SSOW_LF_GWS_OP_DESCHED);
218 /* Wait for desched to complete. */
220 pend_state = plt_read64(base + SSOW_LF_GWS_PENDSTATE);
221 } while (pend_state & BIT_ULL(58));
226 cn9k_sso_set_rsrc(void *arg)
228 struct cnxk_sso_evdev *dev = arg;
231 dev->max_event_ports = dev->sso.max_hws / CN9K_DUAL_WS_NB_WS;
233 dev->max_event_ports = dev->sso.max_hws;
234 dev->max_event_queues =
235 dev->sso.max_hwgrp > RTE_EVENT_MAX_QUEUES_PER_DEV ?
236 RTE_EVENT_MAX_QUEUES_PER_DEV :
241 cn9k_sso_rsrc_init(void *arg, uint8_t hws, uint8_t hwgrp)
243 struct cnxk_sso_evdev *dev = arg;
246 hws = hws * CN9K_DUAL_WS_NB_WS;
248 return roc_sso_rsrc_init(&dev->sso, hws, hwgrp);
252 cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev)
254 struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
256 event_dev->enqueue = cn9k_sso_hws_enq;
257 event_dev->enqueue_burst = cn9k_sso_hws_enq_burst;
258 event_dev->enqueue_new_burst = cn9k_sso_hws_enq_new_burst;
259 event_dev->enqueue_forward_burst = cn9k_sso_hws_enq_fwd_burst;
261 event_dev->dequeue = cn9k_sso_hws_deq;
262 event_dev->dequeue_burst = cn9k_sso_hws_deq_burst;
263 if (dev->deq_tmo_ns) {
264 event_dev->dequeue = cn9k_sso_hws_tmo_deq;
265 event_dev->dequeue_burst = cn9k_sso_hws_tmo_deq_burst;
269 event_dev->enqueue = cn9k_sso_hws_dual_enq;
270 event_dev->enqueue_burst = cn9k_sso_hws_dual_enq_burst;
271 event_dev->enqueue_new_burst = cn9k_sso_hws_dual_enq_new_burst;
272 event_dev->enqueue_forward_burst =
273 cn9k_sso_hws_dual_enq_fwd_burst;
275 event_dev->dequeue = cn9k_sso_hws_dual_deq;
276 event_dev->dequeue_burst = cn9k_sso_hws_dual_deq_burst;
277 if (dev->deq_tmo_ns) {
278 event_dev->dequeue = cn9k_sso_hws_dual_tmo_deq;
279 event_dev->dequeue_burst =
280 cn9k_sso_hws_dual_tmo_deq_burst;
286 cn9k_sso_init_hws_mem(void *arg, uint8_t port_id)
288 struct cnxk_sso_evdev *dev = arg;
289 struct cn9k_sso_hws_dual *dws;
290 struct cn9k_sso_hws *ws;
294 dws = rte_zmalloc("cn9k_dual_ws",
295 sizeof(struct cn9k_sso_hws_dual) +
297 RTE_CACHE_LINE_SIZE);
299 plt_err("Failed to alloc memory for port=%d", port_id);
303 dws = RTE_PTR_ADD(dws, sizeof(struct cnxk_sso_hws_cookie));
304 dws->base[0] = roc_sso_hws_base_get(
305 &dev->sso, CN9K_DUAL_WS_PAIR_ID(port_id, 0));
306 dws->base[1] = roc_sso_hws_base_get(
307 &dev->sso, CN9K_DUAL_WS_PAIR_ID(port_id, 1));
308 cn9k_init_hws_ops(&dws->ws_state[0], dws->base[0]);
309 cn9k_init_hws_ops(&dws->ws_state[1], dws->base[1]);
310 dws->hws_id = port_id;
316 /* Allocate event port memory */
317 ws = rte_zmalloc("cn9k_ws",
318 sizeof(struct cn9k_sso_hws) +
320 RTE_CACHE_LINE_SIZE);
322 plt_err("Failed to alloc memory for port=%d", port_id);
326 /* First cache line is reserved for cookie */
327 ws = RTE_PTR_ADD(ws, sizeof(struct cnxk_sso_hws_cookie));
328 ws->base = roc_sso_hws_base_get(&dev->sso, port_id);
329 cn9k_init_hws_ops((struct cn9k_sso_hws_state *)ws, ws->base);
330 ws->hws_id = port_id;
340 cn9k_sso_info_get(struct rte_eventdev *event_dev,
341 struct rte_event_dev_info *dev_info)
343 struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
345 dev_info->driver_name = RTE_STR(EVENTDEV_NAME_CN9K_PMD);
346 cnxk_sso_info_get(dev, dev_info);
350 cn9k_sso_dev_configure(const struct rte_eventdev *event_dev)
352 struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
355 rc = cnxk_sso_dev_validate(event_dev);
357 plt_err("Invalid event device configuration");
361 roc_sso_rsrc_fini(&dev->sso);
363 rc = cn9k_sso_rsrc_init(dev, dev->nb_event_ports, dev->nb_event_queues);
365 plt_err("Failed to initialize SSO resources");
369 rc = cnxk_sso_xaq_allocate(dev);
373 rc = cnxk_setup_event_ports(event_dev, cn9k_sso_init_hws_mem,
378 /* Restore any prior port-queue mapping. */
379 cnxk_sso_restore_links(event_dev, cn9k_sso_hws_link);
386 roc_sso_rsrc_fini(&dev->sso);
387 dev->nb_event_ports = 0;
392 cn9k_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
393 const struct rte_event_port_conf *port_conf)
396 RTE_SET_USED(port_conf);
397 return cnxk_sso_port_setup(event_dev, port_id, cn9k_sso_hws_setup);
401 cn9k_sso_port_release(void *port)
403 struct cnxk_sso_hws_cookie *gws_cookie = cnxk_sso_hws_get_cookie(port);
404 struct cnxk_sso_evdev *dev;
409 dev = cnxk_sso_pmd_priv(gws_cookie->event_dev);
410 if (!gws_cookie->configured)
413 cn9k_sso_hws_release(dev, port);
414 memset(gws_cookie, 0, sizeof(*gws_cookie));
416 rte_free(gws_cookie);
420 cn9k_sso_port_link(struct rte_eventdev *event_dev, void *port,
421 const uint8_t queues[], const uint8_t priorities[],
424 struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
425 uint16_t hwgrp_ids[nb_links];
428 RTE_SET_USED(priorities);
429 for (link = 0; link < nb_links; link++)
430 hwgrp_ids[link] = queues[link];
431 nb_links = cn9k_sso_hws_link(dev, port, hwgrp_ids, nb_links);
433 return (int)nb_links;
437 cn9k_sso_port_unlink(struct rte_eventdev *event_dev, void *port,
438 uint8_t queues[], uint16_t nb_unlinks)
440 struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
441 uint16_t hwgrp_ids[nb_unlinks];
444 for (unlink = 0; unlink < nb_unlinks; unlink++)
445 hwgrp_ids[unlink] = queues[unlink];
446 nb_unlinks = cn9k_sso_hws_unlink(dev, port, hwgrp_ids, nb_unlinks);
448 return (int)nb_unlinks;
452 cn9k_sso_start(struct rte_eventdev *event_dev)
456 rc = cnxk_sso_start(event_dev, cn9k_sso_hws_reset,
457 cn9k_sso_hws_flush_events);
461 cn9k_sso_fp_fns_set(event_dev);
467 cn9k_sso_stop(struct rte_eventdev *event_dev)
469 cnxk_sso_stop(event_dev, cn9k_sso_hws_reset, cn9k_sso_hws_flush_events);
473 cn9k_sso_close(struct rte_eventdev *event_dev)
475 return cnxk_sso_close(event_dev, cn9k_sso_hws_unlink);
478 static struct rte_eventdev_ops cn9k_sso_dev_ops = {
479 .dev_infos_get = cn9k_sso_info_get,
480 .dev_configure = cn9k_sso_dev_configure,
481 .queue_def_conf = cnxk_sso_queue_def_conf,
482 .queue_setup = cnxk_sso_queue_setup,
483 .queue_release = cnxk_sso_queue_release,
484 .port_def_conf = cnxk_sso_port_def_conf,
485 .port_setup = cn9k_sso_port_setup,
486 .port_release = cn9k_sso_port_release,
487 .port_link = cn9k_sso_port_link,
488 .port_unlink = cn9k_sso_port_unlink,
489 .timeout_ticks = cnxk_sso_timeout_ticks,
491 .dev_start = cn9k_sso_start,
492 .dev_stop = cn9k_sso_stop,
493 .dev_close = cn9k_sso_close,
497 cn9k_sso_init(struct rte_eventdev *event_dev)
499 struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
502 if (RTE_CACHE_LINE_SIZE != 128) {
503 plt_err("Driver not compiled for CN9K");
509 plt_err("Failed to initialize platform model");
513 event_dev->dev_ops = &cn9k_sso_dev_ops;
514 /* For secondary processes, the primary has done all the work */
515 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
516 cn9k_sso_fp_fns_set(event_dev);
520 rc = cnxk_sso_init(event_dev);
524 cn9k_sso_set_rsrc(cnxk_sso_pmd_priv(event_dev));
525 if (!dev->max_event_ports || !dev->max_event_queues) {
526 plt_err("Not enough eventdev resource queues=%d ports=%d",
527 dev->max_event_queues, dev->max_event_ports);
528 cnxk_sso_fini(event_dev);
532 plt_sso_dbg("Initializing %s max_queues=%d max_ports=%d",
533 event_dev->data->name, dev->max_event_queues,
534 dev->max_event_ports);
540 cn9k_sso_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
542 return rte_event_pmd_pci_probe(
543 pci_drv, pci_dev, sizeof(struct cnxk_sso_evdev), cn9k_sso_init);
546 static const struct rte_pci_id cn9k_pci_sso_map[] = {
552 static struct rte_pci_driver cn9k_pci_sso = {
553 .id_table = cn9k_pci_sso_map,
554 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
555 .probe = cn9k_sso_probe,
556 .remove = cnxk_sso_remove,
559 RTE_PMD_REGISTER_PCI(event_cn9k, cn9k_pci_sso);
560 RTE_PMD_REGISTER_PCI_TABLE(event_cn9k, cn9k_pci_sso_map);
561 RTE_PMD_REGISTER_KMOD_DEP(event_cn9k, "vfio-pci");
562 RTE_PMD_REGISTER_PARAM_STRING(event_cn9k, CNXK_SSO_XAE_CNT "=<int>"
563 CNXK_SSO_GGRP_QOS "=<string>"
564 CN9K_SSO_SINGLE_WS "=1");