drivers/event/cnxk/cn9k_worker.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef __CN9K_WORKER_H__
   6 #define __CN9K_WORKER_H__
   7
   8 #include <rte_eventdev.h>
   9 #include <rte_vect.h>
  10
  11 #include "cnxk_ethdev.h"
  12 #include "cnxk_eventdev.h"
  13 #include "cnxk_worker.h"
  14 #include "cn9k_cryptodev_ops.h"
  15
  16 #include "cn9k_ethdev.h"
  17 #include "cn9k_rx.h"
  18 #include "cn9k_tx.h"
  19
  20 /* SSO Operations */
  21
  22 static __rte_always_inline uint8_t
  23 cn9k_sso_hws_new_event(struct cn9k_sso_hws *ws, const struct rte_event *ev)
  24 {
  25         const uint32_t tag = (uint32_t)ev->event;
  26         const uint8_t new_tt = ev->sched_type;
  27         const uint64_t event_ptr = ev->u64;
  28         const uint16_t grp = ev->queue_id;
  29
  30         rte_atomic_thread_fence(__ATOMIC_ACQ_REL);
  31         if (ws->xaq_lmt <= *ws->fc_mem)
  32                 return 0;
  33
  34         cnxk_sso_hws_add_work(event_ptr, tag, new_tt,
  35                               ws->grp_base + (grp << 12));
  36         return 1;
  37 }
  38
  39 static __rte_always_inline void
  40 cn9k_sso_hws_fwd_swtag(uint64_t base, const struct rte_event *ev)
  41 {
  42         const uint32_t tag = (uint32_t)ev->event;
  43         const uint8_t new_tt = ev->sched_type;
  44         const uint8_t cur_tt =
  45                 CNXK_TT_FROM_TAG(plt_read64(base + SSOW_LF_GWS_TAG));
  46
  47         /* CNXK model
  48          * cur_tt/new_tt     SSO_TT_ORDERED SSO_TT_ATOMIC SSO_TT_UNTAGGED
  49          *
  50          * SSO_TT_ORDERED        norm           norm             untag
  51          * SSO_TT_ATOMIC         norm           norm               untag
  52          * SSO_TT_UNTAGGED       norm           norm             NOOP
  53          */
  54
  55         if (new_tt == SSO_TT_UNTAGGED) {
  56                 if (cur_tt != SSO_TT_UNTAGGED)
  57                         cnxk_sso_hws_swtag_untag(base +
  58                                                  SSOW_LF_GWS_OP_SWTAG_UNTAG);
  59         } else {
  60                 cnxk_sso_hws_swtag_norm(tag, new_tt,
  61                                         base + SSOW_LF_GWS_OP_SWTAG_NORM);
  62         }
  63 }
  64
  65 static __rte_always_inline void
  66 cn9k_sso_hws_new_event_wait(struct cn9k_sso_hws *ws, const struct rte_event *ev)
  67 {
  68         const uint32_t tag = (uint32_t)ev->event;
  69         const uint8_t new_tt = ev->sched_type;
  70         const uint64_t event_ptr = ev->u64;
  71         const uint16_t grp = ev->queue_id;
  72
  73         while (ws->xaq_lmt <= __atomic_load_n(ws->fc_mem, __ATOMIC_RELAXED))
  74                 ;
  75
  76         cnxk_sso_hws_add_work(event_ptr, tag, new_tt,
  77                               ws->grp_base + (grp << 12));
  78 }
  79
  80 static __rte_always_inline void
  81 cn9k_sso_hws_forward_event(struct cn9k_sso_hws *ws, const struct rte_event *ev)
  82 {
  83         const uint8_t grp = ev->queue_id;
  84
  85         /* Group hasn't changed, Use SWTAG to forward the event */
  86         if (CNXK_GRP_FROM_TAG(plt_read64(ws->base + SSOW_LF_GWS_TAG)) == grp) {
  87                 cn9k_sso_hws_fwd_swtag(ws->base, ev);
  88                 ws->swtag_req = 1;
  89         } else {
  90                 /*
  91                  * Group has been changed for group based work pipelining,
  92                  * Use add_work operation to transfer the event to
  93                  * new group/core
  94                  */
  95                 rte_atomic_thread_fence(__ATOMIC_RELEASE);
  96                 roc_sso_hws_head_wait(ws->base);
  97                 cn9k_sso_hws_new_event_wait(ws, ev);
  98         }
  99 }
 100
 101 /* Dual ws ops. */
 102
 103 static __rte_always_inline uint8_t
 104 cn9k_sso_hws_dual_new_event(struct cn9k_sso_hws_dual *dws,
 105                             const struct rte_event *ev)
 106 {
 107         const uint32_t tag = (uint32_t)ev->event;
 108         const uint8_t new_tt = ev->sched_type;
 109         const uint64_t event_ptr = ev->u64;
 110         const uint16_t grp = ev->queue_id;
 111
 112         rte_atomic_thread_fence(__ATOMIC_ACQ_REL);
 113         if (dws->xaq_lmt <= *dws->fc_mem)
 114                 return 0;
 115
 116         cnxk_sso_hws_add_work(event_ptr, tag, new_tt,
 117                               dws->grp_base + (grp << 12));
 118         return 1;
 119 }
 120
 121 static __rte_always_inline void
 122 cn9k_sso_hws_dual_new_event_wait(struct cn9k_sso_hws_dual *dws,
 123                                  const struct rte_event *ev)
 124 {
 125         const uint32_t tag = (uint32_t)ev->event;
 126         const uint8_t new_tt = ev->sched_type;
 127         const uint64_t event_ptr = ev->u64;
 128         const uint16_t grp = ev->queue_id;
 129
 130         while (dws->xaq_lmt <= __atomic_load_n(dws->fc_mem, __ATOMIC_RELAXED))
 131                 ;
 132
 133         cnxk_sso_hws_add_work(event_ptr, tag, new_tt,
 134                               dws->grp_base + (grp << 12));
 135 }
 136
 137 static __rte_always_inline void
 138 cn9k_sso_hws_dual_forward_event(struct cn9k_sso_hws_dual *dws, uint64_t base,
 139                                 const struct rte_event *ev)
 140 {
 141         const uint8_t grp = ev->queue_id;
 142
 143         /* Group hasn't changed, Use SWTAG to forward the event */
 144         if (CNXK_GRP_FROM_TAG(plt_read64(base + SSOW_LF_GWS_TAG)) == grp) {
 145                 cn9k_sso_hws_fwd_swtag(base, ev);
 146                 dws->swtag_req = 1;
 147         } else {
 148                 /*
 149                  * Group has been changed for group based work pipelining,
 150                  * Use add_work operation to transfer the event to
 151                  * new group/core
 152                  */
 153                 rte_atomic_thread_fence(__ATOMIC_RELEASE);
 154                 roc_sso_hws_head_wait(base);
 155                 cn9k_sso_hws_dual_new_event_wait(dws, ev);
 156         }
 157 }
 158
 159 static __rte_always_inline void
 160 cn9k_wqe_to_mbuf(uint64_t wqe, const uint64_t mbuf, uint8_t port_id,
 161                  const uint32_t tag, const uint32_t flags,
 162                  const void *const lookup_mem)
 163 {
 164         const uint64_t mbuf_init = 0x100010000ULL | RTE_PKTMBUF_HEADROOM |
 165                                    (flags & NIX_RX_OFFLOAD_TSTAMP_F ? 8 : 0);
 166
 167         cn9k_nix_cqe_to_mbuf((struct nix_cqe_hdr_s *)wqe, tag,
 168                              (struct rte_mbuf *)mbuf, lookup_mem,
 169                              mbuf_init | ((uint64_t)port_id) << 48, flags);
 170 }
 171
 172 static __rte_always_inline void
 173 cn9k_sso_hws_post_process(uint64_t *u64, uint64_t mbuf, const uint32_t flags,
 174                           const void *const lookup_mem,
 175                           struct cnxk_timesync_info *tstamp)
 176 {
 177         uint64_t tstamp_ptr;
 178
 179         u64[0] = (u64[0] & (0x3ull << 32)) << 6 |
 180                  (u64[0] & (0x3FFull << 36)) << 4 | (u64[0] & 0xffffffff);
 181         if ((flags & CPT_RX_WQE_F) &&
 182             (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) == RTE_EVENT_TYPE_CRYPTODEV)) {
 183                 u64[1] = cn9k_cpt_crypto_adapter_dequeue(u64[1]);
 184         } else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) == RTE_EVENT_TYPE_ETHDEV) {
 185                 uint8_t port = CNXK_SUB_EVENT_FROM_TAG(u64[0]);
 186
 187                 u64[0] = CNXK_CLR_SUB_EVENT(u64[0]);
 188                 cn9k_wqe_to_mbuf(u64[1], mbuf, port, u64[0] & 0xFFFFF, flags,
 189                                  lookup_mem);
 190                 /* Extracting tstamp, if PTP enabled*/
 191                 tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)u64[1]) +
 192                                            CNXK_SSO_WQE_SG_PTR);
 193                 cn9k_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp,
 194                                         flags & NIX_RX_OFFLOAD_TSTAMP_F,
 195                                         (uint64_t *)tstamp_ptr);
 196                 u64[1] = mbuf;
 197         }
 198 }
 199
 200 static __rte_always_inline uint16_t
 201 cn9k_sso_hws_dual_get_work(uint64_t base, uint64_t pair_base,
 202                            struct rte_event *ev, const uint32_t flags,
 203                            struct cn9k_sso_hws_dual *dws)
 204 {
 205         union {
 206                 __uint128_t get_work;
 207                 uint64_t u64[2];
 208         } gw;
 209         uint64_t mbuf;
 210
 211         if (flags & NIX_RX_OFFLOAD_PTYPE_F)
 212                 rte_prefetch_non_temporal(dws->lookup_mem);
 213 #ifdef RTE_ARCH_ARM64
 214         asm volatile(PLT_CPU_FEATURE_PREAMBLE
 215                      "rty%=:                                    \n"
 216                      "          ldr %[tag], [%[tag_loc]]        \n"
 217                      "          ldr %[wqp], [%[wqp_loc]]        \n"
 218                      "          tbnz %[tag], 63, rty%=          \n"
 219                      "done%=:   str %[gw], [%[pong]]            \n"
 220                      "          dmb ld                          \n"
 221                      "          sub %[mbuf], %[wqp], #0x80      \n"
 222                      "          prfm pldl1keep, [%[mbuf]]       \n"
 223                      : [tag] "=&r"(gw.u64[0]), [wqp] "=&r"(gw.u64[1]),
 224                        [mbuf] "=&r"(mbuf)
 225                      : [tag_loc] "r"(base + SSOW_LF_GWS_TAG),
 226                        [wqp_loc] "r"(base + SSOW_LF_GWS_WQP), [gw] "r"(dws->gw_wdata),
 227                        [pong] "r"(pair_base + SSOW_LF_GWS_OP_GET_WORK0));
 228 #else
 229         gw.u64[0] = plt_read64(base + SSOW_LF_GWS_TAG);
 230         while ((BIT_ULL(63)) & gw.u64[0])
 231                 gw.u64[0] = plt_read64(base + SSOW_LF_GWS_TAG);
 232         gw.u64[1] = plt_read64(base + SSOW_LF_GWS_WQP);
 233         plt_write64(dws->gw_wdata, pair_base + SSOW_LF_GWS_OP_GET_WORK0);
 234         mbuf = (uint64_t)((char *)gw.u64[1] - sizeof(struct rte_mbuf));
 235 #endif
 236
 237         if (gw.u64[1])
 238                 cn9k_sso_hws_post_process(gw.u64, mbuf, flags, dws->lookup_mem,
 239                                           dws->tstamp);
 240
 241         ev->event = gw.u64[0];
 242         ev->u64 = gw.u64[1];
 243
 244         return !!gw.u64[1];
 245 }
 246
 247 static __rte_always_inline uint16_t
 248 cn9k_sso_hws_get_work(struct cn9k_sso_hws *ws, struct rte_event *ev,
 249                       const uint32_t flags, const void *const lookup_mem)
 250 {
 251         union {
 252                 __uint128_t get_work;
 253                 uint64_t u64[2];
 254         } gw;
 255         uint64_t mbuf;
 256
 257         plt_write64(ws->gw_wdata, ws->base + SSOW_LF_GWS_OP_GET_WORK0);
 258
 259         if (flags & NIX_RX_OFFLOAD_PTYPE_F)
 260                 rte_prefetch_non_temporal(lookup_mem);
 261 #ifdef RTE_ARCH_ARM64
 262         asm volatile(PLT_CPU_FEATURE_PREAMBLE
 263                      "          ldr %[tag], [%[tag_loc]]        \n"
 264                      "          ldr %[wqp], [%[wqp_loc]]        \n"
 265                      "          tbz %[tag], 63, done%=          \n"
 266                      "          sevl                            \n"
 267                      "rty%=:    wfe                             \n"
 268                      "          ldr %[tag], [%[tag_loc]]        \n"
 269                      "          ldr %[wqp], [%[wqp_loc]]        \n"
 270                      "          tbnz %[tag], 63, rty%=          \n"
 271                      "done%=:   dmb ld                          \n"
 272                      "          sub %[mbuf], %[wqp], #0x80      \n"
 273                      "          prfm pldl1keep, [%[mbuf]]       \n"
 274                      : [tag] "=&r"(gw.u64[0]), [wqp] "=&r"(gw.u64[1]),
 275                        [mbuf] "=&r"(mbuf)
 276                      : [tag_loc] "r"(ws->base + SSOW_LF_GWS_TAG),
 277                        [wqp_loc] "r"(ws->base + SSOW_LF_GWS_WQP));
 278 #else
 279         gw.u64[0] = plt_read64(ws->base + SSOW_LF_GWS_TAG);
 280         while ((BIT_ULL(63)) & gw.u64[0])
 281                 gw.u64[0] = plt_read64(ws->base + SSOW_LF_GWS_TAG);
 282
 283         gw.u64[1] = plt_read64(ws->base + SSOW_LF_GWS_WQP);
 284         mbuf = (uint64_t)((char *)gw.u64[1] - sizeof(struct rte_mbuf));
 285 #endif
 286
 287         if (gw.u64[1])
 288                 cn9k_sso_hws_post_process(gw.u64, mbuf, flags, lookup_mem,
 289                                           ws->tstamp);
 290
 291         ev->event = gw.u64[0];
 292         ev->u64 = gw.u64[1];
 293
 294         return !!gw.u64[1];
 295 }
 296
 297 /* Used in cleaning up workslot. */
 298 static __rte_always_inline uint16_t
 299 cn9k_sso_hws_get_work_empty(uint64_t base, struct rte_event *ev,
 300                             const uint32_t flags, void *lookup_mem,
 301                             struct cnxk_timesync_info *tstamp)
 302 {
 303         union {
 304                 __uint128_t get_work;
 305                 uint64_t u64[2];
 306         } gw;
 307         uint64_t mbuf;
 308
 309 #ifdef RTE_ARCH_ARM64
 310         asm volatile(PLT_CPU_FEATURE_PREAMBLE
 311                      "          ldr %[tag], [%[tag_loc]]        \n"
 312                      "          ldr %[wqp], [%[wqp_loc]]        \n"
 313                      "          tbz %[tag], 63, done%=          \n"
 314                      "          sevl                            \n"
 315                      "rty%=:    wfe                             \n"
 316                      "          ldr %[tag], [%[tag_loc]]        \n"
 317                      "          ldr %[wqp], [%[wqp_loc]]        \n"
 318                      "          tbnz %[tag], 63, rty%=          \n"
 319                      "done%=:   dmb ld                          \n"
 320                      "          sub %[mbuf], %[wqp], #0x80      \n"
 321                      : [tag] "=&r"(gw.u64[0]), [wqp] "=&r"(gw.u64[1]),
 322                        [mbuf] "=&r"(mbuf)
 323                      : [tag_loc] "r"(base + SSOW_LF_GWS_TAG),
 324                        [wqp_loc] "r"(base + SSOW_LF_GWS_WQP));
 325 #else
 326         gw.u64[0] = plt_read64(base + SSOW_LF_GWS_TAG);
 327         while ((BIT_ULL(63)) & gw.u64[0])
 328                 gw.u64[0] = plt_read64(base + SSOW_LF_GWS_TAG);
 329
 330         gw.u64[1] = plt_read64(base + SSOW_LF_GWS_WQP);
 331         mbuf = (uint64_t)((char *)gw.u64[1] - sizeof(struct rte_mbuf));
 332 #endif
 333
 334         if (gw.u64[1])
 335                 cn9k_sso_hws_post_process(gw.u64, mbuf, flags, lookup_mem,
 336                                           tstamp);
 337
 338         ev->event = gw.u64[0];
 339         ev->u64 = gw.u64[1];
 340
 341         return !!gw.u64[1];
 342 }
 343
 344 /* CN9K Fastpath functions. */
 345 uint16_t __rte_hot cn9k_sso_hws_enq(void *port, const struct rte_event *ev);
 346 uint16_t __rte_hot cn9k_sso_hws_enq_burst(void *port,
 347                                           const struct rte_event ev[],
 348                                           uint16_t nb_events);
 349 uint16_t __rte_hot cn9k_sso_hws_enq_new_burst(void *port,
 350                                               const struct rte_event ev[],
 351                                               uint16_t nb_events);
 352 uint16_t __rte_hot cn9k_sso_hws_enq_fwd_burst(void *port,
 353                                               const struct rte_event ev[],
 354                                               uint16_t nb_events);
 355
 356 uint16_t __rte_hot cn9k_sso_hws_dual_enq(void *port,
 357                                          const struct rte_event *ev);
 358 uint16_t __rte_hot cn9k_sso_hws_dual_enq_burst(void *port,
 359                                                const struct rte_event ev[],
 360                                                uint16_t nb_events);
 361 uint16_t __rte_hot cn9k_sso_hws_dual_enq_new_burst(void *port,
 362                                                    const struct rte_event ev[],
 363                                                    uint16_t nb_events);
 364 uint16_t __rte_hot cn9k_sso_hws_dual_enq_fwd_burst(void *port,
 365                                                    const struct rte_event ev[],
 366                                                    uint16_t nb_events);
 367 uint16_t __rte_hot cn9k_sso_hws_ca_enq(void *port, struct rte_event ev[],
 368                                        uint16_t nb_events);
 369 uint16_t __rte_hot cn9k_sso_hws_dual_ca_enq(void *port, struct rte_event ev[],
 370                                             uint16_t nb_events);
 371
 372 #define R(name, flags)                                                         \
 373         uint16_t __rte_hot cn9k_sso_hws_deq_##name(                            \
 374                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 375         uint16_t __rte_hot cn9k_sso_hws_deq_burst_##name(                      \
 376                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 377                 uint64_t timeout_ticks);                                       \
 378         uint16_t __rte_hot cn9k_sso_hws_deq_tmo_##name(                        \
 379                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 380         uint16_t __rte_hot cn9k_sso_hws_deq_tmo_burst_##name(                  \
 381                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 382                 uint64_t timeout_ticks);                                       \
 383         uint16_t __rte_hot cn9k_sso_hws_deq_ca_##name(                         \
 384                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 385         uint16_t __rte_hot cn9k_sso_hws_deq_ca_burst_##name(                   \
 386                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 387                 uint64_t timeout_ticks);                                       \
 388         uint16_t __rte_hot cn9k_sso_hws_deq_tmo_ca_##name(                     \
 389                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 390         uint16_t __rte_hot cn9k_sso_hws_deq_tmo_ca_burst_##name(               \
 391                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 392                 uint64_t timeout_ticks);                                       \
 393         uint16_t __rte_hot cn9k_sso_hws_deq_seg_##name(                        \
 394                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 395         uint16_t __rte_hot cn9k_sso_hws_deq_seg_burst_##name(                  \
 396                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 397                 uint64_t timeout_ticks);                                       \
 398         uint16_t __rte_hot cn9k_sso_hws_deq_tmo_seg_##name(                    \
 399                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 400         uint16_t __rte_hot cn9k_sso_hws_deq_tmo_seg_burst_##name(              \
 401                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 402                 uint64_t timeout_ticks);                                       \
 403         uint16_t __rte_hot cn9k_sso_hws_deq_ca_seg_##name(                     \
 404                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 405         uint16_t __rte_hot cn9k_sso_hws_deq_ca_seg_burst_##name(               \
 406                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 407                 uint64_t timeout_ticks);                                       \
 408         uint16_t __rte_hot cn9k_sso_hws_deq_tmo_ca_seg_##name(                 \
 409                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 410         uint16_t __rte_hot cn9k_sso_hws_deq_tmo_ca_seg_burst_##name(           \
 411                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 412                 uint64_t timeout_ticks);
 413
 414 NIX_RX_FASTPATH_MODES
 415 #undef R
 416
 417 #define SSO_DEQ(fn, flags)                                                     \
 418         uint16_t __rte_hot fn(void *port, struct rte_event *ev,                \
 419                               uint64_t timeout_ticks)                          \
 420         {                                                                      \
 421                 struct cn9k_sso_hws *ws = port;                                \
 422                 RTE_SET_USED(timeout_ticks);                                   \
 423                 if (ws->swtag_req) {                                           \
 424                         ws->swtag_req = 0;                                     \
 425                         cnxk_sso_hws_swtag_wait(ws->base + SSOW_LF_GWS_TAG);   \
 426                         return 1;                                              \
 427                 }                                                              \
 428                 return cn9k_sso_hws_get_work(ws, ev, flags, ws->lookup_mem);   \
 429         }
 430
 431 #define SSO_DEQ_SEG(fn, flags)    SSO_DEQ(fn, flags | NIX_RX_MULTI_SEG_F)
 432 #define SSO_DEQ_CA(fn, flags)     SSO_DEQ(fn, flags | CPT_RX_WQE_F)
 433 #define SSO_DEQ_CA_SEG(fn, flags) SSO_DEQ_SEG(fn, flags | CPT_RX_WQE_F)
 434
 435 #define SSO_DEQ_TMO(fn, flags)                                                 \
 436         uint16_t __rte_hot fn(void *port, struct rte_event *ev,                \
 437                               uint64_t timeout_ticks)                          \
 438         {                                                                      \
 439                 struct cn9k_sso_hws *ws = port;                                \
 440                 uint16_t ret = 1;                                              \
 441                 uint64_t iter;                                                 \
 442                 if (ws->swtag_req) {                                           \
 443                         ws->swtag_req = 0;                                     \
 444                         cnxk_sso_hws_swtag_wait(ws->base + SSOW_LF_GWS_TAG);   \
 445                         return ret;                                            \
 446                 }                                                              \
 447                 ret = cn9k_sso_hws_get_work(ws, ev, flags, ws->lookup_mem);    \
 448                 for (iter = 1; iter < timeout_ticks && (ret == 0); iter++)     \
 449                         ret = cn9k_sso_hws_get_work(ws, ev, flags,             \
 450                                                     ws->lookup_mem);           \
 451                 return ret;                                                    \
 452         }
 453
 454 #define SSO_DEQ_TMO_SEG(fn, flags)    SSO_DEQ_TMO(fn, flags | NIX_RX_MULTI_SEG_F)
 455 #define SSO_DEQ_TMO_CA(fn, flags)     SSO_DEQ_TMO(fn, flags | CPT_RX_WQE_F)
 456 #define SSO_DEQ_TMO_CA_SEG(fn, flags) SSO_DEQ_TMO_SEG(fn, flags | CPT_RX_WQE_F)
 457
 458 #define R(name, flags)                                                         \
 459         uint16_t __rte_hot cn9k_sso_hws_dual_deq_##name(                       \
 460                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 461         uint16_t __rte_hot cn9k_sso_hws_dual_deq_burst_##name(                 \
 462                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 463                 uint64_t timeout_ticks);                                       \
 464         uint16_t __rte_hot cn9k_sso_hws_dual_deq_tmo_##name(                   \
 465                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 466         uint16_t __rte_hot cn9k_sso_hws_dual_deq_tmo_burst_##name(             \
 467                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 468                 uint64_t timeout_ticks);                                       \
 469         uint16_t __rte_hot cn9k_sso_hws_dual_deq_ca_##name(                    \
 470                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 471         uint16_t __rte_hot cn9k_sso_hws_dual_deq_ca_burst_##name(              \
 472                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 473                 uint64_t timeout_ticks);                                       \
 474         uint16_t __rte_hot cn9k_sso_hws_dual_deq_tmo_ca_##name(                \
 475                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 476         uint16_t __rte_hot cn9k_sso_hws_dual_deq_tmo_ca_burst_##name(          \
 477                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 478                 uint64_t timeout_ticks);                                       \
 479         uint16_t __rte_hot cn9k_sso_hws_dual_deq_seg_##name(                   \
 480                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 481         uint16_t __rte_hot cn9k_sso_hws_dual_deq_seg_burst_##name(             \
 482                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 483                 uint64_t timeout_ticks);                                       \
 484         uint16_t __rte_hot cn9k_sso_hws_dual_deq_tmo_seg_##name(               \
 485                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 486         uint16_t __rte_hot cn9k_sso_hws_dual_deq_tmo_seg_burst_##name(         \
 487                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 488                 uint64_t timeout_ticks);                                       \
 489         uint16_t __rte_hot cn9k_sso_hws_dual_deq_ca_seg_##name(                \
 490                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 491         uint16_t __rte_hot cn9k_sso_hws_dual_deq_ca_seg_burst_##name(          \
 492                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 493                 uint64_t timeout_ticks);                                       \
 494         uint16_t __rte_hot cn9k_sso_hws_dual_deq_tmo_ca_seg_##name(            \
 495                 void *port, struct rte_event *ev, uint64_t timeout_ticks);     \
 496         uint16_t __rte_hot cn9k_sso_hws_dual_deq_tmo_ca_seg_burst_##name(      \
 497                 void *port, struct rte_event ev[], uint16_t nb_events,         \
 498                 uint64_t timeout_ticks);
 499
 500 NIX_RX_FASTPATH_MODES
 501 #undef R
 502
 503 #define SSO_DUAL_DEQ(fn, flags)                                                \
 504         uint16_t __rte_hot fn(void *port, struct rte_event *ev,                \
 505                               uint64_t timeout_ticks)                          \
 506         {                                                                      \
 507                 struct cn9k_sso_hws_dual *dws = port;                          \
 508                 uint16_t gw;                                                   \
 509                 RTE_SET_USED(timeout_ticks);                                   \
 510                 if (dws->swtag_req) {                                          \
 511                         dws->swtag_req = 0;                                    \
 512                         cnxk_sso_hws_swtag_wait(dws->base[!dws->vws] +         \
 513                                                 SSOW_LF_GWS_TAG);              \
 514                         return 1;                                              \
 515                 }                                                              \
 516                 gw = cn9k_sso_hws_dual_get_work(dws->base[dws->vws],           \
 517                                                 dws->base[!dws->vws], ev,      \
 518                                                 flags, dws);                   \
 519                 dws->vws = !dws->vws;                                          \
 520                 return gw;                                                     \
 521         }
 522
 523 #define SSO_DUAL_DEQ_SEG(fn, flags) SSO_DUAL_DEQ(fn, flags | NIX_RX_MULTI_SEG_F)
 524 #define SSO_DUAL_DEQ_CA(fn, flags)  SSO_DUAL_DEQ(fn, flags | CPT_RX_WQE_F)
 525 #define SSO_DUAL_DEQ_CA_SEG(fn, flags)                                         \
 526         SSO_DUAL_DEQ_SEG(fn, flags | CPT_RX_WQE_F)
 527
 528 #define SSO_DUAL_DEQ_TMO(fn, flags)                                            \
 529         uint16_t __rte_hot fn(void *port, struct rte_event *ev,                \
 530                               uint64_t timeout_ticks)                          \
 531         {                                                                      \
 532                 struct cn9k_sso_hws_dual *dws = port;                          \
 533                 uint16_t ret = 1;                                              \
 534                 uint64_t iter;                                                 \
 535                 if (dws->swtag_req) {                                          \
 536                         dws->swtag_req = 0;                                    \
 537                         cnxk_sso_hws_swtag_wait(dws->base[!dws->vws] +         \
 538                                                 SSOW_LF_GWS_TAG);              \
 539                         return ret;                                            \
 540                 }                                                              \
 541                 ret = cn9k_sso_hws_dual_get_work(dws->base[dws->vws],          \
 542                                                  dws->base[!dws->vws], ev,     \
 543                                                  flags, dws);                  \
 544                 dws->vws = !dws->vws;                                          \
 545                 for (iter = 1; iter < timeout_ticks && (ret == 0); iter++) {   \
 546                         ret = cn9k_sso_hws_dual_get_work(dws->base[dws->vws],  \
 547                                                          dws->base[!dws->vws], \
 548                                                          ev, flags, dws);      \
 549                         dws->vws = !dws->vws;                                  \
 550                 }                                                              \
 551                 return ret;                                                    \
 552         }
 553
 554 #define SSO_DUAL_DEQ_TMO_SEG(fn, flags)                                        \
 555         SSO_DUAL_DEQ_TMO(fn, flags | NIX_RX_MULTI_SEG_F)
 556 #define SSO_DUAL_DEQ_TMO_CA(fn, flags)                                         \
 557         SSO_DUAL_DEQ_TMO(fn, flags | CPT_RX_WQE_F)
 558 #define SSO_DUAL_DEQ_TMO_CA_SEG(fn, flags)                                     \
 559         SSO_DUAL_DEQ_TMO_SEG(fn, flags | CPT_RX_WQE_F)
 560
 561 #define SSO_CMN_DEQ_BURST(fnb, fn, flags)                                      \
 562         uint16_t __rte_hot fnb(void *port, struct rte_event ev[],              \
 563                                uint16_t nb_events, uint64_t timeout_ticks)     \
 564         {                                                                      \
 565                 RTE_SET_USED(nb_events);                                       \
 566                 return fn(port, ev, timeout_ticks);                            \
 567         }
 568
 569 #define SSO_CMN_DEQ_SEG_BURST(fnb, fn, flags)                                  \
 570         uint16_t __rte_hot fnb(void *port, struct rte_event ev[],              \
 571                                uint16_t nb_events, uint64_t timeout_ticks)     \
 572         {                                                                      \
 573                 RTE_SET_USED(nb_events);                                       \
 574                 return fn(port, ev, timeout_ticks);                            \
 575         }
 576
 577 static __rte_always_inline void
 578 cn9k_sso_txq_fc_wait(const struct cn9k_eth_txq *txq)
 579 {
 580         while ((uint64_t)txq->nb_sqb_bufs_adj <=
 581                __atomic_load_n(txq->fc_mem, __ATOMIC_RELAXED))
 582                 ;
 583 }
 584
 585 static __rte_always_inline struct cn9k_eth_txq *
 586 cn9k_sso_hws_xtract_meta(struct rte_mbuf *m, uint64_t *txq_data)
 587 {
 588         return (struct cn9k_eth_txq
 589                         *)(txq_data[(txq_data[m->port] >> 48) +
 590                                     rte_event_eth_tx_adapter_txq_get(m)] &
 591                            (BIT_ULL(48) - 1));
 592 }
 593
 594 #if defined(RTE_ARCH_ARM64)
 595
 596 static __rte_always_inline void
 597 cn9k_sso_hws_xmit_sec_one(const struct cn9k_eth_txq *txq, uint64_t base,
 598                           struct rte_mbuf *m, uint64_t *cmd,
 599                           uint32_t flags)
 600 {
 601         struct cn9k_outb_priv_data *outb_priv;
 602         rte_iova_t io_addr = txq->cpt_io_addr;
 603         uint64_t *lmt_addr = txq->lmt_addr;
 604         struct cn9k_sec_sess_priv mdata;
 605         struct nix_send_hdr_s *send_hdr;
 606         uint64_t sa_base = txq->sa_base;
 607         uint32_t pkt_len, dlen_adj, rlen;
 608         uint64x2_t cmd01, cmd23;
 609         uint64_t lmt_status, sa;
 610         union nix_send_sg_s *sg;
 611         uintptr_t dptr, nixtx;
 612         uint64_t ucode_cmd[4];
 613         uint64_t esn, *iv;
 614         uint8_t l2_len;
 615
 616         mdata.u64 = *rte_security_dynfield(m);
 617         send_hdr = (struct nix_send_hdr_s *)cmd;
 618         if (flags & NIX_TX_NEED_EXT_HDR)
 619                 sg = (union nix_send_sg_s *)&cmd[4];
 620         else
 621                 sg = (union nix_send_sg_s *)&cmd[2];
 622
 623         if (flags & NIX_TX_NEED_SEND_HDR_W1)
 624                 l2_len = cmd[1] & 0xFF;
 625         else
 626                 l2_len = m->l2_len;
 627
 628         /* Retrieve DPTR */
 629         dptr = *(uint64_t *)(sg + 1);
 630         pkt_len = send_hdr->w0.total;
 631
 632         /* Calculate rlen */
 633         rlen = pkt_len - l2_len;
 634         rlen = (rlen + mdata.roundup_len) + (mdata.roundup_byte - 1);
 635         rlen &= ~(uint64_t)(mdata.roundup_byte - 1);
 636         rlen += mdata.partial_len;
 637         dlen_adj = rlen - pkt_len + l2_len;
 638
 639         /* Update send descriptors. Security is single segment only */
 640         send_hdr->w0.total = pkt_len + dlen_adj;
 641         sg->seg1_size = pkt_len + dlen_adj;
 642
 643         /* Get area where NIX descriptor needs to be stored */
 644         nixtx = dptr + pkt_len + dlen_adj;
 645         nixtx += BIT_ULL(7);
 646         nixtx = (nixtx - 1) & ~(BIT_ULL(7) - 1);
 647
 648         roc_lmt_mov_nv((void *)(nixtx + 16), cmd, cn9k_nix_tx_ext_subs(flags));
 649
 650         /* Load opcode and cptr already prepared at pkt metadata set */
 651         pkt_len -= l2_len;
 652         pkt_len += sizeof(struct roc_onf_ipsec_outb_hdr) +
 653                     ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ;
 654         sa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);
 655
 656         sa = (uintptr_t)roc_nix_inl_onf_ipsec_outb_sa(sa_base, mdata.sa_idx);
 657         ucode_cmd[3] = (ROC_CPT_DFLT_ENG_GRP_SE_IE << 61 | sa);
 658         ucode_cmd[0] = (ROC_IE_ONF_MAJOR_OP_PROCESS_OUTBOUND_IPSEC << 48 |
 659                         0x40UL << 48 | pkt_len);
 660
 661         /* CPT Word 0 and Word 1 */
 662         cmd01 = vdupq_n_u64((nixtx + 16) | (cn9k_nix_tx_ext_subs(flags) + 1));
 663         /* CPT_RES_S is 16B above NIXTX */
 664         cmd01 = vsetq_lane_u8(nixtx & BIT_ULL(7), cmd01, 8);
 665
 666         /* CPT word 2 and 3 */
 667         cmd23 = vdupq_n_u64(0);
 668         cmd23 = vsetq_lane_u64((((uint64_t)RTE_EVENT_TYPE_CPU << 28) |
 669                                 CNXK_ETHDEV_SEC_OUTB_EV_SUB << 20), cmd23, 0);
 670         cmd23 = vsetq_lane_u64((uintptr_t)m | 1, cmd23, 1);
 671
 672         dptr += l2_len - ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ -
 673                 sizeof(struct roc_onf_ipsec_outb_hdr);
 674         ucode_cmd[1] = dptr;
 675         ucode_cmd[2] = dptr;
 676
 677         /* Update IV to zero and l2 sz */
 678         *(uint16_t *)(dptr + sizeof(struct roc_onf_ipsec_outb_hdr)) =
 679                 rte_cpu_to_be_16(ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ);
 680         iv = (uint64_t *)(dptr + 8);
 681         iv[0] = 0;
 682         iv[1] = 0;
 683
 684         /* Head wait if needed */
 685         if (base)
 686                 roc_sso_hws_head_wait(base);
 687
 688         /* ESN */
 689         outb_priv = roc_nix_inl_onf_ipsec_outb_sa_sw_rsvd((void *)sa);
 690         esn = outb_priv->esn;
 691         outb_priv->esn = esn + 1;
 692
 693         ucode_cmd[0] |= (esn >> 32) << 16;
 694         esn = rte_cpu_to_be_32(esn & (BIT_ULL(32) - 1));
 695
 696         /* Update ESN and IPID and IV */
 697         *(uint64_t *)dptr = esn << 32 | esn;
 698
 699         rte_io_wmb();
 700         cn9k_sso_txq_fc_wait(txq);
 701
 702         /* Write CPT instruction to lmt line */
 703         vst1q_u64(lmt_addr, cmd01);
 704         vst1q_u64(lmt_addr + 2, cmd23);
 705
 706         roc_lmt_mov_seg(lmt_addr + 4, ucode_cmd, 2);
 707
 708         if (roc_lmt_submit_ldeor(io_addr) == 0) {
 709                 do {
 710                         vst1q_u64(lmt_addr, cmd01);
 711                         vst1q_u64(lmt_addr + 2, cmd23);
 712                         roc_lmt_mov_seg(lmt_addr + 4, ucode_cmd, 2);
 713
 714                         lmt_status = roc_lmt_submit_ldeor(io_addr);
 715                 } while (lmt_status == 0);
 716         }
 717 }
 718 #else
 719
 720 static inline void
 721 cn9k_sso_hws_xmit_sec_one(const struct cn9k_eth_txq *txq, uint64_t base,
 722                           struct rte_mbuf *m, uint64_t *cmd,
 723                           uint32_t flags)
 724 {
 725         RTE_SET_USED(txq);
 726         RTE_SET_USED(base);
 727         RTE_SET_USED(m);
 728         RTE_SET_USED(cmd);
 729         RTE_SET_USED(flags);
 730 }
 731 #endif
 732
 733 static __rte_always_inline uint16_t
 734 cn9k_sso_hws_event_tx(uint64_t base, struct rte_event *ev, uint64_t *cmd,
 735                       uint64_t *txq_data, const uint32_t flags)
 736 {
 737         struct rte_mbuf *m = ev->mbuf;
 738         uint16_t ref_cnt = m->refcnt;
 739         struct cn9k_eth_txq *txq;
 740
 741         /* Perform header writes before barrier for TSO */
 742         cn9k_nix_xmit_prepare_tso(m, flags);
 743         /* Lets commit any changes in the packet here in case when
 744          * fast free is set as no further changes will be made to mbuf.
 745          * In case of fast free is not set, both cn9k_nix_prepare_mseg()
 746          * and cn9k_nix_xmit_prepare() has a barrier after refcnt update.
 747          */
 748         if (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) &&
 749             !(flags & NIX_TX_OFFLOAD_SECURITY_F))
 750                 rte_io_wmb();
 751         txq = cn9k_sso_hws_xtract_meta(m, txq_data);
 752         cn9k_nix_tx_skeleton(txq, cmd, flags, 0);
 753         cn9k_nix_xmit_prepare(m, cmd, flags, txq->lso_tun_fmt, txq->mark_flag,
 754                               txq->mark_fmt);
 755
 756         if (flags & NIX_TX_OFFLOAD_SECURITY_F) {
 757                 uint64_t ol_flags = m->ol_flags;
 758
 759                 if (ol_flags & RTE_MBUF_F_TX_SEC_OFFLOAD) {
 760                         uintptr_t ssow_base = base;
 761
 762                         if (ev->sched_type)
 763                                 ssow_base = 0;
 764
 765                         cn9k_sso_hws_xmit_sec_one(txq, ssow_base, m, cmd,
 766                                                   flags);
 767                         goto done;
 768                 }
 769
 770                 if (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F))
 771                         rte_io_wmb();
 772         }
 773
 774         if (flags & NIX_TX_MULTI_SEG_F) {
 775                 const uint16_t segdw = cn9k_nix_prepare_mseg(m, cmd, flags);
 776                 cn9k_nix_xmit_prepare_tstamp(txq, cmd, m->ol_flags, segdw,
 777                                              flags);
 778                 if (!CNXK_TT_FROM_EVENT(ev->event)) {
 779                         cn9k_nix_xmit_mseg_prep_lmt(cmd, txq->lmt_addr, segdw);
 780                         roc_sso_hws_head_wait(base);
 781                         cn9k_sso_txq_fc_wait(txq);
 782                         if (cn9k_nix_xmit_submit_lmt(txq->io_addr) == 0)
 783                                 cn9k_nix_xmit_mseg_one(cmd, txq->lmt_addr,
 784                                                        txq->io_addr, segdw);
 785                 } else {
 786                         cn9k_nix_xmit_mseg_one(cmd, txq->lmt_addr, txq->io_addr,
 787                                                segdw);
 788                 }
 789         } else {
 790                 cn9k_nix_xmit_prepare_tstamp(txq, cmd, m->ol_flags, 4, flags);
 791                 if (!CNXK_TT_FROM_EVENT(ev->event)) {
 792                         cn9k_nix_xmit_prep_lmt(cmd, txq->lmt_addr, flags);
 793                         roc_sso_hws_head_wait(base);
 794                         cn9k_sso_txq_fc_wait(txq);
 795                         if (cn9k_nix_xmit_submit_lmt(txq->io_addr) == 0)
 796                                 cn9k_nix_xmit_one(cmd, txq->lmt_addr,
 797                                                   txq->io_addr, flags);
 798                 } else {
 799                         cn9k_nix_xmit_one(cmd, txq->lmt_addr, txq->io_addr,
 800                                           flags);
 801                 }
 802         }
 803
 804 done:
 805         if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) {
 806                 if (ref_cnt > 1)
 807                         return 1;
 808         }
 809
 810         cnxk_sso_hws_swtag_flush(base);
 811
 812         return 1;
 813 }
 814
 815 #define T(name, sz, flags)                                                     \
 816         uint16_t __rte_hot cn9k_sso_hws_tx_adptr_enq_##name(                   \
 817                 void *port, struct rte_event ev[], uint16_t nb_events);        \
 818         uint16_t __rte_hot cn9k_sso_hws_tx_adptr_enq_seg_##name(               \
 819                 void *port, struct rte_event ev[], uint16_t nb_events);        \
 820         uint16_t __rte_hot cn9k_sso_hws_dual_tx_adptr_enq_##name(              \
 821                 void *port, struct rte_event ev[], uint16_t nb_events);        \
 822         uint16_t __rte_hot cn9k_sso_hws_dual_tx_adptr_enq_seg_##name(          \
 823                 void *port, struct rte_event ev[], uint16_t nb_events);
 824
 825 NIX_TX_FASTPATH_MODES
 826 #undef T
 827
 828 #define SSO_TX(fn, sz, flags)                                                  \
 829         uint16_t __rte_hot fn(void *port, struct rte_event ev[],               \
 830                               uint16_t nb_events)                              \
 831         {                                                                      \
 832                 struct cn9k_sso_hws *ws = port;                                \
 833                 uint64_t cmd[sz];                                              \
 834                 RTE_SET_USED(nb_events);                                       \
 835                 return cn9k_sso_hws_event_tx(ws->base, &ev[0], cmd,            \
 836                                              (uint64_t *)ws->tx_adptr_data,    \
 837                                              flags);                           \
 838         }
 839
 840 #define SSO_TX_SEG(fn, sz, flags)                                              \
 841         uint16_t __rte_hot fn(void *port, struct rte_event ev[],               \
 842                               uint16_t nb_events)                              \
 843         {                                                                      \
 844                 uint64_t cmd[(sz) + CNXK_NIX_TX_MSEG_SG_DWORDS - 2];           \
 845                 struct cn9k_sso_hws *ws = port;                                \
 846                 RTE_SET_USED(nb_events);                                       \
 847                 return cn9k_sso_hws_event_tx(ws->base, &ev[0], cmd,            \
 848                                              (uint64_t *)ws->tx_adptr_data,    \
 849                                              (flags) | NIX_TX_MULTI_SEG_F);    \
 850         }
 851
 852 #define SSO_DUAL_TX(fn, sz, flags)                                             \
 853         uint16_t __rte_hot fn(void *port, struct rte_event ev[],               \
 854                               uint16_t nb_events)                              \
 855         {                                                                      \
 856                 struct cn9k_sso_hws_dual *ws = port;                           \
 857                 uint64_t cmd[sz];                                              \
 858                 RTE_SET_USED(nb_events);                                       \
 859                 return cn9k_sso_hws_event_tx(ws->base[!ws->vws], &ev[0], cmd,  \
 860                                              (uint64_t *)ws->tx_adptr_data,    \
 861                                              flags);                           \
 862         }
 863
 864 #define SSO_DUAL_TX_SEG(fn, sz, flags)                                         \
 865         uint16_t __rte_hot fn(void *port, struct rte_event ev[],               \
 866                               uint16_t nb_events)                              \
 867         {                                                                      \
 868                 uint64_t cmd[(sz) + CNXK_NIX_TX_MSEG_SG_DWORDS - 2];           \
 869                 struct cn9k_sso_hws_dual *ws = port;                           \
 870                 RTE_SET_USED(nb_events);                                       \
 871                 return cn9k_sso_hws_event_tx(ws->base[!ws->vws], &ev[0], cmd,  \
 872                                              (uint64_t *)ws->tx_adptr_data,    \
 873                                              (flags) | NIX_TX_MULTI_SEG_F);    \
 874         }
 875
 876 #endif