drivers/event/cnxk/cnxk_eventdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #include "cnxk_eventdev.h"
   6
   7 void
   8 cnxk_sso_info_get(struct cnxk_sso_evdev *dev,
   9                   struct rte_event_dev_info *dev_info)
  10 {
  11
  12         dev_info->min_dequeue_timeout_ns = dev->min_dequeue_timeout_ns;
  13         dev_info->max_dequeue_timeout_ns = dev->max_dequeue_timeout_ns;
  14         dev_info->max_event_queues = dev->max_event_queues;
  15         dev_info->max_event_queue_flows = (1ULL << 20);
  16         dev_info->max_event_queue_priority_levels = 8;
  17         dev_info->max_event_priority_levels = 1;
  18         dev_info->max_event_ports = dev->max_event_ports;
  19         dev_info->max_event_port_dequeue_depth = 1;
  20         dev_info->max_event_port_enqueue_depth = 1;
  21         dev_info->max_num_events = dev->max_num_events;
  22         dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS |
  23                                   RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
  24                                   RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES |
  25                                   RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK |
  26                                   RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |
  27                                   RTE_EVENT_DEV_CAP_NONSEQ_MODE |
  28                                   RTE_EVENT_DEV_CAP_CARRY_FLOW_ID;
  29 }
  30
  31 int
  32 cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev)
  33 {
  34         char pool_name[RTE_MEMZONE_NAMESIZE];
  35         uint32_t xaq_cnt, npa_aura_id;
  36         const struct rte_memzone *mz;
  37         struct npa_aura_s *aura;
  38         static int reconfig_cnt;
  39         int rc;
  40
  41         if (dev->xaq_pool) {
  42                 rc = roc_sso_hwgrp_release_xaq(&dev->sso, dev->nb_event_queues);
  43                 if (rc < 0) {
  44                         plt_err("Failed to release XAQ %d", rc);
  45                         return rc;
  46                 }
  47                 rte_mempool_free(dev->xaq_pool);
  48                 dev->xaq_pool = NULL;
  49         }
  50
  51         /*
  52          * Allocate memory for Add work backpressure.
  53          */
  54         mz = rte_memzone_lookup(CNXK_SSO_FC_NAME);
  55         if (mz == NULL)
  56                 mz = rte_memzone_reserve_aligned(CNXK_SSO_FC_NAME,
  57                                                  sizeof(struct npa_aura_s) +
  58                                                          RTE_CACHE_LINE_SIZE,
  59                                                  0, 0, RTE_CACHE_LINE_SIZE);
  60         if (mz == NULL) {
  61                 plt_err("Failed to allocate mem for fcmem");
  62                 return -ENOMEM;
  63         }
  64
  65         dev->fc_iova = mz->iova;
  66         dev->fc_mem = mz->addr;
  67
  68         aura = (struct npa_aura_s *)((uintptr_t)dev->fc_mem +
  69                                      RTE_CACHE_LINE_SIZE);
  70         memset(aura, 0, sizeof(struct npa_aura_s));
  71
  72         aura->fc_ena = 1;
  73         aura->fc_addr = dev->fc_iova;
  74         aura->fc_hyst_bits = 0; /* Store count on all updates */
  75
  76         /* Taken from HRM 14.3.3(4) */
  77         xaq_cnt = dev->nb_event_queues * CNXK_SSO_XAQ_CACHE_CNT;
  78         if (dev->xae_cnt)
  79                 xaq_cnt += dev->xae_cnt / dev->sso.xae_waes;
  80         else
  81                 xaq_cnt += (dev->sso.iue / dev->sso.xae_waes) +
  82                            (CNXK_SSO_XAQ_SLACK * dev->nb_event_queues);
  83
  84         plt_sso_dbg("Configuring %d xaq buffers", xaq_cnt);
  85         /* Setup XAQ based on number of nb queues. */
  86         snprintf(pool_name, 30, "cnxk_xaq_buf_pool_%d", reconfig_cnt);
  87         dev->xaq_pool = (void *)rte_mempool_create_empty(
  88                 pool_name, xaq_cnt, dev->sso.xaq_buf_size, 0, 0,
  89                 rte_socket_id(), 0);
  90
  91         if (dev->xaq_pool == NULL) {
  92                 plt_err("Unable to create empty mempool.");
  93                 rte_memzone_free(mz);
  94                 return -ENOMEM;
  95         }
  96
  97         rc = rte_mempool_set_ops_byname(dev->xaq_pool,
  98                                         rte_mbuf_platform_mempool_ops(), aura);
  99         if (rc != 0) {
 100                 plt_err("Unable to set xaqpool ops.");
 101                 goto alloc_fail;
 102         }
 103
 104         rc = rte_mempool_populate_default(dev->xaq_pool);
 105         if (rc < 0) {
 106                 plt_err("Unable to set populate xaqpool.");
 107                 goto alloc_fail;
 108         }
 109         reconfig_cnt++;
 110         /* When SW does addwork (enqueue) check if there is space in XAQ by
 111          * comparing fc_addr above against the xaq_lmt calculated below.
 112          * There should be a minimum headroom (CNXK_SSO_XAQ_SLACK / 2) for SSO
 113          * to request XAQ to cache them even before enqueue is called.
 114          */
 115         dev->xaq_lmt =
 116                 xaq_cnt - (CNXK_SSO_XAQ_SLACK / 2 * dev->nb_event_queues);
 117         dev->nb_xaq_cfg = xaq_cnt;
 118
 119         npa_aura_id = roc_npa_aura_handle_to_aura(dev->xaq_pool->pool_id);
 120         return roc_sso_hwgrp_alloc_xaq(&dev->sso, npa_aura_id,
 121                                        dev->nb_event_queues);
 122 alloc_fail:
 123         rte_mempool_free(dev->xaq_pool);
 124         rte_memzone_free(mz);
 125         return rc;
 126 }
 127
 128 int
 129 cnxk_sso_dev_validate(const struct rte_eventdev *event_dev)
 130 {
 131         struct rte_event_dev_config *conf = &event_dev->data->dev_conf;
 132         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
 133         uint32_t deq_tmo_ns;
 134         int rc;
 135
 136         deq_tmo_ns = conf->dequeue_timeout_ns;
 137
 138         if (deq_tmo_ns == 0)
 139                 deq_tmo_ns = dev->min_dequeue_timeout_ns;
 140         if (deq_tmo_ns < dev->min_dequeue_timeout_ns ||
 141             deq_tmo_ns > dev->max_dequeue_timeout_ns) {
 142                 plt_err("Unsupported dequeue timeout requested");
 143                 return -EINVAL;
 144         }
 145
 146         if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT)
 147                 dev->is_timeout_deq = 1;
 148
 149         dev->deq_tmo_ns = deq_tmo_ns;
 150
 151         if (!conf->nb_event_queues || !conf->nb_event_ports ||
 152             conf->nb_event_ports > dev->max_event_ports ||
 153             conf->nb_event_queues > dev->max_event_queues) {
 154                 plt_err("Unsupported event queues/ports requested");
 155                 return -EINVAL;
 156         }
 157
 158         if (conf->nb_event_port_dequeue_depth > 1) {
 159                 plt_err("Unsupported event port deq depth requested");
 160                 return -EINVAL;
 161         }
 162
 163         if (conf->nb_event_port_enqueue_depth > 1) {
 164                 plt_err("Unsupported event port enq depth requested");
 165                 return -EINVAL;
 166         }
 167
 168         if (dev->xaq_pool) {
 169                 rc = roc_sso_hwgrp_release_xaq(&dev->sso, dev->nb_event_queues);
 170                 if (rc < 0) {
 171                         plt_err("Failed to release XAQ %d", rc);
 172                         return rc;
 173                 }
 174                 rte_mempool_free(dev->xaq_pool);
 175                 dev->xaq_pool = NULL;
 176         }
 177
 178         dev->nb_event_queues = conf->nb_event_queues;
 179         dev->nb_event_ports = conf->nb_event_ports;
 180
 181         return 0;
 182 }
 183
 184 void
 185 cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,
 186                         struct rte_event_queue_conf *queue_conf)
 187 {
 188         RTE_SET_USED(event_dev);
 189         RTE_SET_USED(queue_id);
 190
 191         queue_conf->nb_atomic_flows = (1ULL << 20);
 192         queue_conf->nb_atomic_order_sequences = (1ULL << 20);
 193         queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES;
 194         queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
 195 }
 196
 197 int
 198 cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,
 199                      const struct rte_event_queue_conf *queue_conf)
 200 {
 201         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
 202
 203         plt_sso_dbg("Queue=%d prio=%d", queue_id, queue_conf->priority);
 204         /* Normalize <0-255> to <0-7> */
 205         return roc_sso_hwgrp_set_priority(&dev->sso, queue_id, 0xFF, 0xFF,
 206                                           queue_conf->priority / 32);
 207 }
 208
 209 void
 210 cnxk_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id)
 211 {
 212         RTE_SET_USED(event_dev);
 213         RTE_SET_USED(queue_id);
 214 }
 215
 216 void
 217 cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id,
 218                        struct rte_event_port_conf *port_conf)
 219 {
 220         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
 221
 222         RTE_SET_USED(port_id);
 223         port_conf->new_event_threshold = dev->max_num_events;
 224         port_conf->dequeue_depth = 1;
 225         port_conf->enqueue_depth = 1;
 226 }
 227
 228 static void
 229 parse_queue_param(char *value, void *opaque)
 230 {
 231         struct cnxk_sso_qos queue_qos = {0};
 232         uint8_t *val = (uint8_t *)&queue_qos;
 233         struct cnxk_sso_evdev *dev = opaque;
 234         char *tok = strtok(value, "-");
 235         struct cnxk_sso_qos *old_ptr;
 236
 237         if (!strlen(value))
 238                 return;
 239
 240         while (tok != NULL) {
 241                 *val = atoi(tok);
 242                 tok = strtok(NULL, "-");
 243                 val++;
 244         }
 245
 246         if (val != (&queue_qos.iaq_prcnt + 1)) {
 247                 plt_err("Invalid QoS parameter expected [Qx-XAQ-TAQ-IAQ]");
 248                 return;
 249         }
 250
 251         dev->qos_queue_cnt++;
 252         old_ptr = dev->qos_parse_data;
 253         dev->qos_parse_data = rte_realloc(
 254                 dev->qos_parse_data,
 255                 sizeof(struct cnxk_sso_qos) * dev->qos_queue_cnt, 0);
 256         if (dev->qos_parse_data == NULL) {
 257                 dev->qos_parse_data = old_ptr;
 258                 dev->qos_queue_cnt--;
 259                 return;
 260         }
 261         dev->qos_parse_data[dev->qos_queue_cnt - 1] = queue_qos;
 262 }
 263
 264 static void
 265 parse_qos_list(const char *value, void *opaque)
 266 {
 267         char *s = strdup(value);
 268         char *start = NULL;
 269         char *end = NULL;
 270         char *f = s;
 271
 272         while (*s) {
 273                 if (*s == '[')
 274                         start = s;
 275                 else if (*s == ']')
 276                         end = s;
 277
 278                 if (start && start < end) {
 279                         *end = 0;
 280                         parse_queue_param(start + 1, opaque);
 281                         s = end;
 282                         start = end;
 283                 }
 284                 s++;
 285         }
 286
 287         free(f);
 288 }
 289
 290 static int
 291 parse_sso_kvargs_dict(const char *key, const char *value, void *opaque)
 292 {
 293         RTE_SET_USED(key);
 294
 295         /* Dict format [Qx-XAQ-TAQ-IAQ][Qz-XAQ-TAQ-IAQ] use '-' cause ','
 296          * isn't allowed. Everything is expressed in percentages, 0 represents
 297          * default.
 298          */
 299         parse_qos_list(value, opaque);
 300
 301         return 0;
 302 }
 303
 304 static void
 305 cnxk_sso_parse_devargs(struct cnxk_sso_evdev *dev, struct rte_devargs *devargs)
 306 {
 307         struct rte_kvargs *kvlist;
 308
 309         if (devargs == NULL)
 310                 return;
 311         kvlist = rte_kvargs_parse(devargs->args, NULL);
 312         if (kvlist == NULL)
 313                 return;
 314
 315         rte_kvargs_process(kvlist, CNXK_SSO_XAE_CNT, &parse_kvargs_value,
 316                            &dev->xae_cnt);
 317         rte_kvargs_process(kvlist, CNXK_SSO_GGRP_QOS, &parse_sso_kvargs_dict,
 318                            dev);
 319         rte_kvargs_free(kvlist);
 320 }
 321
 322 int
 323 cnxk_sso_init(struct rte_eventdev *event_dev)
 324 {
 325         const struct rte_memzone *mz = NULL;
 326         struct rte_pci_device *pci_dev;
 327         struct cnxk_sso_evdev *dev;
 328         int rc;
 329
 330         mz = rte_memzone_reserve(CNXK_SSO_MZ_NAME, sizeof(uint64_t),
 331                                  SOCKET_ID_ANY, 0);
 332         if (mz == NULL) {
 333                 plt_err("Failed to create eventdev memzone");
 334                 return -ENOMEM;
 335         }
 336
 337         dev = cnxk_sso_pmd_priv(event_dev);
 338         pci_dev = container_of(event_dev->dev, struct rte_pci_device, device);
 339         dev->sso.pci_dev = pci_dev;
 340
 341         *(uint64_t *)mz->addr = (uint64_t)dev;
 342         cnxk_sso_parse_devargs(dev, pci_dev->device.devargs);
 343
 344         /* Initialize the base cnxk_dev object */
 345         rc = roc_sso_dev_init(&dev->sso);
 346         if (rc < 0) {
 347                 plt_err("Failed to initialize RoC SSO rc=%d", rc);
 348                 goto error;
 349         }
 350
 351         dev->is_timeout_deq = 0;
 352         dev->min_dequeue_timeout_ns = USEC2NSEC(1);
 353         dev->max_dequeue_timeout_ns = USEC2NSEC(0x3FF);
 354         dev->max_num_events = -1;
 355         dev->nb_event_queues = 0;
 356         dev->nb_event_ports = 0;
 357
 358         return 0;
 359
 360 error:
 361         rte_memzone_free(mz);
 362         return rc;
 363 }
 364
 365 int
 366 cnxk_sso_fini(struct rte_eventdev *event_dev)
 367 {
 368         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
 369
 370         /* For secondary processes, nothing to be done */
 371         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 372                 return 0;
 373
 374         roc_sso_rsrc_fini(&dev->sso);
 375         roc_sso_dev_fini(&dev->sso);
 376
 377         return 0;
 378 }
 379
 380 int
 381 cnxk_sso_remove(struct rte_pci_device *pci_dev)
 382 {
 383         return rte_event_pmd_pci_remove(pci_dev, cnxk_sso_fini);
 384 }