24e1be6a971f5bbcd090c4cef99ba7422b562219
[dpdk.git] / drivers / event / cnxk / cnxk_eventdev.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2021 Marvell.
3  */
4
5 #ifndef __CNXK_EVENTDEV_H__
6 #define __CNXK_EVENTDEV_H__
7
8 #include <rte_devargs.h>
9 #include <rte_ethdev.h>
10 #include <rte_event_eth_rx_adapter.h>
11 #include <rte_event_eth_tx_adapter.h>
12 #include <rte_kvargs.h>
13 #include <rte_mbuf_pool_ops.h>
14 #include <rte_pci.h>
15
16 #include <eventdev_pmd_pci.h>
17
18 #include "roc_api.h"
19
20 #include "cnxk_tim_evdev.h"
21
22 #define CNXK_SSO_XAE_CNT   "xae_cnt"
23 #define CNXK_SSO_GGRP_QOS  "qos"
24 #define CNXK_SSO_FORCE_BP  "force_rx_bp"
25 #define CN9K_SSO_SINGLE_WS "single_ws"
26 #define CN10K_SSO_GW_MODE  "gw_mode"
27
28 #define NSEC2USEC(__ns)         ((__ns) / 1E3)
29 #define USEC2NSEC(__us)         ((__us)*1E3)
30 #define NSEC2TICK(__ns, __freq) (((__ns) * (__freq)) / 1E9)
31
32 #define CNXK_SSO_MAX_HWGRP     (RTE_EVENT_MAX_QUEUES_PER_DEV + 1)
33 #define CNXK_SSO_FC_NAME       "cnxk_evdev_xaq_fc"
34 #define CNXK_SSO_MZ_NAME       "cnxk_evdev_mz"
35 #define CNXK_SSO_XAQ_CACHE_CNT (0x7)
36 #define CNXK_SSO_XAQ_SLACK     (8)
37 #define CNXK_SSO_WQE_SG_PTR    (9)
38 #define CNXK_SSO_SQB_LIMIT     (0x180)
39
40 #define CNXK_TT_FROM_TAG(x)         (((x) >> 32) & SSO_TT_EMPTY)
41 #define CNXK_TT_FROM_EVENT(x)       (((x) >> 38) & SSO_TT_EMPTY)
42 #define CNXK_EVENT_TYPE_FROM_TAG(x) (((x) >> 28) & 0xf)
43 #define CNXK_SUB_EVENT_FROM_TAG(x)  (((x) >> 20) & 0xff)
44 #define CNXK_CLR_SUB_EVENT(x)       (~(0xffu << 20) & x)
45 #define CNXK_GRP_FROM_TAG(x)        (((x) >> 36) & 0x3ff)
46 #define CNXK_SWTAG_PEND(x)          (BIT_ULL(62) & x)
47
48 #define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0)
49
50 #define CN10K_GW_MODE_NONE     0
51 #define CN10K_GW_MODE_PREF     1
52 #define CN10K_GW_MODE_PREF_WFE 2
53
54 typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id);
55 typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t *grp_base);
56 typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws);
57 typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map,
58                                uint16_t nb_link);
59 typedef int (*cnxk_sso_unlink_t)(void *dev, void *ws, uint16_t *map,
60                                  uint16_t nb_link);
61 typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev);
62 typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws);
63 typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,
64                                      cnxk_handle_event_t fn, void *arg);
65
66 struct cnxk_sso_qos {
67         uint16_t queue;
68         uint8_t xaq_prcnt;
69         uint8_t taq_prcnt;
70         uint8_t iaq_prcnt;
71 };
72
73 struct cnxk_sso_evdev {
74         struct roc_sso sso;
75         uint8_t max_event_queues;
76         uint8_t max_event_ports;
77         uint8_t is_timeout_deq;
78         uint8_t nb_event_queues;
79         uint8_t nb_event_ports;
80         uint8_t configured;
81         uint32_t deq_tmo_ns;
82         uint32_t min_dequeue_timeout_ns;
83         uint32_t max_dequeue_timeout_ns;
84         int32_t max_num_events;
85         uint64_t *fc_mem;
86         uint64_t xaq_lmt;
87         uint64_t nb_xaq_cfg;
88         rte_iova_t fc_iova;
89         struct rte_mempool *xaq_pool;
90         uint64_t rx_offloads;
91         uint64_t tx_offloads;
92         uint64_t adptr_xae_cnt;
93         uint16_t rx_adptr_pool_cnt;
94         uint64_t *rx_adptr_pools;
95         uint64_t *tx_adptr_data;
96         uint16_t max_port_id;
97         uint16_t tim_adptr_ring_cnt;
98         uint16_t *timer_adptr_rings;
99         uint64_t *timer_adptr_sz;
100         /* Dev args */
101         uint32_t xae_cnt;
102         uint8_t qos_queue_cnt;
103         struct cnxk_sso_qos *qos_parse_data;
104         uint8_t force_ena_bp;
105         /* CN9K */
106         uint8_t dual_ws;
107         /* CN10K */
108         uint8_t gw_mode;
109 } __rte_cache_aligned;
110
111 struct cn10k_sso_hws {
112         uint64_t base;
113         /* PTP timestamp */
114         struct cnxk_timesync_info *tstamp;
115         void *lookup_mem;
116         uint32_t gw_wdata;
117         uint8_t swtag_req;
118         uint8_t hws_id;
119         /* Add Work Fastpath data */
120         uint64_t xaq_lmt __rte_cache_aligned;
121         uint64_t *fc_mem;
122         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
123         /* Tx Fastpath data */
124         uint64_t tx_base __rte_cache_aligned;
125         uintptr_t lmt_base;
126         uint8_t tx_adptr_data[];
127 } __rte_cache_aligned;
128
129 /* CN9K HWS ops */
130 #define CN9K_SSO_HWS_OPS                                                       \
131         uintptr_t swtag_desched_op;                                            \
132         uintptr_t swtag_flush_op;                                              \
133         uintptr_t swtag_norm_op;                                               \
134         uintptr_t getwrk_op;                                                   \
135         uintptr_t tag_op;                                                      \
136         uintptr_t wqp_op
137
138 /* Event port a.k.a GWS */
139 struct cn9k_sso_hws {
140         /* Get Work Fastpath data */
141         CN9K_SSO_HWS_OPS;
142         /* PTP timestamp */
143         struct cnxk_timesync_info *tstamp;
144         void *lookup_mem;
145         uint8_t swtag_req;
146         uint8_t hws_id;
147         /* Add Work Fastpath data */
148         uint64_t xaq_lmt __rte_cache_aligned;
149         uint64_t *fc_mem;
150         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
151         /* Tx Fastpath data */
152         uint64_t base __rte_cache_aligned;
153         uint8_t tx_adptr_data[];
154 } __rte_cache_aligned;
155
156 struct cn9k_sso_hws_state {
157         CN9K_SSO_HWS_OPS;
158 };
159
160 struct cn9k_sso_hws_dual {
161         /* Get Work Fastpath data */
162         struct cn9k_sso_hws_state ws_state[2]; /* Ping and Pong */
163         /* PTP timestamp */
164         struct cnxk_timesync_info *tstamp;
165         void *lookup_mem;
166         uint8_t swtag_req;
167         uint8_t vws; /* Ping pong bit */
168         uint8_t hws_id;
169         /* Add Work Fastpath data */
170         uint64_t xaq_lmt __rte_cache_aligned;
171         uint64_t *fc_mem;
172         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
173         /* Tx Fastpath data */
174         uint64_t base[2] __rte_cache_aligned;
175         uint8_t tx_adptr_data[];
176 } __rte_cache_aligned;
177
178 struct cnxk_sso_hws_cookie {
179         const struct rte_eventdev *event_dev;
180         bool configured;
181 } __rte_cache_aligned;
182
183 static inline int
184 parse_kvargs_flag(const char *key, const char *value, void *opaque)
185 {
186         RTE_SET_USED(key);
187
188         *(uint8_t *)opaque = !!atoi(value);
189         return 0;
190 }
191
192 static inline int
193 parse_kvargs_value(const char *key, const char *value, void *opaque)
194 {
195         RTE_SET_USED(key);
196
197         *(uint32_t *)opaque = (uint32_t)atoi(value);
198         return 0;
199 }
200
201 static inline struct cnxk_sso_evdev *
202 cnxk_sso_pmd_priv(const struct rte_eventdev *event_dev)
203 {
204         return event_dev->data->dev_private;
205 }
206
207 static inline struct cnxk_sso_hws_cookie *
208 cnxk_sso_hws_get_cookie(void *ws)
209 {
210         return RTE_PTR_SUB(ws, sizeof(struct cnxk_sso_hws_cookie));
211 }
212
213 /* Configuration functions */
214 int cnxk_sso_xae_reconfigure(struct rte_eventdev *event_dev);
215 int cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev);
216 void cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data,
217                            uint32_t event_type);
218
219 /* Common ops API. */
220 int cnxk_sso_init(struct rte_eventdev *event_dev);
221 int cnxk_sso_fini(struct rte_eventdev *event_dev);
222 int cnxk_sso_remove(struct rte_pci_device *pci_dev);
223 void cnxk_sso_info_get(struct cnxk_sso_evdev *dev,
224                        struct rte_event_dev_info *dev_info);
225 int cnxk_sso_dev_validate(const struct rte_eventdev *event_dev);
226 int cnxk_setup_event_ports(const struct rte_eventdev *event_dev,
227                            cnxk_sso_init_hws_mem_t init_hws_mem,
228                            cnxk_sso_hws_setup_t hws_setup);
229 void cnxk_sso_restore_links(const struct rte_eventdev *event_dev,
230                             cnxk_sso_link_t link_fn);
231 void cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,
232                              struct rte_event_queue_conf *queue_conf);
233 int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,
234                          const struct rte_event_queue_conf *queue_conf);
235 void cnxk_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id);
236 void cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id,
237                             struct rte_event_port_conf *port_conf);
238 int cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
239                         cnxk_sso_hws_setup_t hws_setup_fn);
240 int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,
241                            uint64_t *tmo_ticks);
242 int cnxk_sso_start(struct rte_eventdev *event_dev,
243                    cnxk_sso_hws_reset_t reset_fn,
244                    cnxk_sso_hws_flush_t flush_fn);
245 void cnxk_sso_stop(struct rte_eventdev *event_dev,
246                    cnxk_sso_hws_reset_t reset_fn,
247                    cnxk_sso_hws_flush_t flush_fn);
248 int cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn);
249 int cnxk_sso_selftest(const char *dev_name);
250 void cnxk_sso_dump(struct rte_eventdev *event_dev, FILE *f);
251
252 /* Stats API. */
253 int cnxk_sso_xstats_get_names(const struct rte_eventdev *event_dev,
254                               enum rte_event_dev_xstats_mode mode,
255                               uint8_t queue_port_id,
256                               struct rte_event_dev_xstats_name *xstats_names,
257                               unsigned int *ids, unsigned int size);
258 int cnxk_sso_xstats_get(const struct rte_eventdev *event_dev,
259                         enum rte_event_dev_xstats_mode mode,
260                         uint8_t queue_port_id, const unsigned int ids[],
261                         uint64_t values[], unsigned int n);
262 int cnxk_sso_xstats_reset(struct rte_eventdev *event_dev,
263                           enum rte_event_dev_xstats_mode mode,
264                           int16_t queue_port_id, const uint32_t ids[],
265                           uint32_t n);
266
267 /* CN9K */
268 void cn9k_sso_set_rsrc(void *arg);
269
270 /* Common adapter ops */
271 int cnxk_sso_rx_adapter_queue_add(
272         const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev,
273         int32_t rx_queue_id,
274         const struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
275 int cnxk_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,
276                                   const struct rte_eth_dev *eth_dev,
277                                   int32_t rx_queue_id);
278 int cnxk_sso_rx_adapter_start(const struct rte_eventdev *event_dev,
279                               const struct rte_eth_dev *eth_dev);
280 int cnxk_sso_rx_adapter_stop(const struct rte_eventdev *event_dev,
281                              const struct rte_eth_dev *eth_dev);
282 int cnxk_sso_tx_adapter_queue_add(const struct rte_eventdev *event_dev,
283                                   const struct rte_eth_dev *eth_dev,
284                                   int32_t tx_queue_id);
285 int cnxk_sso_tx_adapter_queue_del(const struct rte_eventdev *event_dev,
286                                   const struct rte_eth_dev *eth_dev,
287                                   int32_t tx_queue_id);
288
289 #endif /* __CNXK_EVENTDEV_H__ */