drivers/event/cnxk/cnxk_eventdev.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef __CNXK_EVENTDEV_H__
   6 #define __CNXK_EVENTDEV_H__
   7
   8 #include <string.h>
   9
  10 #include <cryptodev_pmd.h>
  11 #include <rte_devargs.h>
  12 #include <rte_ethdev.h>
  13 #include <rte_event_eth_rx_adapter.h>
  14 #include <rte_event_eth_tx_adapter.h>
  15 #include <rte_kvargs.h>
  16 #include <rte_mbuf_pool_ops.h>
  17 #include <rte_pci.h>
  18
  19 #include <eventdev_pmd_pci.h>
  20
  21 #include "roc_api.h"
  22
  23 #include "cnxk_tim_evdev.h"
  24
  25 #define CNXK_SSO_XAE_CNT   "xae_cnt"
  26 #define CNXK_SSO_GGRP_QOS  "qos"
  27 #define CNXK_SSO_FORCE_BP  "force_rx_bp"
  28 #define CN9K_SSO_SINGLE_WS "single_ws"
  29 #define CN10K_SSO_GW_MODE  "gw_mode"
  30
  31 #define NSEC2USEC(__ns)         ((__ns) / 1E3)
  32 #define USEC2NSEC(__us)         ((__us)*1E3)
  33 #define NSEC2TICK(__ns, __freq) (((__ns) * (__freq)) / 1E9)
  34
  35 #define CNXK_SSO_MAX_HWGRP     (RTE_EVENT_MAX_QUEUES_PER_DEV + 1)
  36 #define CNXK_SSO_FC_NAME       "cnxk_evdev_xaq_fc"
  37 #define CNXK_SSO_MZ_NAME       "cnxk_evdev_mz"
  38 #define CNXK_SSO_XAQ_CACHE_CNT (0x7)
  39 #define CNXK_SSO_XAQ_SLACK     (8)
  40 #define CNXK_SSO_WQE_SG_PTR    (9)
  41 #define CNXK_SSO_SQB_LIMIT     (0x180)
  42
  43 #define CNXK_TT_FROM_TAG(x)         (((x) >> 32) & SSO_TT_EMPTY)
  44 #define CNXK_TT_FROM_EVENT(x)       (((x) >> 38) & SSO_TT_EMPTY)
  45 #define CNXK_EVENT_TYPE_FROM_TAG(x) (((x) >> 28) & 0xf)
  46 #define CNXK_SUB_EVENT_FROM_TAG(x)  (((x) >> 20) & 0xff)
  47 #define CNXK_CLR_SUB_EVENT(x)       (~(0xffu << 20) & x)
  48 #define CNXK_GRP_FROM_TAG(x)        (((x) >> 36) & 0x3ff)
  49 #define CNXK_SWTAG_PEND(x)          (BIT_ULL(62) & x)
  50
  51 #define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0)
  52
  53 #define CN10K_GW_MODE_NONE     0
  54 #define CN10K_GW_MODE_PREF     1
  55 #define CN10K_GW_MODE_PREF_WFE 2
  56
  57 #define CNXK_VALID_DEV_OR_ERR_RET(dev, drv_name)                               \
  58         do {                                                                   \
  59                 if (strncmp(dev->driver->name, drv_name, strlen(drv_name)))    \
  60                         return -EINVAL;                                        \
  61         } while (0)
  62
  63 typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id);
  64 typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t *grp_base);
  65 typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws);
  66 typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map,
  67                                uint16_t nb_link);
  68 typedef int (*cnxk_sso_unlink_t)(void *dev, void *ws, uint16_t *map,
  69                                  uint16_t nb_link);
  70 typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev);
  71 typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws);
  72 typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,
  73                                      cnxk_handle_event_t fn, void *arg);
  74
  75 struct cnxk_sso_qos {
  76         uint16_t queue;
  77         uint8_t xaq_prcnt;
  78         uint8_t taq_prcnt;
  79         uint8_t iaq_prcnt;
  80 };
  81
  82 struct cnxk_sso_evdev {
  83         struct roc_sso sso;
  84         uint8_t max_event_queues;
  85         uint8_t max_event_ports;
  86         uint8_t is_timeout_deq;
  87         uint8_t nb_event_queues;
  88         uint8_t nb_event_ports;
  89         uint8_t configured;
  90         uint32_t deq_tmo_ns;
  91         uint32_t min_dequeue_timeout_ns;
  92         uint32_t max_dequeue_timeout_ns;
  93         int32_t max_num_events;
  94         uint64_t xaq_lmt;
  95         rte_iova_t fc_iova;
  96         uint64_t rx_offloads;
  97         uint64_t tx_offloads;
  98         uint64_t adptr_xae_cnt;
  99         uint16_t rx_adptr_pool_cnt;
 100         uint64_t *rx_adptr_pools;
 101         uint64_t *tx_adptr_data;
 102         uint16_t max_port_id;
 103         uint16_t tim_adptr_ring_cnt;
 104         uint16_t *timer_adptr_rings;
 105         uint64_t *timer_adptr_sz;
 106         uint16_t vec_pool_cnt;
 107         uint64_t *vec_pools;
 108         /* Dev args */
 109         uint32_t xae_cnt;
 110         uint8_t qos_queue_cnt;
 111         struct cnxk_sso_qos *qos_parse_data;
 112         uint8_t force_ena_bp;
 113         /* CN9K */
 114         uint8_t dual_ws;
 115         /* CN10K */
 116         uint8_t gw_mode;
 117         /* Crypto adapter */
 118         uint8_t is_ca_internal_port;
 119 } __rte_cache_aligned;
 120
 121 struct cn10k_sso_hws {
 122         uint64_t base;
 123         /* PTP timestamp */
 124         struct cnxk_timesync_info *tstamp;
 125         void *lookup_mem;
 126         uint32_t gw_wdata;
 127         uint8_t swtag_req;
 128         uint8_t hws_id;
 129         /* Add Work Fastpath data */
 130         uint64_t xaq_lmt __rte_cache_aligned;
 131         uint64_t *fc_mem;
 132         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 133         /* Tx Fastpath data */
 134         uint64_t tx_base __rte_cache_aligned;
 135         uintptr_t lmt_base;
 136         uint8_t tx_adptr_data[];
 137 } __rte_cache_aligned;
 138
 139 /* CN9K HWS ops */
 140 #define CN9K_SSO_HWS_OPS                                                       \
 141         uintptr_t swtag_desched_op;                                            \
 142         uintptr_t swtag_flush_op;                                              \
 143         uintptr_t swtag_norm_op;                                               \
 144         uintptr_t getwrk_op;                                                   \
 145         uintptr_t tag_op;                                                      \
 146         uintptr_t wqp_op
 147
 148 /* Event port a.k.a GWS */
 149 struct cn9k_sso_hws {
 150         /* Get Work Fastpath data */
 151         CN9K_SSO_HWS_OPS;
 152         /* PTP timestamp */
 153         struct cnxk_timesync_info *tstamp;
 154         void *lookup_mem;
 155         uint8_t swtag_req;
 156         uint8_t hws_id;
 157         /* Add Work Fastpath data */
 158         uint64_t xaq_lmt __rte_cache_aligned;
 159         uint64_t *fc_mem;
 160         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 161         /* Tx Fastpath data */
 162         uint64_t base __rte_cache_aligned;
 163         uint8_t tx_adptr_data[];
 164 } __rte_cache_aligned;
 165
 166 struct cn9k_sso_hws_state {
 167         CN9K_SSO_HWS_OPS;
 168 };
 169
 170 struct cn9k_sso_hws_dual {
 171         /* Get Work Fastpath data */
 172         struct cn9k_sso_hws_state ws_state[2]; /* Ping and Pong */
 173         /* PTP timestamp */
 174         struct cnxk_timesync_info *tstamp;
 175         void *lookup_mem;
 176         uint8_t swtag_req;
 177         uint8_t vws; /* Ping pong bit */
 178         uint8_t hws_id;
 179         /* Add Work Fastpath data */
 180         uint64_t xaq_lmt __rte_cache_aligned;
 181         uint64_t *fc_mem;
 182         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 183         /* Tx Fastpath data */
 184         uint64_t base[2] __rte_cache_aligned;
 185         uint8_t tx_adptr_data[];
 186 } __rte_cache_aligned;
 187
 188 struct cnxk_sso_hws_cookie {
 189         const struct rte_eventdev *event_dev;
 190         bool configured;
 191 } __rte_cache_aligned;
 192
 193 static inline int
 194 parse_kvargs_flag(const char *key, const char *value, void *opaque)
 195 {
 196         RTE_SET_USED(key);
 197
 198         *(uint8_t *)opaque = !!atoi(value);
 199         return 0;
 200 }
 201
 202 static inline int
 203 parse_kvargs_value(const char *key, const char *value, void *opaque)
 204 {
 205         RTE_SET_USED(key);
 206
 207         *(uint32_t *)opaque = (uint32_t)atoi(value);
 208         return 0;
 209 }
 210
 211 static inline struct cnxk_sso_evdev *
 212 cnxk_sso_pmd_priv(const struct rte_eventdev *event_dev)
 213 {
 214         return event_dev->data->dev_private;
 215 }
 216
 217 static inline struct cnxk_sso_hws_cookie *
 218 cnxk_sso_hws_get_cookie(void *ws)
 219 {
 220         return RTE_PTR_SUB(ws, sizeof(struct cnxk_sso_hws_cookie));
 221 }
 222
 223 /* Configuration functions */
 224 int cnxk_sso_xae_reconfigure(struct rte_eventdev *event_dev);
 225 int cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev);
 226 void cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data,
 227                            uint32_t event_type);
 228
 229 /* Common ops API. */
 230 int cnxk_sso_init(struct rte_eventdev *event_dev);
 231 int cnxk_sso_fini(struct rte_eventdev *event_dev);
 232 int cnxk_sso_remove(struct rte_pci_device *pci_dev);
 233 void cnxk_sso_info_get(struct cnxk_sso_evdev *dev,
 234                        struct rte_event_dev_info *dev_info);
 235 int cnxk_sso_dev_validate(const struct rte_eventdev *event_dev);
 236 int cnxk_setup_event_ports(const struct rte_eventdev *event_dev,
 237                            cnxk_sso_init_hws_mem_t init_hws_mem,
 238                            cnxk_sso_hws_setup_t hws_setup);
 239 void cnxk_sso_restore_links(const struct rte_eventdev *event_dev,
 240                             cnxk_sso_link_t link_fn);
 241 void cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,
 242                              struct rte_event_queue_conf *queue_conf);
 243 int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,
 244                          const struct rte_event_queue_conf *queue_conf);
 245 void cnxk_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id);
 246 void cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id,
 247                             struct rte_event_port_conf *port_conf);
 248 int cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
 249                         cnxk_sso_hws_setup_t hws_setup_fn);
 250 int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,
 251                            uint64_t *tmo_ticks);
 252 int cnxk_sso_start(struct rte_eventdev *event_dev,
 253                    cnxk_sso_hws_reset_t reset_fn,
 254                    cnxk_sso_hws_flush_t flush_fn);
 255 void cnxk_sso_stop(struct rte_eventdev *event_dev,
 256                    cnxk_sso_hws_reset_t reset_fn,
 257                    cnxk_sso_hws_flush_t flush_fn);
 258 int cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn);
 259 int cnxk_sso_selftest(const char *dev_name);
 260 void cnxk_sso_dump(struct rte_eventdev *event_dev, FILE *f);
 261
 262 /* Stats API. */
 263 int cnxk_sso_xstats_get_names(const struct rte_eventdev *event_dev,
 264                               enum rte_event_dev_xstats_mode mode,
 265                               uint8_t queue_port_id,
 266                               struct rte_event_dev_xstats_name *xstats_names,
 267                               unsigned int *ids, unsigned int size);
 268 int cnxk_sso_xstats_get(const struct rte_eventdev *event_dev,
 269                         enum rte_event_dev_xstats_mode mode,
 270                         uint8_t queue_port_id, const unsigned int ids[],
 271                         uint64_t values[], unsigned int n);
 272 int cnxk_sso_xstats_reset(struct rte_eventdev *event_dev,
 273                           enum rte_event_dev_xstats_mode mode,
 274                           int16_t queue_port_id, const uint32_t ids[],
 275                           uint32_t n);
 276
 277 /* Crypto adapter APIs. */
 278 int cnxk_crypto_adapter_qp_add(const struct rte_eventdev *event_dev,
 279                                const struct rte_cryptodev *cdev,
 280                                int32_t queue_pair_id);
 281 int cnxk_crypto_adapter_qp_del(const struct rte_cryptodev *cdev,
 282                                int32_t queue_pair_id);
 283
 284 /* CN9K */
 285 void cn9k_sso_set_rsrc(void *arg);
 286
 287 /* Common adapter ops */
 288 int cnxk_sso_rx_adapter_queue_add(
 289         const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev,
 290         int32_t rx_queue_id,
 291         const struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
 292 int cnxk_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,
 293                                   const struct rte_eth_dev *eth_dev,
 294                                   int32_t rx_queue_id);
 295 int cnxk_sso_rx_adapter_start(const struct rte_eventdev *event_dev,
 296                               const struct rte_eth_dev *eth_dev);
 297 int cnxk_sso_rx_adapter_stop(const struct rte_eventdev *event_dev,
 298                              const struct rte_eth_dev *eth_dev);
 299 int cnxk_sso_tx_adapter_queue_add(const struct rte_eventdev *event_dev,
 300                                   const struct rte_eth_dev *eth_dev,
 301                                   int32_t tx_queue_id);
 302 int cnxk_sso_tx_adapter_queue_del(const struct rte_eventdev *event_dev,
 303                                   const struct rte_eth_dev *eth_dev,
 304                                   int32_t tx_queue_id);
 305
 306 #endif /* __CNXK_EVENTDEV_H__ */