drivers/event/cnxk/cnxk_eventdev.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef __CNXK_EVENTDEV_H__
   6 #define __CNXK_EVENTDEV_H__
   7
   8 #include <rte_devargs.h>
   9 #include <rte_ethdev.h>
  10 #include <rte_event_eth_rx_adapter.h>
  11 #include <rte_kvargs.h>
  12 #include <rte_mbuf_pool_ops.h>
  13 #include <rte_pci.h>
  14
  15 #include <eventdev_pmd_pci.h>
  16
  17 #include "roc_api.h"
  18
  19 #include "cnxk_tim_evdev.h"
  20
  21 #define CNXK_SSO_XAE_CNT   "xae_cnt"
  22 #define CNXK_SSO_GGRP_QOS  "qos"
  23 #define CNXK_SSO_FORCE_BP  "force_rx_bp"
  24 #define CN9K_SSO_SINGLE_WS "single_ws"
  25 #define CN10K_SSO_GW_MODE  "gw_mode"
  26
  27 #define NSEC2USEC(__ns)         ((__ns) / 1E3)
  28 #define USEC2NSEC(__us)         ((__us)*1E3)
  29 #define NSEC2TICK(__ns, __freq) (((__ns) * (__freq)) / 1E9)
  30
  31 #define CNXK_SSO_MAX_HWGRP     (RTE_EVENT_MAX_QUEUES_PER_DEV + 1)
  32 #define CNXK_SSO_FC_NAME       "cnxk_evdev_xaq_fc"
  33 #define CNXK_SSO_MZ_NAME       "cnxk_evdev_mz"
  34 #define CNXK_SSO_XAQ_CACHE_CNT (0x7)
  35 #define CNXK_SSO_XAQ_SLACK     (8)
  36 #define CNXK_SSO_WQE_SG_PTR    (9)
  37
  38 #define CNXK_TT_FROM_TAG(x)         (((x) >> 32) & SSO_TT_EMPTY)
  39 #define CNXK_TT_FROM_EVENT(x)       (((x) >> 38) & SSO_TT_EMPTY)
  40 #define CNXK_EVENT_TYPE_FROM_TAG(x) (((x) >> 28) & 0xf)
  41 #define CNXK_SUB_EVENT_FROM_TAG(x)  (((x) >> 20) & 0xff)
  42 #define CNXK_CLR_SUB_EVENT(x)       (~(0xffu << 20) & x)
  43 #define CNXK_GRP_FROM_TAG(x)        (((x) >> 36) & 0x3ff)
  44 #define CNXK_SWTAG_PEND(x)          (BIT_ULL(62) & x)
  45
  46 #define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0)
  47
  48 #define CN10K_GW_MODE_NONE     0
  49 #define CN10K_GW_MODE_PREF     1
  50 #define CN10K_GW_MODE_PREF_WFE 2
  51
  52 typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id);
  53 typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t *grp_base);
  54 typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws);
  55 typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map,
  56                                uint16_t nb_link);
  57 typedef int (*cnxk_sso_unlink_t)(void *dev, void *ws, uint16_t *map,
  58                                  uint16_t nb_link);
  59 typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev);
  60 typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws);
  61 typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,
  62                                      cnxk_handle_event_t fn, void *arg);
  63
  64 struct cnxk_sso_qos {
  65         uint16_t queue;
  66         uint8_t xaq_prcnt;
  67         uint8_t taq_prcnt;
  68         uint8_t iaq_prcnt;
  69 };
  70
  71 struct cnxk_sso_evdev {
  72         struct roc_sso sso;
  73         uint8_t max_event_queues;
  74         uint8_t max_event_ports;
  75         uint8_t is_timeout_deq;
  76         uint8_t nb_event_queues;
  77         uint8_t nb_event_ports;
  78         uint8_t configured;
  79         uint32_t deq_tmo_ns;
  80         uint32_t min_dequeue_timeout_ns;
  81         uint32_t max_dequeue_timeout_ns;
  82         int32_t max_num_events;
  83         uint64_t *fc_mem;
  84         uint64_t xaq_lmt;
  85         uint64_t nb_xaq_cfg;
  86         rte_iova_t fc_iova;
  87         struct rte_mempool *xaq_pool;
  88         uint64_t rx_offloads;
  89         uint64_t adptr_xae_cnt;
  90         uint16_t rx_adptr_pool_cnt;
  91         uint64_t *rx_adptr_pools;
  92         uint16_t tim_adptr_ring_cnt;
  93         uint16_t *timer_adptr_rings;
  94         uint64_t *timer_adptr_sz;
  95         /* Dev args */
  96         uint32_t xae_cnt;
  97         uint8_t qos_queue_cnt;
  98         struct cnxk_sso_qos *qos_parse_data;
  99         uint8_t force_ena_bp;
 100         /* CN9K */
 101         uint8_t dual_ws;
 102         /* CN10K */
 103         uint8_t gw_mode;
 104 } __rte_cache_aligned;
 105
 106 struct cn10k_sso_hws {
 107         uint64_t base;
 108         /* PTP timestamp */
 109         struct cnxk_timesync_info *tstamp;
 110         void *lookup_mem;
 111         uint32_t gw_wdata;
 112         uint8_t swtag_req;
 113         uint8_t hws_id;
 114         /* Add Work Fastpath data */
 115         uint64_t xaq_lmt __rte_cache_aligned;
 116         uint64_t *fc_mem;
 117         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 118         uintptr_t lmt_base;
 119 } __rte_cache_aligned;
 120
 121 /* CN9K HWS ops */
 122 #define CN9K_SSO_HWS_OPS                                                       \
 123         uintptr_t swtag_desched_op;                                            \
 124         uintptr_t swtag_flush_op;                                              \
 125         uintptr_t swtag_norm_op;                                               \
 126         uintptr_t getwrk_op;                                                   \
 127         uintptr_t tag_op;                                                      \
 128         uintptr_t wqp_op
 129
 130 /* Event port a.k.a GWS */
 131 struct cn9k_sso_hws {
 132         /* Get Work Fastpath data */
 133         CN9K_SSO_HWS_OPS;
 134         /* PTP timestamp */
 135         struct cnxk_timesync_info *tstamp;
 136         void *lookup_mem;
 137         uint8_t swtag_req;
 138         uint8_t hws_id;
 139         /* Add Work Fastpath data */
 140         uint64_t xaq_lmt __rte_cache_aligned;
 141         uint64_t *fc_mem;
 142         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 143         uint64_t base;
 144 } __rte_cache_aligned;
 145
 146 struct cn9k_sso_hws_state {
 147         CN9K_SSO_HWS_OPS;
 148 };
 149
 150 struct cn9k_sso_hws_dual {
 151         /* Get Work Fastpath data */
 152         struct cn9k_sso_hws_state ws_state[2]; /* Ping and Pong */
 153         /* PTP timestamp */
 154         struct cnxk_timesync_info *tstamp;
 155         void *lookup_mem;
 156         uint8_t swtag_req;
 157         uint8_t vws; /* Ping pong bit */
 158         uint8_t hws_id;
 159         /* Add Work Fastpath data */
 160         uint64_t xaq_lmt __rte_cache_aligned;
 161         uint64_t *fc_mem;
 162         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 163         uint64_t base[2];
 164 } __rte_cache_aligned;
 165
 166 struct cnxk_sso_hws_cookie {
 167         const struct rte_eventdev *event_dev;
 168         bool configured;
 169 } __rte_cache_aligned;
 170
 171 static inline int
 172 parse_kvargs_flag(const char *key, const char *value, void *opaque)
 173 {
 174         RTE_SET_USED(key);
 175
 176         *(uint8_t *)opaque = !!atoi(value);
 177         return 0;
 178 }
 179
 180 static inline int
 181 parse_kvargs_value(const char *key, const char *value, void *opaque)
 182 {
 183         RTE_SET_USED(key);
 184
 185         *(uint32_t *)opaque = (uint32_t)atoi(value);
 186         return 0;
 187 }
 188
 189 static inline struct cnxk_sso_evdev *
 190 cnxk_sso_pmd_priv(const struct rte_eventdev *event_dev)
 191 {
 192         return event_dev->data->dev_private;
 193 }
 194
 195 static inline struct cnxk_sso_hws_cookie *
 196 cnxk_sso_hws_get_cookie(void *ws)
 197 {
 198         return RTE_PTR_SUB(ws, sizeof(struct cnxk_sso_hws_cookie));
 199 }
 200
 201 /* Configuration functions */
 202 int cnxk_sso_xae_reconfigure(struct rte_eventdev *event_dev);
 203 int cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev);
 204 void cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data,
 205                            uint32_t event_type);
 206
 207 /* Common ops API. */
 208 int cnxk_sso_init(struct rte_eventdev *event_dev);
 209 int cnxk_sso_fini(struct rte_eventdev *event_dev);
 210 int cnxk_sso_remove(struct rte_pci_device *pci_dev);
 211 void cnxk_sso_info_get(struct cnxk_sso_evdev *dev,
 212                        struct rte_event_dev_info *dev_info);
 213 int cnxk_sso_dev_validate(const struct rte_eventdev *event_dev);
 214 int cnxk_setup_event_ports(const struct rte_eventdev *event_dev,
 215                            cnxk_sso_init_hws_mem_t init_hws_mem,
 216                            cnxk_sso_hws_setup_t hws_setup);
 217 void cnxk_sso_restore_links(const struct rte_eventdev *event_dev,
 218                             cnxk_sso_link_t link_fn);
 219 void cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,
 220                              struct rte_event_queue_conf *queue_conf);
 221 int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,
 222                          const struct rte_event_queue_conf *queue_conf);
 223 void cnxk_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id);
 224 void cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id,
 225                             struct rte_event_port_conf *port_conf);
 226 int cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
 227                         cnxk_sso_hws_setup_t hws_setup_fn);
 228 int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,
 229                            uint64_t *tmo_ticks);
 230 int cnxk_sso_start(struct rte_eventdev *event_dev,
 231                    cnxk_sso_hws_reset_t reset_fn,
 232                    cnxk_sso_hws_flush_t flush_fn);
 233 void cnxk_sso_stop(struct rte_eventdev *event_dev,
 234                    cnxk_sso_hws_reset_t reset_fn,
 235                    cnxk_sso_hws_flush_t flush_fn);
 236 int cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn);
 237 int cnxk_sso_selftest(const char *dev_name);
 238 void cnxk_sso_dump(struct rte_eventdev *event_dev, FILE *f);
 239
 240 /* Stats API. */
 241 int cnxk_sso_xstats_get_names(const struct rte_eventdev *event_dev,
 242                               enum rte_event_dev_xstats_mode mode,
 243                               uint8_t queue_port_id,
 244                               struct rte_event_dev_xstats_name *xstats_names,
 245                               unsigned int *ids, unsigned int size);
 246 int cnxk_sso_xstats_get(const struct rte_eventdev *event_dev,
 247                         enum rte_event_dev_xstats_mode mode,
 248                         uint8_t queue_port_id, const unsigned int ids[],
 249                         uint64_t values[], unsigned int n);
 250 int cnxk_sso_xstats_reset(struct rte_eventdev *event_dev,
 251                           enum rte_event_dev_xstats_mode mode,
 252                           int16_t queue_port_id, const uint32_t ids[],
 253                           uint32_t n);
 254
 255 /* CN9K */
 256 void cn9k_sso_set_rsrc(void *arg);
 257
 258 /* Common adapter ops */
 259 int cnxk_sso_rx_adapter_queue_add(
 260         const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev,
 261         int32_t rx_queue_id,
 262         const struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
 263 int cnxk_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,
 264                                   const struct rte_eth_dev *eth_dev,
 265                                   int32_t rx_queue_id);
 266 int cnxk_sso_rx_adapter_start(const struct rte_eventdev *event_dev,
 267                               const struct rte_eth_dev *eth_dev);
 268 int cnxk_sso_rx_adapter_stop(const struct rte_eventdev *event_dev,
 269                              const struct rte_eth_dev *eth_dev);
 270
 271 #endif /* __CNXK_EVENTDEV_H__ */