drivers/event/cnxk/cnxk_eventdev.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef __CNXK_EVENTDEV_H__
   6 #define __CNXK_EVENTDEV_H__
   7
   8 #include <rte_devargs.h>
   9 #include <rte_kvargs.h>
  10 #include <rte_mbuf_pool_ops.h>
  11 #include <rte_pci.h>
  12
  13 #include <eventdev_pmd_pci.h>
  14
  15 #include "roc_api.h"
  16
  17 #define CNXK_SSO_XAE_CNT   "xae_cnt"
  18 #define CNXK_SSO_GGRP_QOS  "qos"
  19 #define CN9K_SSO_SINGLE_WS "single_ws"
  20 #define CN10K_SSO_GW_MODE  "gw_mode"
  21
  22 #define NSEC2USEC(__ns)         ((__ns) / 1E3)
  23 #define USEC2NSEC(__us)         ((__us)*1E3)
  24 #define NSEC2TICK(__ns, __freq) (((__ns) * (__freq)) / 1E9)
  25
  26 #define CNXK_SSO_MAX_HWGRP     (RTE_EVENT_MAX_QUEUES_PER_DEV + 1)
  27 #define CNXK_SSO_FC_NAME       "cnxk_evdev_xaq_fc"
  28 #define CNXK_SSO_MZ_NAME       "cnxk_evdev_mz"
  29 #define CNXK_SSO_XAQ_CACHE_CNT (0x7)
  30 #define CNXK_SSO_XAQ_SLACK     (8)
  31
  32 #define CNXK_TT_FROM_TAG(x)         (((x) >> 32) & SSO_TT_EMPTY)
  33 #define CNXK_TT_FROM_EVENT(x)       (((x) >> 38) & SSO_TT_EMPTY)
  34 #define CNXK_EVENT_TYPE_FROM_TAG(x) (((x) >> 28) & 0xf)
  35 #define CNXK_SUB_EVENT_FROM_TAG(x)  (((x) >> 20) & 0xff)
  36 #define CNXK_CLR_SUB_EVENT(x)       (~(0xffu << 20) & x)
  37 #define CNXK_GRP_FROM_TAG(x)        (((x) >> 36) & 0x3ff)
  38 #define CNXK_SWTAG_PEND(x)          (BIT_ULL(62) & x)
  39
  40 #define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0)
  41
  42 #define CN10K_GW_MODE_NONE     0
  43 #define CN10K_GW_MODE_PREF     1
  44 #define CN10K_GW_MODE_PREF_WFE 2
  45
  46 typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id);
  47 typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t *grp_base);
  48 typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws);
  49 typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map,
  50                                uint16_t nb_link);
  51 typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev);
  52 typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws);
  53 typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,
  54                                      cnxk_handle_event_t fn, void *arg);
  55
  56 struct cnxk_sso_qos {
  57         uint16_t queue;
  58         uint8_t xaq_prcnt;
  59         uint8_t taq_prcnt;
  60         uint8_t iaq_prcnt;
  61 };
  62
  63 struct cnxk_sso_evdev {
  64         struct roc_sso sso;
  65         uint8_t max_event_queues;
  66         uint8_t max_event_ports;
  67         uint8_t is_timeout_deq;
  68         uint8_t nb_event_queues;
  69         uint8_t nb_event_ports;
  70         uint8_t configured;
  71         uint32_t deq_tmo_ns;
  72         uint32_t min_dequeue_timeout_ns;
  73         uint32_t max_dequeue_timeout_ns;
  74         int32_t max_num_events;
  75         uint64_t *fc_mem;
  76         uint64_t xaq_lmt;
  77         uint64_t nb_xaq_cfg;
  78         rte_iova_t fc_iova;
  79         struct rte_mempool *xaq_pool;
  80         /* Dev args */
  81         uint32_t xae_cnt;
  82         uint8_t qos_queue_cnt;
  83         struct cnxk_sso_qos *qos_parse_data;
  84         /* CN9K */
  85         uint8_t dual_ws;
  86         /* CN10K */
  87         uint8_t gw_mode;
  88 } __rte_cache_aligned;
  89
  90 /* CN10K HWS ops */
  91 #define CN10K_SSO_HWS_OPS                                                      \
  92         uintptr_t swtag_desched_op;                                            \
  93         uintptr_t swtag_flush_op;                                              \
  94         uintptr_t swtag_untag_op;                                              \
  95         uintptr_t swtag_norm_op;                                               \
  96         uintptr_t updt_wqe_op;                                                 \
  97         uintptr_t tag_wqe_op;                                                  \
  98         uintptr_t getwrk_op
  99
 100 struct cn10k_sso_hws {
 101         /* Get Work Fastpath data */
 102         CN10K_SSO_HWS_OPS;
 103         uint32_t gw_wdata;
 104         uint8_t swtag_req;
 105         uint8_t hws_id;
 106         /* Add Work Fastpath data */
 107         uint64_t xaq_lmt __rte_cache_aligned;
 108         uint64_t *fc_mem;
 109         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 110         uint64_t base;
 111         uintptr_t lmt_base;
 112 } __rte_cache_aligned;
 113
 114 /* CN9K HWS ops */
 115 #define CN9K_SSO_HWS_OPS                                                       \
 116         uintptr_t swtag_desched_op;                                            \
 117         uintptr_t swtag_flush_op;                                              \
 118         uintptr_t swtag_norm_op;                                               \
 119         uintptr_t getwrk_op;                                                   \
 120         uintptr_t tag_op;                                                      \
 121         uintptr_t wqp_op
 122
 123 /* Event port a.k.a GWS */
 124 struct cn9k_sso_hws {
 125         /* Get Work Fastpath data */
 126         CN9K_SSO_HWS_OPS;
 127         uint8_t swtag_req;
 128         uint8_t hws_id;
 129         /* Add Work Fastpath data */
 130         uint64_t xaq_lmt __rte_cache_aligned;
 131         uint64_t *fc_mem;
 132         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 133         uint64_t base;
 134 } __rte_cache_aligned;
 135
 136 struct cn9k_sso_hws_state {
 137         CN9K_SSO_HWS_OPS;
 138 };
 139
 140 struct cn9k_sso_hws_dual {
 141         /* Get Work Fastpath data */
 142         struct cn9k_sso_hws_state ws_state[2]; /* Ping and Pong */
 143         uint8_t swtag_req;
 144         uint8_t vws; /* Ping pong bit */
 145         uint8_t hws_id;
 146         /* Add Work Fastpath data */
 147         uint64_t xaq_lmt __rte_cache_aligned;
 148         uint64_t *fc_mem;
 149         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 150         uint64_t base[2];
 151 } __rte_cache_aligned;
 152
 153 struct cnxk_sso_hws_cookie {
 154         const struct rte_eventdev *event_dev;
 155         bool configured;
 156 } __rte_cache_aligned;
 157
 158 static inline int
 159 parse_kvargs_value(const char *key, const char *value, void *opaque)
 160 {
 161         RTE_SET_USED(key);
 162
 163         *(uint32_t *)opaque = (uint32_t)atoi(value);
 164         return 0;
 165 }
 166
 167 static inline struct cnxk_sso_evdev *
 168 cnxk_sso_pmd_priv(const struct rte_eventdev *event_dev)
 169 {
 170         return event_dev->data->dev_private;
 171 }
 172
 173 static inline struct cnxk_sso_hws_cookie *
 174 cnxk_sso_hws_get_cookie(void *ws)
 175 {
 176         return RTE_PTR_SUB(ws, sizeof(struct cnxk_sso_hws_cookie));
 177 }
 178
 179 /* Configuration functions */
 180 int cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev);
 181
 182 /* Common ops API. */
 183 int cnxk_sso_init(struct rte_eventdev *event_dev);
 184 int cnxk_sso_fini(struct rte_eventdev *event_dev);
 185 int cnxk_sso_remove(struct rte_pci_device *pci_dev);
 186 void cnxk_sso_info_get(struct cnxk_sso_evdev *dev,
 187                        struct rte_event_dev_info *dev_info);
 188 int cnxk_sso_dev_validate(const struct rte_eventdev *event_dev);
 189 int cnxk_setup_event_ports(const struct rte_eventdev *event_dev,
 190                            cnxk_sso_init_hws_mem_t init_hws_mem,
 191                            cnxk_sso_hws_setup_t hws_setup);
 192 void cnxk_sso_restore_links(const struct rte_eventdev *event_dev,
 193                             cnxk_sso_link_t link_fn);
 194 void cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,
 195                              struct rte_event_queue_conf *queue_conf);
 196 int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,
 197                          const struct rte_event_queue_conf *queue_conf);
 198 void cnxk_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id);
 199 void cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id,
 200                             struct rte_event_port_conf *port_conf);
 201 int cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
 202                         cnxk_sso_hws_setup_t hws_setup_fn);
 203 int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,
 204                            uint64_t *tmo_ticks);
 205 int cnxk_sso_start(struct rte_eventdev *event_dev,
 206                    cnxk_sso_hws_reset_t reset_fn,
 207                    cnxk_sso_hws_flush_t flush_fn);
 208
 209 #endif /* __CNXK_EVENTDEV_H__ */