drivers/event/cnxk/cnxk_eventdev.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef __CNXK_EVENTDEV_H__
   6 #define __CNXK_EVENTDEV_H__
   7
   8 #include <string.h>
   9
  10 #include <cryptodev_pmd.h>
  11 #include <rte_devargs.h>
  12 #include <rte_ethdev.h>
  13 #include <rte_event_eth_rx_adapter.h>
  14 #include <rte_event_eth_tx_adapter.h>
  15 #include <rte_kvargs.h>
  16 #include <rte_mbuf_pool_ops.h>
  17 #include <rte_pci.h>
  18
  19 #include <eventdev_pmd_pci.h>
  20
  21 #include "roc_api.h"
  22
  23 #include "cnxk_tim_evdev.h"
  24
  25 #define CNXK_SSO_XAE_CNT   "xae_cnt"
  26 #define CNXK_SSO_GGRP_QOS  "qos"
  27 #define CNXK_SSO_FORCE_BP  "force_rx_bp"
  28 #define CN9K_SSO_SINGLE_WS "single_ws"
  29 #define CN10K_SSO_GW_MODE  "gw_mode"
  30
  31 #define NSEC2USEC(__ns)         ((__ns) / 1E3)
  32 #define USEC2NSEC(__us)         ((__us)*1E3)
  33 #define NSEC2TICK(__ns, __freq) (((__ns) * (__freq)) / 1E9)
  34
  35 #define CNXK_SSO_MAX_HWGRP     (RTE_EVENT_MAX_QUEUES_PER_DEV + 1)
  36 #define CNXK_SSO_FC_NAME       "cnxk_evdev_xaq_fc"
  37 #define CNXK_SSO_MZ_NAME       "cnxk_evdev_mz"
  38 #define CNXK_SSO_XAQ_CACHE_CNT (0x7)
  39 #define CNXK_SSO_XAQ_SLACK     (8)
  40 #define CNXK_SSO_WQE_SG_PTR    (9)
  41 #define CNXK_SSO_SQB_LIMIT     (0x180)
  42
  43 #define CNXK_TT_FROM_TAG(x)         (((x) >> 32) & SSO_TT_EMPTY)
  44 #define CNXK_TT_FROM_EVENT(x)       (((x) >> 38) & SSO_TT_EMPTY)
  45 #define CNXK_EVENT_TYPE_FROM_TAG(x) (((x) >> 28) & 0xf)
  46 #define CNXK_SUB_EVENT_FROM_TAG(x)  (((x) >> 20) & 0xff)
  47 #define CNXK_CLR_SUB_EVENT(x)       (~(0xffu << 20) & x)
  48 #define CNXK_GRP_FROM_TAG(x)        (((x) >> 36) & 0x3ff)
  49 #define CNXK_SWTAG_PEND(x)          (BIT_ULL(62) & x)
  50 #define CNXK_TAG_IS_HEAD(x)         (BIT_ULL(35) & x)
  51
  52 #define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0)
  53
  54 #define CN10K_GW_MODE_NONE     0
  55 #define CN10K_GW_MODE_PREF     1
  56 #define CN10K_GW_MODE_PREF_WFE 2
  57
  58 #define CNXK_VALID_DEV_OR_ERR_RET(dev, drv_name)                               \
  59         do {                                                                   \
  60                 if (strncmp(dev->driver->name, drv_name, strlen(drv_name)))    \
  61                         return -EINVAL;                                        \
  62         } while (0)
  63
  64 typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id);
  65 typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t grp_base);
  66 typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws);
  67 typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map,
  68                                uint16_t nb_link);
  69 typedef int (*cnxk_sso_unlink_t)(void *dev, void *ws, uint16_t *map,
  70                                  uint16_t nb_link);
  71 typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev);
  72 typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws);
  73 typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,
  74                                      cnxk_handle_event_t fn, void *arg);
  75
  76 struct cnxk_sso_qos {
  77         uint16_t queue;
  78         uint16_t xaq_prcnt;
  79         uint16_t taq_prcnt;
  80         uint16_t iaq_prcnt;
  81 };
  82
  83 struct cnxk_sso_evdev {
  84         struct roc_sso sso;
  85         uint8_t max_event_queues;
  86         uint8_t max_event_ports;
  87         uint8_t is_timeout_deq;
  88         uint8_t nb_event_queues;
  89         uint8_t nb_event_ports;
  90         uint8_t configured;
  91         uint32_t deq_tmo_ns;
  92         uint32_t min_dequeue_timeout_ns;
  93         uint32_t max_dequeue_timeout_ns;
  94         int32_t max_num_events;
  95         uint64_t xaq_lmt;
  96         rte_iova_t fc_iova;
  97         uint64_t rx_offloads;
  98         uint64_t tx_offloads;
  99         uint64_t adptr_xae_cnt;
 100         uint16_t rx_adptr_pool_cnt;
 101         uint64_t *rx_adptr_pools;
 102         uint64_t *tx_adptr_data;
 103         size_t tx_adptr_data_sz;
 104         uint16_t max_port_id;
 105         uint16_t max_queue_id[RTE_MAX_ETHPORTS];
 106         uint8_t tx_adptr_configured;
 107         uint16_t tim_adptr_ring_cnt;
 108         uint16_t *timer_adptr_rings;
 109         uint64_t *timer_adptr_sz;
 110         uint16_t vec_pool_cnt;
 111         uint64_t *vec_pools;
 112         /* Dev args */
 113         uint32_t xae_cnt;
 114         uint8_t qos_queue_cnt;
 115         struct cnxk_sso_qos *qos_parse_data;
 116         uint8_t force_ena_bp;
 117         /* CN9K */
 118         uint8_t dual_ws;
 119         /* CN10K */
 120         uint8_t gw_mode;
 121         /* Crypto adapter */
 122         uint8_t is_ca_internal_port;
 123 } __rte_cache_aligned;
 124
 125 struct cn10k_sso_hws {
 126         uint64_t base;
 127         uint64_t gw_rdata;
 128         /* PTP timestamp */
 129         struct cnxk_timesync_info *tstamp;
 130         void *lookup_mem;
 131         uint32_t gw_wdata;
 132         uint8_t swtag_req;
 133         uint8_t hws_id;
 134         /* Add Work Fastpath data */
 135         uint64_t xaq_lmt __rte_cache_aligned;
 136         uint64_t *fc_mem;
 137         uintptr_t grp_base;
 138         /* Tx Fastpath data */
 139         uintptr_t lmt_base __rte_cache_aligned;
 140         uint64_t lso_tun_fmt;
 141         uint8_t tx_adptr_data[];
 142 } __rte_cache_aligned;
 143
 144 /* Event port a.k.a GWS */
 145 struct cn9k_sso_hws {
 146         uint64_t base;
 147         uint64_t gw_wdata;
 148         /* PTP timestamp */
 149         struct cnxk_timesync_info *tstamp;
 150         void *lookup_mem;
 151         uint8_t swtag_req;
 152         uint8_t hws_id;
 153         /* Add Work Fastpath data */
 154         uint64_t xaq_lmt __rte_cache_aligned;
 155         uint64_t *fc_mem;
 156         uintptr_t grp_base;
 157         /* Tx Fastpath data */
 158         uint64_t lso_tun_fmt __rte_cache_aligned;
 159         uint8_t tx_adptr_data[];
 160 } __rte_cache_aligned;
 161
 162 struct cn9k_sso_hws_dual {
 163         uint64_t base[2]; /* Ping and Pong */
 164         uint64_t gw_wdata;
 165         /* PTP timestamp */
 166         struct cnxk_timesync_info *tstamp;
 167         void *lookup_mem;
 168         uint8_t swtag_req;
 169         uint8_t vws; /* Ping pong bit */
 170         uint8_t hws_id;
 171         /* Add Work Fastpath data */
 172         uint64_t xaq_lmt __rte_cache_aligned;
 173         uint64_t *fc_mem;
 174         uintptr_t grp_base;
 175         /* Tx Fastpath data */
 176         uint64_t lso_tun_fmt __rte_cache_aligned;
 177         uint8_t tx_adptr_data[];
 178 } __rte_cache_aligned;
 179
 180 struct cnxk_sso_hws_cookie {
 181         const struct rte_eventdev *event_dev;
 182         bool configured;
 183 } __rte_cache_aligned;
 184
 185 static inline int
 186 parse_kvargs_flag(const char *key, const char *value, void *opaque)
 187 {
 188         RTE_SET_USED(key);
 189
 190         *(uint8_t *)opaque = !!atoi(value);
 191         return 0;
 192 }
 193
 194 static inline int
 195 parse_kvargs_value(const char *key, const char *value, void *opaque)
 196 {
 197         RTE_SET_USED(key);
 198
 199         *(uint32_t *)opaque = (uint32_t)atoi(value);
 200         return 0;
 201 }
 202
 203 static inline struct cnxk_sso_evdev *
 204 cnxk_sso_pmd_priv(const struct rte_eventdev *event_dev)
 205 {
 206         return event_dev->data->dev_private;
 207 }
 208
 209 static inline struct cnxk_sso_hws_cookie *
 210 cnxk_sso_hws_get_cookie(void *ws)
 211 {
 212         return RTE_PTR_SUB(ws, sizeof(struct cnxk_sso_hws_cookie));
 213 }
 214
 215 /* Configuration functions */
 216 int cnxk_sso_xae_reconfigure(struct rte_eventdev *event_dev);
 217 int cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev);
 218 void cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data,
 219                            uint32_t event_type);
 220
 221 /* Common ops API. */
 222 int cnxk_sso_init(struct rte_eventdev *event_dev);
 223 int cnxk_sso_fini(struct rte_eventdev *event_dev);
 224 int cnxk_sso_remove(struct rte_pci_device *pci_dev);
 225 void cnxk_sso_info_get(struct cnxk_sso_evdev *dev,
 226                        struct rte_event_dev_info *dev_info);
 227 int cnxk_sso_dev_validate(const struct rte_eventdev *event_dev);
 228 int cnxk_setup_event_ports(const struct rte_eventdev *event_dev,
 229                            cnxk_sso_init_hws_mem_t init_hws_mem,
 230                            cnxk_sso_hws_setup_t hws_setup);
 231 void cnxk_sso_restore_links(const struct rte_eventdev *event_dev,
 232                             cnxk_sso_link_t link_fn);
 233 void cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,
 234                              struct rte_event_queue_conf *queue_conf);
 235 int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,
 236                          const struct rte_event_queue_conf *queue_conf);
 237 void cnxk_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id);
 238 void cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id,
 239                             struct rte_event_port_conf *port_conf);
 240 int cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
 241                         cnxk_sso_hws_setup_t hws_setup_fn);
 242 int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,
 243                            uint64_t *tmo_ticks);
 244 int cnxk_sso_start(struct rte_eventdev *event_dev,
 245                    cnxk_sso_hws_reset_t reset_fn,
 246                    cnxk_sso_hws_flush_t flush_fn);
 247 void cnxk_sso_stop(struct rte_eventdev *event_dev,
 248                    cnxk_sso_hws_reset_t reset_fn,
 249                    cnxk_sso_hws_flush_t flush_fn);
 250 int cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn);
 251 int cnxk_sso_selftest(const char *dev_name);
 252 void cnxk_sso_dump(struct rte_eventdev *event_dev, FILE *f);
 253
 254 /* Stats API. */
 255 int cnxk_sso_xstats_get_names(const struct rte_eventdev *event_dev,
 256                               enum rte_event_dev_xstats_mode mode,
 257                               uint8_t queue_port_id,
 258                               struct rte_event_dev_xstats_name *xstats_names,
 259                               unsigned int *ids, unsigned int size);
 260 int cnxk_sso_xstats_get(const struct rte_eventdev *event_dev,
 261                         enum rte_event_dev_xstats_mode mode,
 262                         uint8_t queue_port_id, const unsigned int ids[],
 263                         uint64_t values[], unsigned int n);
 264 int cnxk_sso_xstats_reset(struct rte_eventdev *event_dev,
 265                           enum rte_event_dev_xstats_mode mode,
 266                           int16_t queue_port_id, const uint32_t ids[],
 267                           uint32_t n);
 268
 269 /* Crypto adapter APIs. */
 270 int cnxk_crypto_adapter_qp_add(const struct rte_eventdev *event_dev,
 271                                const struct rte_cryptodev *cdev,
 272                                int32_t queue_pair_id);
 273 int cnxk_crypto_adapter_qp_del(const struct rte_cryptodev *cdev,
 274                                int32_t queue_pair_id);
 275
 276 /* CN9K */
 277 void cn9k_sso_set_rsrc(void *arg);
 278
 279 /* Common adapter ops */
 280 int cnxk_sso_rx_adapter_queue_add(
 281         const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev,
 282         int32_t rx_queue_id,
 283         const struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
 284 int cnxk_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,
 285                                   const struct rte_eth_dev *eth_dev,
 286                                   int32_t rx_queue_id);
 287 int cnxk_sso_rx_adapter_start(const struct rte_eventdev *event_dev,
 288                               const struct rte_eth_dev *eth_dev);
 289 int cnxk_sso_rx_adapter_stop(const struct rte_eventdev *event_dev,
 290                              const struct rte_eth_dev *eth_dev);
 291 int cnxk_sso_tx_adapter_queue_add(const struct rte_eventdev *event_dev,
 292                                   const struct rte_eth_dev *eth_dev,
 293                                   int32_t tx_queue_id);
 294 int cnxk_sso_tx_adapter_queue_del(const struct rte_eventdev *event_dev,
 295                                   const struct rte_eth_dev *eth_dev,
 296                                   int32_t tx_queue_id);
 297
 298 #endif /* __CNXK_EVENTDEV_H__ */