1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2016-2020 Intel Corporation
9 #include "dlb_inline_fns.h"
11 enum dlb_xstats_type {
12 /* common to device and port */
13 rx_ok, /**< Receive an event */
14 rx_drop, /**< Error bit set in received QE */
15 rx_interrupt_wait, /**< Wait on an interrupt */
16 rx_umonitor_umwait, /**< Block using umwait */
17 tx_ok, /**< Transmit an event */
18 total_polls, /**< Call dequeue_burst */
19 zero_polls, /**< Call dequeue burst and return 0 */
20 tx_nospc_ldb_hw_credits, /**< Insufficient LDB h/w credits */
21 tx_nospc_dir_hw_credits, /**< Insufficient DIR h/w credits */
22 tx_nospc_inflight_max, /**< Reach the new_event_threshold */
23 tx_nospc_new_event_limit, /**< Insufficient s/w credits */
24 tx_nospc_inflight_credits, /**< Port has too few s/w credits */
26 nb_events_limit, /**< Maximum num of events */
27 inflight_events, /**< Current num events outstanding */
28 ldb_pool_size, /**< Num load balanced credits */
29 dir_pool_size, /**< Num directed credits */
31 tx_new, /**< Send an OP_NEW event */
32 tx_fwd, /**< Send an OP_FORWARD event */
33 tx_rel, /**< Send an OP_RELEASE event */
34 tx_implicit_rel, /**< Issue an implicit event release */
35 tx_sched_ordered, /**< Send a SCHED_TYPE_ORDERED event */
36 tx_sched_unordered, /**< Send a SCHED_TYPE_PARALLEL event */
37 tx_sched_atomic, /**< Send a SCHED_TYPE_ATOMIC event */
38 tx_sched_directed, /**< Send a directed event */
39 tx_invalid, /**< Send an event with an invalid op */
40 outstanding_releases, /**< # of releases a port owes */
41 max_outstanding_releases, /**< max # of releases a port can owe */
42 rx_sched_ordered, /**< Dequeue an ordered event */
43 rx_sched_unordered, /**< Dequeue an unordered event */
44 rx_sched_atomic, /**< Dequeue an atomic event */
45 rx_sched_directed, /**< Dequeue an directed event */
46 rx_sched_invalid, /**< Dequeue event sched type invalid */
47 /* common to port and queue */
48 is_configured, /**< Port is configured */
49 is_load_balanced, /**< Port is LDB */
50 hw_id, /**< Hardware ID */
52 num_links, /**< Number of ports linked */
53 sched_type, /**< Queue sched type */
54 enq_ok, /**< # events enqueued to the queue */
55 current_depth /**< Current queue depth */
58 typedef uint64_t (*dlb_xstats_fn)(struct dlb_eventdev *dlb,
59 uint16_t obj_idx, /* port or queue id */
60 enum dlb_xstats_type stat, int extra_arg);
62 enum dlb_xstats_fn_type {
68 struct dlb_xstats_entry {
69 struct rte_event_dev_xstats_name name;
70 uint64_t reset_value; /* an offset to be taken away to emulate resets */
71 enum dlb_xstats_fn_type fn_id;
72 enum dlb_xstats_type stat;
73 enum rte_event_dev_xstats_mode mode;
76 uint8_t reset_allowed; /* when set, this value can be reset */
79 /* Some device stats are simply a summation of the corresponding port values */
81 dlb_device_traffic_stat_get(struct dlb_eventdev *dlb, int which_stat)
86 for (i = 0; i < DLB_MAX_NUM_PORTS; i++) {
87 struct dlb_eventdev_port *port = &dlb->ev_ports[i];
89 if (!port->setup_done)
94 val += port->stats.traffic.rx_ok;
97 val += port->stats.traffic.rx_drop;
99 case rx_interrupt_wait:
100 val += port->stats.traffic.rx_interrupt_wait;
102 case rx_umonitor_umwait:
103 val += port->stats.traffic.rx_umonitor_umwait;
106 val += port->stats.traffic.tx_ok;
109 val += port->stats.traffic.total_polls;
112 val += port->stats.traffic.zero_polls;
114 case tx_nospc_ldb_hw_credits:
115 val += port->stats.traffic.tx_nospc_ldb_hw_credits;
117 case tx_nospc_dir_hw_credits:
118 val += port->stats.traffic.tx_nospc_dir_hw_credits;
120 case tx_nospc_inflight_max:
121 val += port->stats.traffic.tx_nospc_inflight_max;
123 case tx_nospc_new_event_limit:
124 val += port->stats.traffic.tx_nospc_new_event_limit;
126 case tx_nospc_inflight_credits:
127 val += port->stats.traffic.tx_nospc_inflight_credits;
137 get_dev_stat(struct dlb_eventdev *dlb, uint16_t obj_idx __rte_unused,
138 enum dlb_xstats_type type, int extra_arg __rte_unused)
143 case rx_interrupt_wait:
144 case rx_umonitor_umwait:
148 case tx_nospc_ldb_hw_credits:
149 case tx_nospc_dir_hw_credits:
150 case tx_nospc_inflight_max:
151 case tx_nospc_new_event_limit:
152 case tx_nospc_inflight_credits:
153 return dlb_device_traffic_stat_get(dlb, type);
154 case nb_events_limit:
155 return dlb->new_event_limit;
156 case inflight_events:
157 return __atomic_load_n(&dlb->inflights, __ATOMIC_SEQ_CST);
159 return dlb->num_ldb_credits;
161 return dlb->num_dir_credits;
167 get_port_stat(struct dlb_eventdev *dlb, uint16_t obj_idx,
168 enum dlb_xstats_type type, int extra_arg __rte_unused)
170 struct dlb_eventdev_port *ev_port = &dlb->ev_ports[obj_idx];
173 case rx_ok: return ev_port->stats.traffic.rx_ok;
175 case rx_drop: return ev_port->stats.traffic.rx_drop;
177 case rx_interrupt_wait: return ev_port->stats.traffic.rx_interrupt_wait;
179 case rx_umonitor_umwait:
180 return ev_port->stats.traffic.rx_umonitor_umwait;
182 case tx_ok: return ev_port->stats.traffic.tx_ok;
184 case total_polls: return ev_port->stats.traffic.total_polls;
186 case zero_polls: return ev_port->stats.traffic.zero_polls;
188 case tx_nospc_ldb_hw_credits:
189 return ev_port->stats.traffic.tx_nospc_ldb_hw_credits;
191 case tx_nospc_dir_hw_credits:
192 return ev_port->stats.traffic.tx_nospc_dir_hw_credits;
194 case tx_nospc_inflight_max:
195 return ev_port->stats.traffic.tx_nospc_inflight_max;
197 case tx_nospc_new_event_limit:
198 return ev_port->stats.traffic.tx_nospc_new_event_limit;
200 case tx_nospc_inflight_credits:
201 return ev_port->stats.traffic.tx_nospc_inflight_credits;
203 case is_configured: return ev_port->setup_done;
205 case is_load_balanced: return !ev_port->qm_port.is_directed;
207 case hw_id: return ev_port->qm_port.id;
209 case tx_new: return ev_port->stats.tx_op_cnt[RTE_EVENT_OP_NEW];
211 case tx_fwd: return ev_port->stats.tx_op_cnt[RTE_EVENT_OP_FORWARD];
213 case tx_rel: return ev_port->stats.tx_op_cnt[RTE_EVENT_OP_RELEASE];
215 case tx_implicit_rel: return ev_port->stats.tx_implicit_rel;
217 case tx_sched_ordered:
218 return ev_port->stats.tx_sched_cnt[DLB_SCHED_ORDERED];
220 case tx_sched_unordered:
221 return ev_port->stats.tx_sched_cnt[DLB_SCHED_UNORDERED];
223 case tx_sched_atomic:
224 return ev_port->stats.tx_sched_cnt[DLB_SCHED_ATOMIC];
226 case tx_sched_directed:
227 return ev_port->stats.tx_sched_cnt[DLB_SCHED_DIRECTED];
229 case tx_invalid: return ev_port->stats.tx_invalid;
231 case outstanding_releases: return ev_port->outstanding_releases;
233 case max_outstanding_releases:
234 return DLB_NUM_HIST_LIST_ENTRIES_PER_LDB_PORT;
236 case rx_sched_ordered:
237 return ev_port->stats.rx_sched_cnt[DLB_SCHED_ORDERED];
239 case rx_sched_unordered:
240 return ev_port->stats.rx_sched_cnt[DLB_SCHED_UNORDERED];
242 case rx_sched_atomic:
243 return ev_port->stats.rx_sched_cnt[DLB_SCHED_ATOMIC];
245 case rx_sched_directed:
246 return ev_port->stats.rx_sched_cnt[DLB_SCHED_DIRECTED];
248 case rx_sched_invalid: return ev_port->stats.rx_sched_invalid;
255 get_queue_stat(struct dlb_eventdev *dlb, uint16_t obj_idx,
256 enum dlb_xstats_type type, int extra_arg __rte_unused)
258 struct dlb_eventdev_queue *ev_queue = &dlb->ev_queues[obj_idx];
261 case is_configured: return ev_queue->setup_done;
263 case is_load_balanced: return !ev_queue->qm_queue.is_directed;
265 case hw_id: return ev_queue->qm_queue.id;
267 case num_links: return ev_queue->num_links;
269 case sched_type: return ev_queue->qm_queue.sched_type;
274 uint64_t enq_ok_tally = 0;
276 ev_queue->enq_ok = 0;
277 for (port_count = 0; port_count < DLB_MAX_NUM_PORTS;
279 struct dlb_eventdev_port *ev_port =
280 &dlb->ev_ports[port_count];
281 enq_ok_tally += ev_port->stats.enq_ok[ev_queue->id];
283 ev_queue->enq_ok = enq_ok_tally;
284 return ev_queue->enq_ok;
287 case current_depth: return dlb_get_queue_depth(dlb, ev_queue);
294 dlb_xstats_init(struct dlb_eventdev *dlb)
297 * define the stats names and types. Used to build up the device
299 * There are multiple set of stats:
304 * For each of these sets, we have three parallel arrays, one for the
305 * names, the other for the stat type parameter to be passed in the fn
306 * call to get that stat. The third array allows resetting or not.
307 * All these arrays must be kept in sync
309 static const char * const dev_stats[] = {
313 "rx_umonitor_umwait",
317 "tx_nospc_ldb_hw_credits",
318 "tx_nospc_dir_hw_credits",
319 "tx_nospc_inflight_max",
320 "tx_nospc_new_event_limit",
321 "tx_nospc_inflight_credits",
327 static const enum dlb_xstats_type dev_types[] = {
335 tx_nospc_ldb_hw_credits,
336 tx_nospc_dir_hw_credits,
337 tx_nospc_inflight_max,
338 tx_nospc_new_event_limit,
339 tx_nospc_inflight_credits,
345 /* Note: generated device stats are not allowed to be reset. */
346 static const uint8_t dev_reset_allowed[] = {
349 0, /* rx_interrupt_wait */
350 0, /* rx_umonitor_umwait */
354 0, /* tx_nospc_ldb_hw_credits */
355 0, /* tx_nospc_dir_hw_credits */
356 0, /* tx_nospc_inflight_max */
357 0, /* tx_nospc_new_event_limit */
358 0, /* tx_nospc_inflight_credits */
359 0, /* nb_events_limit */
360 0, /* inflight_events */
361 0, /* ldb_pool_size */
362 0, /* dir_pool_size */
364 static const char * const port_stats[] = {
371 "rx_umonitor_umwait",
375 "tx_nospc_ldb_hw_credits",
376 "tx_nospc_dir_hw_credits",
377 "tx_nospc_inflight_max",
378 "tx_nospc_new_event_limit",
379 "tx_nospc_inflight_credits",
385 "tx_sched_unordered",
389 "outstanding_releases",
390 "max_outstanding_releases",
392 "rx_sched_unordered",
397 static const enum dlb_xstats_type port_types[] = {
408 tx_nospc_ldb_hw_credits,
409 tx_nospc_dir_hw_credits,
410 tx_nospc_inflight_max,
411 tx_nospc_new_event_limit,
412 tx_nospc_inflight_credits,
422 outstanding_releases,
423 max_outstanding_releases,
430 static const uint8_t port_reset_allowed[] = {
431 0, /* is_configured */
432 0, /* is_load_balanced */
436 1, /* rx_interrupt_wait */
437 1, /* rx_umonitor_umwait */
441 1, /* tx_nospc_ldb_hw_credits */
442 1, /* tx_nospc_dir_hw_credits */
443 1, /* tx_nospc_inflight_max */
444 1, /* tx_nospc_new_event_limit */
445 1, /* tx_nospc_inflight_credits */
449 1, /* tx_implicit_rel */
450 1, /* tx_sched_ordered */
451 1, /* tx_sched_unordered */
452 1, /* tx_sched_atomic */
453 1, /* tx_sched_directed */
455 0, /* outstanding_releases */
456 0, /* max_outstanding_releases */
457 1, /* rx_sched_ordered */
458 1, /* rx_sched_unordered */
459 1, /* rx_sched_atomic */
460 1, /* rx_sched_directed */
461 1 /* rx_sched_invalid */
464 /* QID specific stats */
465 static const char * const qid_stats[] = {
474 static const enum dlb_xstats_type qid_types[] = {
483 static const uint8_t qid_reset_allowed[] = {
484 0, /* is_configured */
485 0, /* is_load_balanced */
490 0, /* current_depth */
493 /* ---- end of stat definitions ---- */
495 /* check sizes, since a missed comma can lead to strings being
496 * joined by the compiler.
498 RTE_BUILD_BUG_ON(RTE_DIM(dev_stats) != RTE_DIM(dev_types));
499 RTE_BUILD_BUG_ON(RTE_DIM(port_stats) != RTE_DIM(port_types));
500 RTE_BUILD_BUG_ON(RTE_DIM(qid_stats) != RTE_DIM(qid_types));
502 RTE_BUILD_BUG_ON(RTE_DIM(dev_stats) != RTE_DIM(dev_reset_allowed));
503 RTE_BUILD_BUG_ON(RTE_DIM(port_stats) != RTE_DIM(port_reset_allowed));
504 RTE_BUILD_BUG_ON(RTE_DIM(qid_stats) != RTE_DIM(qid_reset_allowed));
507 const unsigned int count = RTE_DIM(dev_stats) +
508 DLB_MAX_NUM_PORTS * RTE_DIM(port_stats) +
509 DLB_MAX_NUM_QUEUES * RTE_DIM(qid_stats);
510 unsigned int i, port, qid, stat_id = 0;
512 dlb->xstats = rte_zmalloc_socket(NULL,
513 sizeof(dlb->xstats[0]) * count, 0,
514 dlb->qm_instance.info.socket_id);
515 if (dlb->xstats == NULL)
518 #define sname dlb->xstats[stat_id].name.name
519 for (i = 0; i < RTE_DIM(dev_stats); i++, stat_id++) {
520 dlb->xstats[stat_id] = (struct dlb_xstats_entry) {
521 .fn_id = DLB_XSTATS_FN_DEV,
522 .stat = dev_types[i],
523 .mode = RTE_EVENT_DEV_XSTATS_DEVICE,
524 .reset_allowed = dev_reset_allowed[i],
526 snprintf(sname, sizeof(sname), "dev_%s", dev_stats[i]);
528 dlb->xstats_count_mode_dev = stat_id;
530 for (port = 0; port < DLB_MAX_NUM_PORTS; port++) {
531 uint32_t count_offset = stat_id;
533 dlb->xstats_offset_for_port[port] = stat_id;
535 for (i = 0; i < RTE_DIM(port_stats); i++, stat_id++) {
536 dlb->xstats[stat_id] = (struct dlb_xstats_entry){
537 .fn_id = DLB_XSTATS_FN_PORT,
539 .stat = port_types[i],
540 .mode = RTE_EVENT_DEV_XSTATS_PORT,
541 .reset_allowed = port_reset_allowed[i],
543 snprintf(sname, sizeof(sname), "port_%u_%s",
544 port, port_stats[i]);
547 dlb->xstats_count_per_port[port] = stat_id - count_offset;
550 dlb->xstats_count_mode_port = stat_id - dlb->xstats_count_mode_dev;
552 for (qid = 0; qid < DLB_MAX_NUM_QUEUES; qid++) {
553 uint32_t count_offset = stat_id;
555 dlb->xstats_offset_for_qid[qid] = stat_id;
557 for (i = 0; i < RTE_DIM(qid_stats); i++, stat_id++) {
558 dlb->xstats[stat_id] = (struct dlb_xstats_entry){
559 .fn_id = DLB_XSTATS_FN_QUEUE,
561 .stat = qid_types[i],
562 .mode = RTE_EVENT_DEV_XSTATS_QUEUE,
563 .reset_allowed = qid_reset_allowed[i],
565 snprintf(sname, sizeof(sname), "qid_%u_%s",
569 dlb->xstats_count_per_qid[qid] = stat_id - count_offset;
572 dlb->xstats_count_mode_queue = stat_id -
573 (dlb->xstats_count_mode_dev + dlb->xstats_count_mode_port);
576 dlb->xstats_count = stat_id;
582 dlb_xstats_uninit(struct dlb_eventdev *dlb)
584 rte_free(dlb->xstats);
585 dlb->xstats_count = 0;
589 dlb_eventdev_xstats_get_names(const struct rte_eventdev *dev,
590 enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id,
591 struct rte_event_dev_xstats_name *xstats_names,
592 unsigned int *ids, unsigned int size)
594 const struct dlb_eventdev *dlb = dlb_pmd_priv(dev);
596 unsigned int xidx = 0;
597 uint32_t xstats_mode_count = 0;
598 uint32_t start_offset = 0;
601 case RTE_EVENT_DEV_XSTATS_DEVICE:
602 xstats_mode_count = dlb->xstats_count_mode_dev;
604 case RTE_EVENT_DEV_XSTATS_PORT:
605 if (queue_port_id >= DLB_MAX_NUM_PORTS)
607 xstats_mode_count = dlb->xstats_count_per_port[queue_port_id];
608 start_offset = dlb->xstats_offset_for_port[queue_port_id];
610 case RTE_EVENT_DEV_XSTATS_QUEUE:
611 #if (DLB_MAX_NUM_QUEUES <= 255) /* max 8 bit value */
612 if (queue_port_id >= DLB_MAX_NUM_QUEUES)
615 xstats_mode_count = dlb->xstats_count_per_qid[queue_port_id];
616 start_offset = dlb->xstats_offset_for_qid[queue_port_id];
622 if (xstats_mode_count > size || ids == NULL || xstats_names == NULL)
623 return xstats_mode_count;
625 for (i = 0; i < dlb->xstats_count && xidx < size; i++) {
626 if (dlb->xstats[i].mode != mode)
629 if (mode != RTE_EVENT_DEV_XSTATS_DEVICE &&
630 queue_port_id != dlb->xstats[i].obj_idx)
633 xstats_names[xidx] = dlb->xstats[i].name;
635 ids[xidx] = start_offset + xidx;
642 dlb_xstats_update(struct dlb_eventdev *dlb,
643 enum rte_event_dev_xstats_mode mode,
644 uint8_t queue_port_id, const unsigned int ids[],
645 uint64_t values[], unsigned int n, const uint32_t reset)
648 unsigned int xidx = 0;
649 uint32_t xstats_mode_count = 0;
652 case RTE_EVENT_DEV_XSTATS_DEVICE:
653 xstats_mode_count = dlb->xstats_count_mode_dev;
655 case RTE_EVENT_DEV_XSTATS_PORT:
656 if (queue_port_id >= DLB_MAX_NUM_PORTS)
658 xstats_mode_count = dlb->xstats_count_per_port[queue_port_id];
660 case RTE_EVENT_DEV_XSTATS_QUEUE:
661 #if (DLB_MAX_NUM_QUEUES <= 255) /* max 8 bit value */
662 if (queue_port_id >= DLB_MAX_NUM_QUEUES)
665 xstats_mode_count = dlb->xstats_count_per_qid[queue_port_id];
671 for (i = 0; i < n && xidx < xstats_mode_count; i++) {
672 struct dlb_xstats_entry *xs = &dlb->xstats[ids[i]];
675 if (ids[i] > dlb->xstats_count || xs->mode != mode)
678 if (mode != RTE_EVENT_DEV_XSTATS_DEVICE &&
679 queue_port_id != xs->obj_idx)
683 case DLB_XSTATS_FN_DEV:
686 case DLB_XSTATS_FN_PORT:
689 case DLB_XSTATS_FN_QUEUE:
693 DLB_LOG_ERR("Unexpected xstat fn_id %d\n",
698 uint64_t val = fn(dlb, xs->obj_idx, xs->stat,
699 xs->extra_arg) - xs->reset_value;
704 if (xs->reset_allowed && reset)
705 xs->reset_value += val;
717 dlb_eventdev_xstats_get(const struct rte_eventdev *dev,
718 enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id,
719 const unsigned int ids[], uint64_t values[], unsigned int n)
721 struct dlb_eventdev *dlb = dlb_pmd_priv(dev);
722 const uint32_t reset = 0;
724 return dlb_xstats_update(dlb, mode, queue_port_id, ids, values, n,
729 dlb_eventdev_xstats_get_by_name(const struct rte_eventdev *dev,
730 const char *name, unsigned int *id)
732 struct dlb_eventdev *dlb = dlb_pmd_priv(dev);
736 for (i = 0; i < dlb->xstats_count; i++) {
737 struct dlb_xstats_entry *xs = &dlb->xstats[i];
739 if (strncmp(xs->name.name, name,
740 RTE_EVENT_DEV_XSTATS_NAME_SIZE) == 0){
745 case DLB_XSTATS_FN_DEV:
748 case DLB_XSTATS_FN_PORT:
751 case DLB_XSTATS_FN_QUEUE:
755 DLB_LOG_ERR("Unexpected xstat fn_id %d\n",
760 return fn(dlb, xs->obj_idx, xs->stat,
761 xs->extra_arg) - xs->reset_value;
770 dlb_xstats_reset_range(struct dlb_eventdev *dlb, uint32_t start,
776 for (i = start; i < start + num; i++) {
777 struct dlb_xstats_entry *xs = &dlb->xstats[i];
779 if (!xs->reset_allowed)
783 case DLB_XSTATS_FN_DEV:
786 case DLB_XSTATS_FN_PORT:
789 case DLB_XSTATS_FN_QUEUE:
793 DLB_LOG_ERR("Unexpected xstat fn_id %d\n", xs->fn_id);
797 uint64_t val = fn(dlb, xs->obj_idx, xs->stat, xs->extra_arg);
798 xs->reset_value = val;
803 dlb_xstats_reset_queue(struct dlb_eventdev *dlb, uint8_t queue_id,
804 const uint32_t ids[], uint32_t nb_ids)
806 const uint32_t reset = 1;
809 uint32_t nb_reset = dlb_xstats_update(dlb,
810 RTE_EVENT_DEV_XSTATS_QUEUE,
811 queue_id, ids, NULL, nb_ids,
813 return nb_reset == nb_ids ? 0 : -EINVAL;
817 dlb_xstats_reset_range(dlb,
818 dlb->xstats_offset_for_qid[queue_id],
819 dlb->xstats_count_per_qid[queue_id]);
825 dlb_xstats_reset_port(struct dlb_eventdev *dlb, uint8_t port_id,
826 const uint32_t ids[], uint32_t nb_ids)
828 const uint32_t reset = 1;
829 int offset = dlb->xstats_offset_for_port[port_id];
830 int nb_stat = dlb->xstats_count_per_port[port_id];
833 uint32_t nb_reset = dlb_xstats_update(dlb,
834 RTE_EVENT_DEV_XSTATS_PORT, port_id,
837 return nb_reset == nb_ids ? 0 : -EINVAL;
840 dlb_xstats_reset_range(dlb, offset, nb_stat);
845 dlb_xstats_reset_dev(struct dlb_eventdev *dlb, const uint32_t ids[],
851 for (i = 0; i < nb_ids; i++) {
852 uint32_t id = ids[i];
854 if (id >= dlb->xstats_count_mode_dev)
856 dlb_xstats_reset_range(dlb, id, 1);
859 for (i = 0; i < dlb->xstats_count_mode_dev; i++)
860 dlb_xstats_reset_range(dlb, i, 1);
867 dlb_eventdev_xstats_reset(struct rte_eventdev *dev,
868 enum rte_event_dev_xstats_mode mode,
869 int16_t queue_port_id,
870 const uint32_t ids[],
873 struct dlb_eventdev *dlb = dlb_pmd_priv(dev);
876 /* handle -1 for queue_port_id here, looping over all ports/queues */
878 case RTE_EVENT_DEV_XSTATS_DEVICE:
879 if (dlb_xstats_reset_dev(dlb, ids, nb_ids))
882 case RTE_EVENT_DEV_XSTATS_PORT:
883 if (queue_port_id == -1) {
884 for (i = 0; i < DLB_MAX_NUM_PORTS; i++) {
885 if (dlb_xstats_reset_port(dlb, i, ids,
889 } else if (queue_port_id < DLB_MAX_NUM_PORTS) {
890 if (dlb_xstats_reset_port(dlb, queue_port_id, ids,
897 case RTE_EVENT_DEV_XSTATS_QUEUE:
898 if (queue_port_id == -1) {
899 for (i = 0; i < DLB_MAX_NUM_QUEUES; i++) {
900 if (dlb_xstats_reset_queue(dlb, i, ids,
904 } else if (queue_port_id < DLB_MAX_NUM_QUEUES) {
905 if (dlb_xstats_reset_queue(dlb, queue_port_id, ids,
918 dlb_eventdev_dump(struct rte_eventdev *dev, FILE *f)
920 struct dlb_eventdev *dlb;
921 struct dlb_hw_dev *handle;
924 dlb = dlb_pmd_priv(dev);
927 fprintf(f, "DLB Event device cannot be dumped!\n");
931 if (!dlb->configured)
932 fprintf(f, "DLB Event device is not configured\n");
934 handle = &dlb->qm_instance;
936 fprintf(f, "================\n");
937 fprintf(f, "DLB Device Dump\n");
938 fprintf(f, "================\n");
940 fprintf(f, "Processor supports umonitor/umwait instructions = %s\n",
941 dlb->umwait_allowed ? "yes" : "no");
943 /* Generic top level device information */
945 fprintf(f, "device is configured and run state =");
946 if (dlb->run_state == DLB_RUN_STATE_STOPPED)
947 fprintf(f, "STOPPED\n");
948 else if (dlb->run_state == DLB_RUN_STATE_STOPPING)
949 fprintf(f, "STOPPING\n");
950 else if (dlb->run_state == DLB_RUN_STATE_STARTING)
951 fprintf(f, "STARTING\n");
952 else if (dlb->run_state == DLB_RUN_STATE_STARTED)
953 fprintf(f, "STARTED\n");
955 fprintf(f, "UNEXPECTED\n");
958 "dev ID=%d, dom ID=%u, sock=%u, evdev=%p\n",
959 handle->device_id, handle->domain_id,
960 handle->info.socket_id, dlb->event_dev);
962 fprintf(f, "num dir ports=%u, num dir queues=%u\n",
963 dlb->num_dir_ports, dlb->num_dir_queues);
965 fprintf(f, "num ldb ports=%u, num ldb queues=%u\n",
966 dlb->num_ldb_ports, dlb->num_ldb_queues);
968 fprintf(f, "dir_credit_pool_id=%u, num_credits=%u\n",
969 handle->cfg.dir_credit_pool_id, handle->cfg.num_dir_credits);
971 fprintf(f, "ldb_credit_pool_id=%u, num_credits=%u\n",
972 handle->cfg.ldb_credit_pool_id, handle->cfg.num_ldb_credits);
974 fprintf(f, "num atomic inflights=%u, hist list entries=%u\n",
975 handle->cfg.resources.num_atomic_inflights,
976 handle->cfg.resources.num_hist_list_entries);
978 fprintf(f, "results from most recent hw resource query:\n");
980 fprintf(f, "\tnum_sched_domains = %u\n",
981 dlb->hw_rsrc_query_results.num_sched_domains);
983 fprintf(f, "\tnum_ldb_queues = %u\n",
984 dlb->hw_rsrc_query_results.num_ldb_queues);
986 fprintf(f, "\tnum_ldb_ports = %u\n",
987 dlb->hw_rsrc_query_results.num_ldb_ports);
989 fprintf(f, "\tnum_dir_ports = %u\n",
990 dlb->hw_rsrc_query_results.num_dir_ports);
992 fprintf(f, "\tnum_atomic_inflights = %u\n",
993 dlb->hw_rsrc_query_results.num_atomic_inflights);
995 fprintf(f, "\tmax_contiguous_atomic_inflights = %u\n",
996 dlb->hw_rsrc_query_results.max_contiguous_atomic_inflights);
998 fprintf(f, "\tnum_hist_list_entries = %u\n",
999 dlb->hw_rsrc_query_results.num_hist_list_entries);
1001 fprintf(f, "\tmax_contiguous_hist_list_entries = %u\n",
1002 dlb->hw_rsrc_query_results.max_contiguous_hist_list_entries);
1004 fprintf(f, "\tnum_ldb_credits = %u\n",
1005 dlb->hw_rsrc_query_results.num_ldb_credits);
1007 fprintf(f, "\tmax_contiguous_ldb_credits = %u\n",
1008 dlb->hw_rsrc_query_results.max_contiguous_ldb_credits);
1010 fprintf(f, "\tnum_dir_credits = %u\n",
1011 dlb->hw_rsrc_query_results.num_dir_credits);
1013 fprintf(f, "\tmax_contiguous_dir_credits = %u\n",
1014 dlb->hw_rsrc_query_results.max_contiguous_dir_credits);
1016 fprintf(f, "\tnum_ldb_credit_pools = %u\n",
1017 dlb->hw_rsrc_query_results.num_ldb_credit_pools);
1019 fprintf(f, "\tnum_dir_credit_pools = %u\n",
1020 dlb->hw_rsrc_query_results.num_dir_credit_pools);
1022 /* Port level information */
1024 for (i = 0; i < dlb->num_ports; i++) {
1025 struct dlb_eventdev_port *p = &dlb->ev_ports[i];
1028 if (!p->enq_configured)
1029 fprintf(f, "Port_%d is not configured\n", i);
1031 fprintf(f, "Port_%d\n", i);
1032 fprintf(f, "=======\n");
1034 fprintf(f, "\tevport_%u is configured, setup done=%d\n",
1035 p->id, p->setup_done);
1037 fprintf(f, "\tconfig state=%d, port state=%d\n",
1038 p->qm_port.config_state, p->qm_port.state);
1040 fprintf(f, "\tport is %s\n",
1041 p->qm_port.is_directed ? "directed" : "load balanced");
1043 fprintf(f, "\toutstanding releases=%u\n",
1044 p->outstanding_releases);
1046 fprintf(f, "\tinflight max=%u, inflight credits=%u\n",
1047 p->inflight_max, p->inflight_credits);
1049 fprintf(f, "\tcredit update quanta=%u, implicit release =%u\n",
1050 p->credit_update_quanta, p->implicit_release);
1052 fprintf(f, "\tnum_links=%d, queues -> ", p->num_links);
1054 for (j = 0; j < DLB_MAX_NUM_QIDS_PER_LDB_CQ; j++) {
1055 if (p->link[j].valid)
1056 fprintf(f, "id=%u prio=%u ",
1057 p->link[j].queue_id,
1058 p->link[j].priority);
1062 fprintf(f, "\thardware port id=%u\n", p->qm_port.id);
1064 fprintf(f, "\tcached_ldb_credits=%u\n",
1065 p->qm_port.cached_ldb_credits);
1067 fprintf(f, "\tldb_pushcount_at_credit_expiry = %u\n",
1068 p->qm_port.ldb_pushcount_at_credit_expiry);
1070 fprintf(f, "\tldb_credits = %u\n",
1071 p->qm_port.ldb_credits);
1073 fprintf(f, "\tcached_dir_credits = %u\n",
1074 p->qm_port.cached_dir_credits);
1076 fprintf(f, "\tdir_pushcount_at_credit_expiry=%u\n",
1077 p->qm_port.dir_pushcount_at_credit_expiry);
1079 fprintf(f, "\tdir_credits = %u\n",
1080 p->qm_port.dir_credits);
1082 fprintf(f, "\tgenbit=%d, cq_idx=%d, cq_depth=%d\n",
1085 p->qm_port.cq_depth);
1087 fprintf(f, "\tuse reserved token scheme=%d, cq_rsvd_token_deficit=%u\n",
1088 p->qm_port.use_rsvd_token_scheme,
1089 p->qm_port.cq_rsvd_token_deficit);
1091 fprintf(f, "\tinterrupt armed=%d\n",
1092 p->qm_port.int_armed);
1094 fprintf(f, "\tPort statistics\n");
1096 fprintf(f, "\t\trx_ok %" PRIu64 "\n",
1097 p->stats.traffic.rx_ok);
1099 fprintf(f, "\t\trx_drop %" PRIu64 "\n",
1100 p->stats.traffic.rx_drop);
1102 fprintf(f, "\t\trx_interrupt_wait %" PRIu64 "\n",
1103 p->stats.traffic.rx_interrupt_wait);
1105 fprintf(f, "\t\trx_umonitor_umwait %" PRIu64 "\n",
1106 p->stats.traffic.rx_umonitor_umwait);
1108 fprintf(f, "\t\ttx_ok %" PRIu64 "\n",
1109 p->stats.traffic.tx_ok);
1111 fprintf(f, "\t\ttotal_polls %" PRIu64 "\n",
1112 p->stats.traffic.total_polls);
1114 fprintf(f, "\t\tzero_polls %" PRIu64 "\n",
1115 p->stats.traffic.zero_polls);
1117 fprintf(f, "\t\ttx_nospc_ldb_hw_credits %" PRIu64 "\n",
1118 p->stats.traffic.tx_nospc_ldb_hw_credits);
1120 fprintf(f, "\t\ttx_nospc_dir_hw_credits %" PRIu64 "\n",
1121 p->stats.traffic.tx_nospc_dir_hw_credits);
1123 fprintf(f, "\t\ttx_nospc_inflight_max %" PRIu64 "\n",
1124 p->stats.traffic.tx_nospc_inflight_max);
1126 fprintf(f, "\t\ttx_nospc_new_event_limit %" PRIu64 "\n",
1127 p->stats.traffic.tx_nospc_new_event_limit);
1129 fprintf(f, "\t\ttx_nospc_inflight_credits %" PRIu64 "\n",
1130 p->stats.traffic.tx_nospc_inflight_credits);
1132 fprintf(f, "\t\ttx_new %" PRIu64 "\n",
1133 p->stats.tx_op_cnt[RTE_EVENT_OP_NEW]);
1135 fprintf(f, "\t\ttx_fwd %" PRIu64 "\n",
1136 p->stats.tx_op_cnt[RTE_EVENT_OP_FORWARD]);
1138 fprintf(f, "\t\ttx_rel %" PRIu64 "\n",
1139 p->stats.tx_op_cnt[RTE_EVENT_OP_RELEASE]);
1141 fprintf(f, "\t\ttx_implicit_rel %" PRIu64 "\n",
1142 p->stats.tx_implicit_rel);
1144 fprintf(f, "\t\ttx_sched_ordered %" PRIu64 "\n",
1145 p->stats.tx_sched_cnt[DLB_SCHED_ORDERED]);
1147 fprintf(f, "\t\ttx_sched_unordered %" PRIu64 "\n",
1148 p->stats.tx_sched_cnt[DLB_SCHED_UNORDERED]);
1150 fprintf(f, "\t\ttx_sched_atomic %" PRIu64 "\n",
1151 p->stats.tx_sched_cnt[DLB_SCHED_ATOMIC]);
1153 fprintf(f, "\t\ttx_sched_directed %" PRIu64 "\n",
1154 p->stats.tx_sched_cnt[DLB_SCHED_DIRECTED]);
1156 fprintf(f, "\t\ttx_invalid %" PRIu64 "\n",
1157 p->stats.tx_invalid);
1159 fprintf(f, "\t\trx_sched_ordered %" PRIu64 "\n",
1160 p->stats.rx_sched_cnt[DLB_SCHED_ORDERED]);
1162 fprintf(f, "\t\trx_sched_unordered %" PRIu64 "\n",
1163 p->stats.rx_sched_cnt[DLB_SCHED_UNORDERED]);
1165 fprintf(f, "\t\trx_sched_atomic %" PRIu64 "\n",
1166 p->stats.rx_sched_cnt[DLB_SCHED_ATOMIC]);
1168 fprintf(f, "\t\trx_sched_directed %" PRIu64 "\n",
1169 p->stats.rx_sched_cnt[DLB_SCHED_DIRECTED]);
1171 fprintf(f, "\t\trx_sched_invalid %" PRIu64 "\n",
1172 p->stats.rx_sched_invalid);
1175 /* Queue level information */
1177 for (i = 0; i < dlb->num_queues; i++) {
1178 struct dlb_eventdev_queue *q = &dlb->ev_queues[i];
1182 fprintf(f, "Queue_%d is not configured\n", i);
1184 fprintf(f, "Queue_%d\n", i);
1185 fprintf(f, "========\n");
1187 fprintf(f, "\tevqueue_%u is set up\n", q->id);
1189 fprintf(f, "\tqueue is %s\n",
1190 q->qm_queue.is_directed ? "directed" : "load balanced");
1192 fprintf(f, "\tnum_links=%d, ports -> ", q->num_links);
1194 for (j = 0; j < dlb->num_ports; j++) {
1195 struct dlb_eventdev_port *p = &dlb->ev_ports[j];
1197 for (k = 0; k < DLB_MAX_NUM_QIDS_PER_LDB_CQ; k++) {
1198 if (p->link[k].valid &&
1199 p->link[k].queue_id == q->id)
1200 fprintf(f, "id=%u prio=%u ",
1201 p->id, p->link[k].priority);
1206 fprintf(f, "\tcurrent depth: %u events\n",
1207 dlb_get_queue_depth(dlb, q));
1209 fprintf(f, "\tnum qid inflights=%u, sched_type=%d\n",
1210 q->qm_queue.num_qid_inflights, q->qm_queue.sched_type);